1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Pass.h"
19 #include "llvm/Target/TargetMachine.h"
25 class MachineFunctionPass;
28 class TargetRegisterClass;
34 /// Target-Independent Code Generator Pass Configuration Options.
36 /// This is an ImmutablePass solely for the purpose of exposing CodeGen options
37 /// to the internals of other CodeGen passes.
39 /// FIXME: Why are we passing the DisableVerify flags around instead of setting
40 /// an options in the target machine, like all the other driver options?
41 class TargetPassConfig : public ImmutablePass {
48 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm,
49 bool DisableVerifyFlag);
53 virtual ~TargetPassConfig();
57 /// Get the right type of TargetMachine for this target.
58 template<typename TMC> TMC &getTM() const {
59 return *static_cast<TMC*>(TM);
62 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
64 const TargetLowering *getTargetLowering() const { return TM->getTargetLowering(); }
66 /// Add the complete, standard set of LLVM CodeGen passes.
67 /// Fully developed targets will not generally override this.
68 virtual bool addCodeGenPasses(MCContext *&OutContext);
71 /// Convenient points in the common codegen pass pipeline for inserting
72 /// passes, and major CodeGen stages that some targets may override.
75 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
76 /// passes (which are run just before instruction selector).
77 virtual bool addPreISel() {
81 /// addInstSelector - This method should install an instruction selector pass,
82 /// which converts from LLVM code to machine instructions.
83 virtual bool addInstSelector() {
87 /// addPreRegAlloc - This method may be implemented by targets that want to
88 /// run passes immediately before register allocation. This should return
89 /// true if -print-machineinstrs should print after these passes.
90 virtual bool addPreRegAlloc() {
94 /// addPostRegAlloc - This method may be implemented by targets that want
95 /// to run passes after register allocation but before prolog-epilog
96 /// insertion. This should return true if -print-machineinstrs should print
97 /// after these passes.
98 virtual bool addPostRegAlloc() {
102 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
103 /// on this target. User flag overrides.
104 virtual bool getEnableTailMergeDefault() const { return true; }
106 /// addPreSched2 - This method may be implemented by targets that want to
107 /// run passes after prolog-epilog insertion and before the second instruction
108 /// scheduling pass. This should return true if -print-machineinstrs should
109 /// print after these passes.
110 virtual bool addPreSched2() {
114 /// addPreEmitPass - This pass may be implemented by targets that want to run
115 /// passes immediately before machine code is emitted. This should return
116 /// true if -print-machineinstrs should print out the code after the passes.
117 virtual bool addPreEmitPass() {
121 /// Utilities for targets to add passes to the pass manager.
124 /// Add a target-independent CodeGen pass at this point in the pipeline.
125 void addCommonPass(char &ID);
127 /// printNoVerify - Add a pass to dump the machine function, if debugging is
130 void printNoVerify(const char *Banner) const;
132 /// printAndVerify - Add a pass to dump then verify the machine function, if
133 /// those steps are enabled.
135 void printAndVerify(const char *Banner) const;
139 /// List of target independent CodeGen pass IDs.
141 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
142 /// work well with unreachable basic blocks (what live ranges make sense for a
143 /// block that cannot be reached?). As such, a code generator should either
144 /// not instruction select unreachable blocks, or run this pass as its
145 /// last LLVM modifying pass to clean up blocks that are not reachable from
147 FunctionPass *createUnreachableBlockEliminationPass();
149 /// MachineFunctionPrinter pass - This pass prints out the machine function to
150 /// the given stream as a debugging tool.
151 MachineFunctionPass *
152 createMachineFunctionPrinterPass(raw_ostream &OS,
153 const std::string &Banner ="");
155 /// MachineLoopInfo pass - This pass is a loop analysis pass.
157 extern char &MachineLoopInfoID;
159 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
162 extern char &MachineLoopRangesID;
164 /// MachineDominators pass - This pass is a machine dominators analysis pass.
166 extern char &MachineDominatorsID;
168 /// EdgeBundles analysis - Bundle machine CFG edges.
170 extern char &EdgeBundlesID;
172 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
173 /// by inserting copy instructions. This destroys SSA information, but is the
174 /// desired input for some register allocators. This pass is "required" by
175 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
177 extern char &PHIEliminationID;
179 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
180 /// nodes by inserting copy instructions. This destroys SSA information, but
181 /// is the desired input for some register allocators. This pass is
182 /// "required" by these register allocator like this:
183 /// AU.addRequiredID(PHIEliminationID);
184 /// This pass is still in development
185 extern char &StrongPHIEliminationID;
187 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
188 extern char &LiveStacksID;
190 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
191 /// use two operands. This destroys SSA information but it is desired by
192 /// register allocators.
193 extern char &TwoAddressInstructionPassID;
195 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
196 extern char &RegisterCoalescerPassID;
198 /// MachineScheduler pass - This pass schedules machine instructions.
199 extern char &MachineSchedulerID;
201 /// SpillPlacement analysis. Suggest optimal placement of spill code between
204 extern char &SpillPlacementID;
206 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
207 /// machine basic blocks.
208 extern char &UnreachableMachineBlockElimID;
210 /// DeadMachineInstructionElim pass - This pass removes dead machine
213 FunctionPass *createDeadMachineInstructionElimPass();
215 /// Creates a register allocator as the user specified on the command line, or
216 /// picks one that matches OptLevel.
218 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
220 /// FastRegisterAllocation Pass - This pass register allocates as fast as
221 /// possible. It is best suited for debug code where live ranges are short.
223 FunctionPass *createFastRegisterAllocator();
225 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
226 /// register allocator using the basic regalloc framework.
228 FunctionPass *createBasicRegisterAllocator();
230 /// Greedy register allocation pass - This pass implements a global register
231 /// allocator for optimized builds.
233 FunctionPass *createGreedyRegisterAllocator();
235 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
236 /// Quadratic Prograaming (PBQP) based register allocator.
238 FunctionPass *createDefaultPBQPRegisterAllocator();
240 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
241 /// and eliminates abstract frame references.
243 FunctionPass *createPrologEpilogCodeInserter();
245 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
246 /// register allocation.
248 FunctionPass *createExpandPostRAPseudosPass();
250 /// createPostRAScheduler - This pass performs post register allocation
252 FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
254 /// BranchFolding Pass - This pass performs machine code CFG based
255 /// optimizations to delete branches to branches, eliminate branches to
256 /// successor blocks (creating fall throughs), and eliminating branches over
258 FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
260 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
261 /// into tails of their predecessors.
262 FunctionPass *createTailDuplicatePass(bool PreRegAlloc = false);
264 /// IfConverter Pass - This pass performs machine code if conversion.
265 FunctionPass *createIfConverterPass();
267 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
269 FunctionPass *createMachineBlockPlacementPass();
271 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
272 /// basic block placement using branch probabilities and block frequency
274 FunctionPass *createMachineBlockPlacementStatsPass();
276 /// Code Placement Pass - This pass optimize code placement and aligns loop
277 /// headers to target specific alignment boundary.
278 FunctionPass *createCodePlacementOptPass();
280 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
281 /// transformations for highly portable strategies.
282 FunctionPass *createGCLoweringPass();
284 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
285 /// machine code. Must be added very late during code generation, just prior
286 /// to output, and importantly after all CFG transformations (such as branch
288 FunctionPass *createGCMachineCodeAnalysisPass();
290 /// Deleter Pass - Releases GC metadata.
292 FunctionPass *createGCInfoDeleter();
294 /// Creates a pass to print GC metadata.
296 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
298 /// createMachineCSEPass - This pass performs global CSE on machine
300 FunctionPass *createMachineCSEPass();
302 /// createMachineLICMPass - This pass performs LICM on machine instructions.
304 FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
306 /// createMachineSinkingPass - This pass performs sinking on machine
308 FunctionPass *createMachineSinkingPass();
310 /// createMachineCopyPropagationPass - This pass performs copy propagation on
311 /// machine instructions.
312 FunctionPass *createMachineCopyPropagationPass();
314 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
315 /// like extension and comparison eliminations.
316 FunctionPass *createPeepholeOptimizerPass();
318 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
319 /// to take advantage of opportunities created during DAG legalization.
320 FunctionPass *createOptimizePHIsPass();
322 /// createStackSlotColoringPass - This pass performs stack slot coloring.
323 FunctionPass *createStackSlotColoringPass(bool);
325 /// createStackProtectorPass - This pass adds stack protectors to functions.
326 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
328 /// createMachineVerifierPass - This pass verifies cenerated machine code
329 /// instructions for correctness.
330 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
332 /// createDwarfEHPass - This pass mulches exception handling code into a form
333 /// adapted to code generation. Required if using dwarf exception handling.
334 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
336 /// createSjLjEHPass - This pass adapts exception handling code to use
337 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
338 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
340 /// createLocalStackSlotAllocationPass - This pass assigns local frame
341 /// indices to stack slots relative to one another and allocates
342 /// base registers to access them when it is estimated by the target to
343 /// be out of range of normal frame pointer or stack pointer index
345 FunctionPass *createLocalStackSlotAllocationPass();
347 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
349 FunctionPass *createExpandISelPseudosPass();
351 /// createExecutionDependencyFixPass - This pass fixes execution time
352 /// problems with dependent instructions, such as switching execution
353 /// domains to match.
355 /// The pass will examine instructions using and defining registers in RC.
357 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
359 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
361 FunctionPass *createUnpackMachineBundlesPass();
363 /// createFinalizeMachineBundles - This pass finalize machine instruction
364 /// bundles (created earlier, e.g. during pre-RA scheduling).
366 FunctionPass *createFinalizeMachineBundlesPass();
368 } // End llvm namespace