1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. Instead of using code like this:
13 // M = new MachineInstr(X86::ADDrr8);
14 // M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
15 // M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
17 // we can now use code like this:
19 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
21 //===----------------------------------------------------------------------===//
23 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
24 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
26 #include "llvm/CodeGen/MachineBasicBlock.h"
30 class MachineInstrBuilder {
33 MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
35 /// Allow automatic conversion to the machine instruction we are working on.
37 operator MachineInstr*() const { return MI; }
38 operator MachineBasicBlock::iterator() const { return MI; }
40 /// addReg - Add a new virtual register operand...
42 const MachineInstrBuilder &addReg(
44 MachineOperand::UseType Ty = MachineOperand::Use) const {
45 MI->addRegOperand(RegNo, Ty);
49 /// addReg - Add an LLVM value that is to be used as a register...
51 const MachineInstrBuilder &addReg(
53 MachineOperand::UseType Ty = MachineOperand::Use) const {
54 MI->addRegOperand(V, Ty);
58 /// addRegDef - Add an LLVM value that is to be defined as a register... this
59 /// is the same as addReg(V, MachineOperand::Def).
61 const MachineInstrBuilder &addRegDef(Value *V) const {
62 return addReg(V, MachineOperand::Def);
65 /// addImm - Add a new immediate operand.
67 const MachineInstrBuilder &addImm(int Val) const {
68 MI->addZeroExtImmOperand(Val);
72 /// addSImm - Add a new sign extended immediate operand...
74 const MachineInstrBuilder &addSImm(int val) const {
75 MI->addSignExtImmOperand(val);
79 /// addZImm - Add a new zero extended immediate operand...
81 const MachineInstrBuilder &addZImm(unsigned Val) const {
82 MI->addZeroExtImmOperand(Val);
86 /// addImm64 - Add a new 64-bit immediate operand...
88 const MachineInstrBuilder &addImm64(uint64_t Val) const {
89 MI->addZeroExtImm64Operand(Val);
93 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
94 MI->addMachineBasicBlockOperand(MBB);
98 const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
99 MI->addFrameIndexOperand(Idx);
103 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
104 int Offset = 0) const {
105 MI->addConstantPoolIndexOperand(Idx, Offset);
109 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx) const {
110 MI->addJumpTableIndexOperand(Idx);
114 const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
115 bool isPCRelative = false,
116 int Offset = 0) const {
117 MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
121 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
122 bool isPCRelative = false) const{
123 MI->addExternalSymbolOperand(FnName, isPCRelative);
128 /// BuildMI - Builder interface. Specify how to create the initial instruction
129 /// itself. NumOperands is the number of operands to the machine instruction to
130 /// allow for memory efficient representation of machine instructions.
132 inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
133 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
136 /// BuildMI - This version of the builder sets up the first operand as a
137 /// destination virtual register. NumOperands is the number of additional add*
138 /// calls that are expected, not including the destination register.
140 inline MachineInstrBuilder BuildMI(
141 int Opcode, unsigned NumOperands,
143 MachineOperand::UseType useType = MachineOperand::Def) {
144 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
145 true, true)).addReg(DestReg, useType);
148 /// BuildMI - This version of the builder inserts the newly-built
149 /// instruction before the given position in the given MachineBasicBlock, and
150 /// sets up the first operand as a destination virtual register.
151 /// NumOperands is the number of additional add* calls that are expected,
152 /// not including the destination register.
154 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
155 MachineBasicBlock::iterator I,
156 int Opcode, unsigned NumOperands,
158 MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
160 return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
163 /// BuildMI - This version of the builder inserts the newly-built
164 /// instruction before the given position in the given MachineBasicBlock, and
165 /// does NOT take a destination register.
167 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
168 MachineBasicBlock::iterator I,
169 int Opcode, unsigned NumOperands) {
170 MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
172 return MachineInstrBuilder(MI);
175 /// BuildMI - This version of the builder inserts the newly-built
176 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
177 /// destination register.
179 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
180 unsigned NumOperands) {
181 return BuildMI(*BB, BB->end(), Opcode, NumOperands);
184 /// BuildMI - This version of the builder inserts the newly-built
185 /// instruction at the end of the given MachineBasicBlock, and sets up the first
186 /// operand as a destination virtual register. NumOperands is the number of
187 /// additional add* calls that are expected, not including the destination
190 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
191 unsigned NumOperands, unsigned DestReg) {
192 return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
195 } // End llvm namespace