1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/Streams.h"
30 class MachineBasicBlock;
31 class TargetInstrDescriptor;
35 template <typename T> struct ilist_traits;
36 template <typename T> struct ilist;
38 //===----------------------------------------------------------------------===//
39 // class MachineOperand
41 // Representation of each machine instruction operand.
43 struct MachineOperand {
44 enum MachineOperandType {
45 MO_Register, // Register operand.
46 MO_Immediate, // Immediate Operand
47 MO_MachineBasicBlock, // MachineBasicBlock reference
48 MO_FrameIndex, // Abstract Stack Frame Index
49 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
50 MO_JumpTableIndex, // Address of indexed Jump Table for switch
51 MO_ExternalSymbol, // Name of external global symbol
52 MO_GlobalAddress // Address of a global value
57 GlobalValue *GV; // For MO_GlobalAddress.
58 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
59 const char *SymbolName; // For MO_ExternalSymbol.
60 unsigned RegNo; // For MO_Register.
61 int64_t immedVal; // For MO_Immediate and MO_*Index.
64 MachineOperandType opType:8; // Discriminate the union.
65 bool IsDef : 1; // True if this is a def, false if this is a use.
66 bool IsImp : 1; // True if this is an implicit def or use.
68 bool IsKill : 1; // True if this is a reg use and the reg is dead
69 // immediately after the read.
70 bool IsDead : 1; // True if this is a reg def and the reg is dead
71 // immediately after the write. i.e. A register
72 // that is defined but never used.
74 /// auxInfo - auxiliary information used by the MachineOperand
76 /// offset - Offset to address of global or external, only valid for
77 /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
80 /// subReg - SubRegister number, only valid for MO_Register. A value of 0
81 /// indicates the MO_Register has no subReg.
87 void print(std::ostream &os) const;
88 void print(std::ostream *os) const { if (os) print(*os); }
91 MachineOperand(const MachineOperand &M) {
97 static MachineOperand CreateImm(int64_t Val) {
99 Op.opType = MachineOperand::MO_Immediate;
100 Op.contents.immedVal = Val;
105 Op.auxInfo.offset = 0;
109 const MachineOperand &operator=(const MachineOperand &MO) {
110 contents = MO.contents;
116 auxInfo = MO.auxInfo;
120 /// getType - Returns the MachineOperandType for this operand.
122 MachineOperandType getType() const { return opType; }
124 /// Accessors that tell you what kind of MachineOperand you're looking at.
126 bool isReg() const { return opType == MO_Register; }
127 bool isImm() const { return opType == MO_Immediate; }
128 bool isMBB() const { return opType == MO_MachineBasicBlock; }
130 bool isRegister() const { return opType == MO_Register; }
131 bool isImmediate() const { return opType == MO_Immediate; }
132 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
133 bool isFrameIndex() const { return opType == MO_FrameIndex; }
134 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
135 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
136 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
137 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
139 int64_t getImm() const {
140 assert(isImm() && "Wrong MachineOperand accessor");
141 return contents.immedVal;
144 int64_t getImmedValue() const {
145 assert(isImm() && "Wrong MachineOperand accessor");
146 return contents.immedVal;
148 MachineBasicBlock *getMBB() const {
149 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
152 MachineBasicBlock *getMachineBasicBlock() const {
153 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
156 void setMachineBasicBlock(MachineBasicBlock *MBB) {
157 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
160 int getFrameIndex() const {
161 assert(isFrameIndex() && "Wrong MachineOperand accessor");
162 return (int)contents.immedVal;
164 unsigned getConstantPoolIndex() const {
165 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
166 return (unsigned)contents.immedVal;
168 unsigned getJumpTableIndex() const {
169 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
170 return (unsigned)contents.immedVal;
172 GlobalValue *getGlobal() const {
173 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
176 int getOffset() const {
177 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
178 "Wrong MachineOperand accessor");
179 return auxInfo.offset;
181 unsigned getSubReg() const {
182 assert(isRegister() && "Wrong MachineOperand accessor");
183 return auxInfo.subReg;
185 const char *getSymbolName() const {
186 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
187 return contents.SymbolName;
191 assert(isRegister() && "Wrong MachineOperand accessor");
195 assert(isRegister() && "Wrong MachineOperand accessor");
199 assert(isRegister() && "Wrong MachineOperand accessor");
203 assert(isRegister() && "Wrong MachineOperand accessor");
207 bool isImplicit() const {
208 assert(isRegister() && "Wrong MachineOperand accessor");
212 assert(isRegister() && "Wrong MachineOperand accessor");
216 bool isKill() const {
217 assert(isRegister() && "Wrong MachineOperand accessor");
220 bool isDead() const {
221 assert(isRegister() && "Wrong MachineOperand accessor");
225 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
229 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
233 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
237 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
241 /// getReg - Returns the register number.
243 unsigned getReg() const {
244 assert(isRegister() && "This is not a register operand!");
245 return contents.RegNo;
248 /// MachineOperand mutators.
250 void setReg(unsigned Reg) {
251 assert(isRegister() && "This is not a register operand!");
252 contents.RegNo = Reg;
255 void setImmedValue(int64_t immVal) {
256 assert(isImm() && "Wrong MachineOperand mutator");
257 contents.immedVal = immVal;
259 void setImm(int64_t immVal) {
260 assert(isImm() && "Wrong MachineOperand mutator");
261 contents.immedVal = immVal;
264 void setOffset(int Offset) {
265 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
266 isJumpTableIndex()) &&
267 "Wrong MachineOperand accessor");
268 auxInfo.offset = Offset;
270 void setSubReg(unsigned subReg) {
271 assert(isRegister() && "Wrong MachineOperand accessor");
272 auxInfo.subReg = subReg;
274 void setConstantPoolIndex(unsigned Idx) {
275 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
276 contents.immedVal = Idx;
278 void setJumpTableIndex(unsigned Idx) {
279 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
280 contents.immedVal = Idx;
283 /// isIdenticalTo - Return true if this operand is identical to the specified
284 /// operand. Note: This method ignores isKill and isDead properties.
285 bool isIdenticalTo(const MachineOperand &Other) const;
287 /// ChangeToImmediate - Replace this operand with a new immediate operand of
288 /// the specified value. If an operand is known to be an immediate already,
289 /// the setImmedValue method should be used.
290 void ChangeToImmediate(int64_t ImmVal) {
291 opType = MO_Immediate;
292 contents.immedVal = ImmVal;
295 /// ChangeToRegister - Replace this operand with a new register operand of
296 /// the specified value. If an operand is known to be an register already,
297 /// the setReg method should be used.
298 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
299 bool isKill = false, bool isDead = false) {
300 opType = MO_Register;
301 contents.RegNo = Reg;
308 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {
313 friend class MachineInstr;
317 //===----------------------------------------------------------------------===//
318 /// MachineInstr - Representation of each machine instruction.
321 const TargetInstrDescriptor *TID; // Instruction descriptor.
322 unsigned short NumImplicitOps; // Number of implicit operands (which
323 // are determined at construction time).
325 std::vector<MachineOperand> Operands; // the operands
326 MachineInstr* prev, *next; // links for our intrusive list
327 MachineBasicBlock* parent; // pointer to the owning basic block
329 // OperandComplete - Return true if it's illegal to add a new operand
330 bool OperandsComplete() const;
332 MachineInstr(const MachineInstr&);
333 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
335 // Intrusive list support
337 friend struct ilist_traits<MachineInstr>;
340 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
341 /// TID NULL and no operands.
344 /// MachineInstr ctor - This constructor create a MachineInstr and add the
345 /// implicit operands. It reserves space for number of operands specified by
346 /// TargetInstrDescriptor.
347 MachineInstr(const TargetInstrDescriptor &TID);
349 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
350 /// the MachineInstr is created and added to the end of the specified basic
353 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
357 const MachineBasicBlock* getParent() const { return parent; }
358 MachineBasicBlock* getParent() { return parent; }
360 /// getInstrDescriptor - Returns the target instruction descriptor of this
362 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
364 /// getOpcode - Returns the opcode of this MachineInstr.
366 const int getOpcode() const;
368 /// Access to explicit operands of the instruction.
370 unsigned getNumOperands() const { return Operands.size(); }
372 const MachineOperand& getOperand(unsigned i) const {
373 assert(i < getNumOperands() && "getOperand() out of range!");
376 MachineOperand& getOperand(unsigned i) {
377 assert(i < getNumOperands() && "getOperand() out of range!");
381 /// getNumExplicitOperands - Returns the number of non-implicit operands.
383 unsigned getNumExplicitOperands() const;
385 /// isIdenticalTo - Return true if this instruction is identical to (same
386 /// opcode and same operands as) the specified instruction.
387 bool isIdenticalTo(const MachineInstr *Other) const {
388 if (Other->getOpcode() != getOpcode() ||
389 Other->getNumOperands() != getNumOperands())
391 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
392 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
397 /// isPredicable - True if the instruction can be converted into a
398 /// predicated instruction.
399 bool isPredicable() const;
401 /// clone - Create a copy of 'this' instruction that is identical in
402 /// all ways except the the instruction has no parent, prev, or next.
403 MachineInstr* clone() const { return new MachineInstr(*this); }
405 /// removeFromParent - This method unlinks 'this' from the containing basic
406 /// block, and returns it, but does not delete it.
407 MachineInstr *removeFromParent();
409 /// eraseFromParent - This method unlinks 'this' from the containing basic
410 /// block and deletes it.
411 void eraseFromParent() {
412 delete removeFromParent();
415 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
416 /// the specific register or -1 if it is not found. It further tightening
417 /// the search criteria to a use that kills the register if isKill is true.
418 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false);
420 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
421 /// the specific register or NULL if it is not found.
422 MachineOperand *findRegisterDefOperand(unsigned Reg);
424 /// findFirstPredOperand() - Find the first operand in the operand list that
425 // is used to represent the predicate.
426 MachineOperand *findFirstPredOperand();
428 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
430 void copyKillDeadInfo(const MachineInstr *MI);
432 /// copyPredicates - Copies predicate operand(s) from MI.
433 void copyPredicates(const MachineInstr *MI);
438 void print(std::ostream *OS, const TargetMachine *TM) const {
439 if (OS) print(*OS, TM);
441 void print(std::ostream &OS, const TargetMachine *TM) const;
442 void print(std::ostream &OS) const;
443 void print(std::ostream *OS) const { if (OS) print(*OS); }
445 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){
450 //===--------------------------------------------------------------------===//
451 // Accessors to add operands when building up machine instructions.
454 /// addRegOperand - Add a register operand.
456 void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false,
457 bool IsKill = false, bool IsDead = false) {
458 MachineOperand &Op = AddNewOperand(IsImp);
459 Op.opType = MachineOperand::MO_Register;
464 Op.contents.RegNo = Reg;
465 Op.auxInfo.subReg = 0;
468 /// addImmOperand - Add a zero extended constant argument to the
469 /// machine instruction.
471 void addImmOperand(int64_t Val) {
472 MachineOperand &Op = AddNewOperand();
473 Op.opType = MachineOperand::MO_Immediate;
474 Op.contents.immedVal = Val;
475 Op.auxInfo.offset = 0;
478 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
479 MachineOperand &Op = AddNewOperand();
480 Op.opType = MachineOperand::MO_MachineBasicBlock;
481 Op.contents.MBB = MBB;
482 Op.auxInfo.offset = 0;
485 /// addFrameIndexOperand - Add an abstract frame index to the instruction
487 void addFrameIndexOperand(unsigned Idx) {
488 MachineOperand &Op = AddNewOperand();
489 Op.opType = MachineOperand::MO_FrameIndex;
490 Op.contents.immedVal = Idx;
491 Op.auxInfo.offset = 0;
494 /// addConstantPoolndexOperand - Add a constant pool object index to the
497 void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
498 MachineOperand &Op = AddNewOperand();
499 Op.opType = MachineOperand::MO_ConstantPoolIndex;
500 Op.contents.immedVal = Idx;
501 Op.auxInfo.offset = Offset;
504 /// addJumpTableIndexOperand - Add a jump table object index to the
507 void addJumpTableIndexOperand(unsigned Idx) {
508 MachineOperand &Op = AddNewOperand();
509 Op.opType = MachineOperand::MO_JumpTableIndex;
510 Op.contents.immedVal = Idx;
511 Op.auxInfo.offset = 0;
514 void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
515 MachineOperand &Op = AddNewOperand();
516 Op.opType = MachineOperand::MO_GlobalAddress;
518 Op.auxInfo.offset = Offset;
521 /// addExternalSymbolOperand - Add an external symbol operand to this instr
523 void addExternalSymbolOperand(const char *SymName) {
524 MachineOperand &Op = AddNewOperand();
525 Op.opType = MachineOperand::MO_ExternalSymbol;
526 Op.contents.SymbolName = SymName;
527 Op.auxInfo.offset = 0;
530 //===--------------------------------------------------------------------===//
531 // Accessors used to modify instructions in place.
534 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
535 /// the current instruction with a new one.
537 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
539 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
540 /// fewer operand than it started with.
542 void RemoveOperand(unsigned i) {
543 Operands.erase(Operands.begin()+i);
546 MachineOperand &AddNewOperand(bool IsImp = false) {
547 assert((IsImp || !OperandsComplete()) &&
548 "Trying to add an operand to a machine instr that is already done!");
549 if (IsImp || NumImplicitOps == 0) { // This is true most of the time.
550 Operands.push_back(MachineOperand());
551 return Operands.back();
553 return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
557 /// addImplicitDefUseOperands - Add all implicit def and use operands to
558 /// this instruction.
559 void addImplicitDefUseOperands();
562 //===----------------------------------------------------------------------===//
565 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
566 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
568 } // End llvm namespace