1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/LiveInterval.h"
25 #include "llvm/ADT/BitVector.h"
26 #include "llvm/ADT/DenseMap.h"
27 #include "llvm/ADT/IndexedMap.h"
28 #include "llvm/ADT/SmallPtrSet.h"
29 #include "llvm/ADT/SmallVector.h"
35 class TargetInstrInfo;
36 class TargetRegisterClass;
39 class LiveIntervals : public MachineFunctionPass {
41 const TargetMachine* tm_;
42 const MRegisterInfo* mri_;
43 const TargetInstrInfo* tii_;
46 /// MBB2IdxMap - The indexes of the first and last instructions in the
47 /// specified basic block.
48 std::vector<std::pair<unsigned, unsigned> > MBB2IdxMap;
50 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
53 typedef std::vector<MachineInstr*> Index2MiMap;
56 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
57 Reg2IntervalMap r2iMap_;
59 BitVector allocatableRegs_;
61 std::vector<MachineInstr*> ClonedMIs;
64 static char ID; // Pass identification, replacement for typeid
65 LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {}
77 static unsigned getBaseIndex(unsigned index) {
78 return index - (index % InstrSlots::NUM);
80 static unsigned getBoundaryIndex(unsigned index) {
81 return getBaseIndex(index + InstrSlots::NUM - 1);
83 static unsigned getLoadIndex(unsigned index) {
84 return getBaseIndex(index) + InstrSlots::LOAD;
86 static unsigned getUseIndex(unsigned index) {
87 return getBaseIndex(index) + InstrSlots::USE;
89 static unsigned getDefIndex(unsigned index) {
90 return getBaseIndex(index) + InstrSlots::DEF;
92 static unsigned getStoreIndex(unsigned index) {
93 return getBaseIndex(index) + InstrSlots::STORE;
96 typedef Reg2IntervalMap::iterator iterator;
97 typedef Reg2IntervalMap::const_iterator const_iterator;
98 const_iterator begin() const { return r2iMap_.begin(); }
99 const_iterator end() const { return r2iMap_.end(); }
100 iterator begin() { return r2iMap_.begin(); }
101 iterator end() { return r2iMap_.end(); }
102 unsigned getNumIntervals() const { return r2iMap_.size(); }
104 LiveInterval &getInterval(unsigned reg) {
105 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
106 assert(I != r2iMap_.end() && "Interval does not exist for register");
110 const LiveInterval &getInterval(unsigned reg) const {
111 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
112 assert(I != r2iMap_.end() && "Interval does not exist for register");
116 bool hasInterval(unsigned reg) const {
117 return r2iMap_.count(reg);
120 /// getMBBStartIdx - Return the base index of the first instruction in the
121 /// specified MachineBasicBlock.
122 unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
123 return getMBBStartIdx(MBB->getNumber());
125 unsigned getMBBStartIdx(unsigned MBBNo) const {
126 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
127 return MBB2IdxMap[MBBNo].first;
130 /// getMBBEndIdx - Return the store index of the last instruction in the
131 /// specified MachineBasicBlock.
132 unsigned getMBBEndIdx(MachineBasicBlock *MBB) const {
133 return getMBBEndIdx(MBB->getNumber());
135 unsigned getMBBEndIdx(unsigned MBBNo) const {
136 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
137 return MBB2IdxMap[MBBNo].second;
140 /// getInstructionIndex - returns the base index of instr
141 unsigned getInstructionIndex(MachineInstr* instr) const {
142 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
143 assert(it != mi2iMap_.end() && "Invalid instruction!");
147 /// getInstructionFromIndex - given an index in any slot of an
148 /// instruction return a pointer the instruction
149 MachineInstr* getInstructionFromIndex(unsigned index) const {
150 index /= InstrSlots::NUM; // convert index to vector index
151 assert(index < i2miMap_.size() &&
152 "index does not correspond to an instruction");
153 return i2miMap_[index];
158 LiveInterval &getOrCreateInterval(unsigned reg) {
159 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
160 if (I == r2iMap_.end())
161 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
165 /// CreateNewLiveInterval - Create a new live interval with the given live
166 /// ranges. The new live interval will have an infinite spill weight.
167 LiveInterval &CreateNewLiveInterval(const LiveInterval *LI,
168 const std::vector<LiveRange> &LRs);
170 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
171 VirtRegMap& vrm, unsigned reg);
175 void removeInterval(unsigned Reg) {
179 /// isRemoved - returns true if the specified machine instr has been
181 bool isRemoved(MachineInstr* instr) const {
182 return !mi2iMap_.count(instr);
185 /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
187 void RemoveMachineInstrFromMaps(MachineInstr *MI) {
188 // remove index -> MachineInstr and
189 // MachineInstr -> index mappings
190 Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
191 if (mi2i != mi2iMap_.end()) {
192 i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
193 mi2iMap_.erase(mi2i);
197 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
198 virtual void releaseMemory();
200 /// runOnMachineFunction - pass entry point
201 virtual bool runOnMachineFunction(MachineFunction&);
203 /// print - Implement the dump method.
204 virtual void print(std::ostream &O, const Module* = 0) const;
205 void print(std::ostream *O, const Module* M = 0) const {
210 /// computeIntervals - Compute live intervals.
211 void computeIntervals();
213 /// handleRegisterDef - update intervals for a register def
214 /// (calls handlePhysicalRegisterDef and
215 /// handleVirtualRegisterDef)
216 void handleRegisterDef(MachineBasicBlock *MBB,
217 MachineBasicBlock::iterator MI, unsigned MIIdx,
220 /// handleVirtualRegisterDef - update intervals for a virtual
222 void handleVirtualRegisterDef(MachineBasicBlock *MBB,
223 MachineBasicBlock::iterator MI,
225 LiveInterval& interval);
227 /// handlePhysicalRegisterDef - update intervals for a physical register
229 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
230 MachineBasicBlock::iterator mi,
232 LiveInterval &interval,
235 /// handleLiveInRegister - Create interval for a livein register.
236 void handleLiveInRegister(MachineBasicBlock* mbb,
238 LiveInterval &interval, bool isAlias = false);
240 /// isReMaterializable - Returns true if the definition MI of the specified
241 /// val# of the specified interval is re-materializable.
242 bool isReMaterializable(const LiveInterval &li, unsigned ValNum,
245 /// tryFoldMemoryOperand - Attempts to fold a spill / restore from slot
246 /// to reg into ith operand of specified MI. If it is successul, MI is
247 /// updated with the newly created MI and returns true.
248 bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, unsigned index,
249 unsigned i, int slot, unsigned reg);
251 static LiveInterval createInterval(unsigned Reg);
253 void printRegName(unsigned reg) const;
256 } // End llvm namespace