1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
18 #include "llvm/InlineAsm.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/ADT/APInt.h"
21 #include "llvm/ADT/DenseMap.h"
22 #include "llvm/ADT/SmallVector.h"
24 #include "llvm/ADT/SmallSet.h"
26 #include "llvm/CodeGen/ValueTypes.h"
27 #include "llvm/CodeGen/ISDOpcodes.h"
28 #include "llvm/CodeGen/MachineBasicBlock.h"
29 #include "llvm/Support/CallSite.h"
41 class MachineBasicBlock;
42 class MachineFunction;
43 class MachineModuleInfo;
44 class MachineRegisterInfo;
48 //===--------------------------------------------------------------------===//
49 /// FunctionLoweringInfo - This contains information that is global to a
50 /// function that is used when lowering a region of the function.
52 class FunctionLoweringInfo {
54 const TargetLowering &TLI;
57 MachineRegisterInfo *RegInfo;
59 /// CanLowerReturn - true iff the function's return value can be lowered to
63 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
64 /// allocated to hold a pointer to the hidden sret parameter.
65 unsigned DemoteRegister;
67 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
68 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
70 /// ValueMap - Since we emit code for the function a basic block at a time,
71 /// we must remember which virtual registers hold the values for
72 /// cross-basic-block values.
73 DenseMap<const Value*, unsigned> ValueMap;
75 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
76 /// the entry block. This allows the allocas to be efficiently referenced
77 /// anywhere in the function.
78 DenseMap<const AllocaInst*, int> StaticAllocaMap;
80 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
81 /// function arguments that are inserted after scheduling is completed.
82 SmallVector<MachineInstr*, 8> ArgDbgValues;
84 /// RegFixups - Registers which need to be replaced after isel is done.
85 DenseMap<unsigned, unsigned> RegFixups;
87 /// MBB - The current block.
88 MachineBasicBlock *MBB;
90 /// MBB - The current insert position inside the current block.
91 MachineBasicBlock::iterator InsertPt;
94 SmallSet<const Instruction *, 8> CatchInfoLost;
95 SmallSet<const Instruction *, 8> CatchInfoFound;
100 APInt KnownOne, KnownZero;
101 LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
104 /// LiveOutRegInfo - Information about live out vregs, indexed by their
105 /// register number offset by 'FirstVirtualRegister'.
106 std::vector<LiveOutInfo> LiveOutRegInfo;
108 /// PHINodesToUpdate - A list of phi instructions whose operand list will
109 /// be updated after processing the current basic block.
110 /// TODO: This isn't per-function state, it's per-basic-block state. But
111 /// there's no other convenient place for it to live right now.
112 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
114 explicit FunctionLoweringInfo(const TargetLowering &TLI);
116 /// set - Initialize this FunctionLoweringInfo with the given Function
117 /// and its associated MachineFunction.
119 void set(const Function &Fn, MachineFunction &MF);
121 /// clear - Clear out all the function-specific state. This returns this
122 /// FunctionLoweringInfo to an empty state, ready to be used for a
123 /// different function.
126 /// isExportedInst - Return true if the specified value is an instruction
127 /// exported from its block.
128 bool isExportedInst(const Value *V) {
129 return ValueMap.count(V);
132 unsigned CreateReg(EVT VT);
134 unsigned CreateRegs(const Type *Ty);
136 unsigned InitializeRegForValue(const Value *V) {
137 unsigned &R = ValueMap[V];
138 assert(R == 0 && "Already initialized this value register!");
139 return R = CreateRegs(V->getType());
143 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
144 /// call, and add them to the specified machine basic block.
145 void AddCatchInfo(const CallInst &I,
146 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
148 /// CopyCatchInfo - Copy catch information from DestBB to SrcBB.
149 void CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
150 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
152 } // end namespace llvm