1 //===-- FastISel.h - Definition of the FastISel class ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the FastISel class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/ValueTypes.h"
26 class FunctionLoweringInfo;
29 class MachineConstantPool;
30 class MachineFunction;
32 class MachineFrameInfo;
33 class MachineRegisterInfo;
35 class TargetInstrInfo;
36 class TargetLibraryInfo;
39 class TargetRegisterClass;
40 class TargetRegisterInfo;
44 /// FastISel - This is a fast-path instruction selection class that
45 /// generates poor code and doesn't support illegal types or non-trivial
46 /// lowering, but runs quickly.
49 DenseMap<const Value *, unsigned> LocalValueMap;
50 FunctionLoweringInfo &FuncInfo;
51 MachineRegisterInfo &MRI;
52 MachineFrameInfo &MFI;
53 MachineConstantPool &MCP;
55 const TargetMachine &TM;
57 const TargetInstrInfo &TII;
58 const TargetLowering &TLI;
59 const TargetRegisterInfo &TRI;
60 const TargetLibraryInfo *LibInfo;
62 /// The position of the last instruction for materializing constants
63 /// for use in the current block. It resets to EmitStartPt when it
64 /// makes sense (for example, it's usually profitable to avoid function
65 /// calls between the definition and the use)
66 MachineInstr *LastLocalValue;
68 /// The top most instruction in the current block that is allowed for
69 /// emitting local variables. LastLocalValue resets to EmitStartPt when
70 /// it makes sense (for example, on function calls)
71 MachineInstr *EmitStartPt;
74 /// getLastLocalValue - Return the position of the last instruction
75 /// emitted for materializing constants for use in the current block.
76 MachineInstr *getLastLocalValue() { return LastLocalValue; }
78 /// setLastLocalValue - Update the position of the last instruction
79 /// emitted for materializing constants for use in the current block.
80 void setLastLocalValue(MachineInstr *I) {
85 /// startNewBlock - Set the current block to which generated machine
86 /// instructions will be appended, and clear the local CSE map.
90 /// getCurDebugLoc() - Return current debug location information.
91 DebugLoc getCurDebugLoc() const { return DL; }
93 /// LowerArguments - Do "fast" instruction selection for function arguments
94 /// and append machine instructions to the current block. Return true if
96 bool LowerArguments();
98 /// SelectInstruction - Do "fast" instruction selection for the given
99 /// LLVM IR instruction, and append generated machine instructions to
100 /// the current block. Return true if selection was successful.
102 bool SelectInstruction(const Instruction *I);
104 /// SelectOperator - Do "fast" instruction selection for the given
105 /// LLVM IR operator (Instruction or ConstantExpr), and append
106 /// generated machine instructions to the current block. Return true
107 /// if selection was successful.
109 bool SelectOperator(const User *I, unsigned Opcode);
111 /// getRegForValue - Create a virtual register and arrange for it to
112 /// be assigned the value for the given LLVM value.
113 unsigned getRegForValue(const Value *V);
115 /// lookUpRegForValue - Look up the value to see if its value is already
116 /// cached in a register. It may be defined by instructions across blocks or
118 unsigned lookUpRegForValue(const Value *V);
120 /// getRegForGEPIndex - This is a wrapper around getRegForValue that also
121 /// takes care of truncating or sign-extending the given getelementptr
123 std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
125 /// \brief We're checking to see if we can fold \p LI into \p FoldInst.
126 /// Note that we could have a sequence where multiple LLVM IR instructions
127 /// are folded into the same machineinstr. For example we could have:
128 /// A: x = load i32 *P
129 /// B: y = icmp A, 42
132 /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know
133 /// about "B" (and any other folded instructions) because it is between
136 /// If we succeed folding, return true.
138 bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
140 /// \brief The specified machine instr operand is a vreg, and that
141 /// vreg is being provided by the specified load instruction. If possible,
142 /// try to fold the load as an operand to the instruction, returning true if
144 /// This method should be implemented by targets.
145 virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
146 const LoadInst * /*LI*/) {
150 /// recomputeInsertPt - Reset InsertPt to prepare for inserting instructions
151 /// into the current block.
152 void recomputeInsertPt();
154 /// removeDeadCode - Remove all dead instructions between the I and E.
155 void removeDeadCode(MachineBasicBlock::iterator I,
156 MachineBasicBlock::iterator E);
159 MachineBasicBlock::iterator InsertPt;
163 /// enterLocalValueArea - Prepare InsertPt to begin inserting instructions
164 /// into the local value area and return the old insert position.
165 SavePoint enterLocalValueArea();
167 /// leaveLocalValueArea - Reset InsertPt to the given old insert position.
168 void leaveLocalValueArea(SavePoint Old);
173 explicit FastISel(FunctionLoweringInfo &funcInfo,
174 const TargetLibraryInfo *libInfo);
176 /// TargetSelectInstruction - This method is called by target-independent
177 /// code when the normal FastISel process fails to select an instruction.
178 /// This gives targets a chance to emit code for anything that doesn't
179 /// fit into FastISel's framework. It returns true if it was successful.
182 TargetSelectInstruction(const Instruction *I) = 0;
184 /// FastLowerArguments - This method is called by target-independent code to
185 /// do target specific argument lowering. It returns true if it was
187 virtual bool FastLowerArguments();
189 /// FastEmit_r - This method is called by target-independent code
190 /// to request that an instruction with the given type and opcode
192 virtual unsigned FastEmit_(MVT VT,
196 /// FastEmit_r - This method is called by target-independent code
197 /// to request that an instruction with the given type, opcode, and
198 /// register operand be emitted.
200 virtual unsigned FastEmit_r(MVT VT,
203 unsigned Op0, bool Op0IsKill);
205 /// FastEmit_rr - This method is called by target-independent code
206 /// to request that an instruction with the given type, opcode, and
207 /// register operands be emitted.
209 virtual unsigned FastEmit_rr(MVT VT,
212 unsigned Op0, bool Op0IsKill,
213 unsigned Op1, bool Op1IsKill);
215 /// FastEmit_ri - This method is called by target-independent code
216 /// to request that an instruction with the given type, opcode, and
217 /// register and immediate operands be emitted.
219 virtual unsigned FastEmit_ri(MVT VT,
222 unsigned Op0, bool Op0IsKill,
225 /// FastEmit_rf - This method is called by target-independent code
226 /// to request that an instruction with the given type, opcode, and
227 /// register and floating-point immediate operands be emitted.
229 virtual unsigned FastEmit_rf(MVT VT,
232 unsigned Op0, bool Op0IsKill,
233 const ConstantFP *FPImm);
235 /// FastEmit_rri - This method is called by target-independent code
236 /// to request that an instruction with the given type, opcode, and
237 /// register and immediate operands be emitted.
239 virtual unsigned FastEmit_rri(MVT VT,
242 unsigned Op0, bool Op0IsKill,
243 unsigned Op1, bool Op1IsKill,
246 /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries
247 /// to emit an instruction with an immediate operand using FastEmit_ri.
248 /// If that fails, it materializes the immediate into a register and try
249 /// FastEmit_rr instead.
250 unsigned FastEmit_ri_(MVT VT,
252 unsigned Op0, bool Op0IsKill,
253 uint64_t Imm, MVT ImmType);
255 /// FastEmit_i - This method is called by target-independent code
256 /// to request that an instruction with the given type, opcode, and
257 /// immediate operand be emitted.
258 virtual unsigned FastEmit_i(MVT VT,
263 /// FastEmit_f - This method is called by target-independent code
264 /// to request that an instruction with the given type, opcode, and
265 /// floating-point immediate operand be emitted.
266 virtual unsigned FastEmit_f(MVT VT,
269 const ConstantFP *FPImm);
271 /// FastEmitInst_ - Emit a MachineInstr with no operands and a
272 /// result register in the given register class.
274 unsigned FastEmitInst_(unsigned MachineInstOpcode,
275 const TargetRegisterClass *RC);
277 /// FastEmitInst_r - Emit a MachineInstr with one register operand
278 /// and a result register in the given register class.
280 unsigned FastEmitInst_r(unsigned MachineInstOpcode,
281 const TargetRegisterClass *RC,
282 unsigned Op0, bool Op0IsKill);
284 /// FastEmitInst_rr - Emit a MachineInstr with two register operands
285 /// and a result register in the given register class.
287 unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
288 const TargetRegisterClass *RC,
289 unsigned Op0, bool Op0IsKill,
290 unsigned Op1, bool Op1IsKill);
292 /// FastEmitInst_rrr - Emit a MachineInstr with three register operands
293 /// and a result register in the given register class.
295 unsigned FastEmitInst_rrr(unsigned MachineInstOpcode,
296 const TargetRegisterClass *RC,
297 unsigned Op0, bool Op0IsKill,
298 unsigned Op1, bool Op1IsKill,
299 unsigned Op2, bool Op2IsKill);
301 /// FastEmitInst_ri - Emit a MachineInstr with a register operand,
302 /// an immediate, and a result register in the given register class.
304 unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
305 const TargetRegisterClass *RC,
306 unsigned Op0, bool Op0IsKill,
309 /// FastEmitInst_rii - Emit a MachineInstr with one register operand
310 /// and two immediate operands.
312 unsigned FastEmitInst_rii(unsigned MachineInstOpcode,
313 const TargetRegisterClass *RC,
314 unsigned Op0, bool Op0IsKill,
315 uint64_t Imm1, uint64_t Imm2);
317 /// FastEmitInst_rf - Emit a MachineInstr with two register operands
318 /// and a result register in the given register class.
320 unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
321 const TargetRegisterClass *RC,
322 unsigned Op0, bool Op0IsKill,
323 const ConstantFP *FPImm);
325 /// FastEmitInst_rri - Emit a MachineInstr with two register operands,
326 /// an immediate, and a result register in the given register class.
328 unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
329 const TargetRegisterClass *RC,
330 unsigned Op0, bool Op0IsKill,
331 unsigned Op1, bool Op1IsKill,
334 /// FastEmitInst_rrii - Emit a MachineInstr with two register operands,
335 /// two immediates operands, and a result register in the given register
337 unsigned FastEmitInst_rrii(unsigned MachineInstOpcode,
338 const TargetRegisterClass *RC,
339 unsigned Op0, bool Op0IsKill,
340 unsigned Op1, bool Op1IsKill,
341 uint64_t Imm1, uint64_t Imm2);
343 /// FastEmitInst_i - Emit a MachineInstr with a single immediate
344 /// operand, and a result register in the given register class.
345 unsigned FastEmitInst_i(unsigned MachineInstrOpcode,
346 const TargetRegisterClass *RC,
349 /// FastEmitInst_ii - Emit a MachineInstr with a two immediate operands.
350 unsigned FastEmitInst_ii(unsigned MachineInstrOpcode,
351 const TargetRegisterClass *RC,
352 uint64_t Imm1, uint64_t Imm2);
354 /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
355 /// from a specified index of a superregister to a specified type.
356 unsigned FastEmitInst_extractsubreg(MVT RetVT,
357 unsigned Op0, bool Op0IsKill,
360 /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op
361 /// with all but the least significant bit set to zero.
362 unsigned FastEmitZExtFromI1(MVT VT,
363 unsigned Op0, bool Op0IsKill);
365 /// FastEmitBranch - Emit an unconditional branch to the given block,
366 /// unless it is the immediate (fall-through) successor, and update
368 void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
370 void UpdateValueMap(const Value* I, unsigned Reg, unsigned NumRegs = 1);
372 unsigned createResultReg(const TargetRegisterClass *RC);
374 /// TargetMaterializeConstant - Emit a constant in a register using
375 /// target-specific logic, such as constant pool loads.
376 virtual unsigned TargetMaterializeConstant(const Constant* C) {
380 /// TargetMaterializeAlloca - Emit an alloca address in a register using
381 /// target-specific logic.
382 virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) {
386 virtual unsigned TargetMaterializeFloatZero(const ConstantFP* CF) {
391 bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
393 bool SelectFNeg(const User *I);
395 bool SelectGetElementPtr(const User *I);
397 bool SelectCall(const User *I);
399 bool SelectBitCast(const User *I);
401 bool SelectCast(const User *I, unsigned Opcode);
403 bool SelectExtractValue(const User *I);
405 bool SelectInsertValue(const User *I);
407 /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
408 /// Emit code to ensure constants are copied into registers when needed.
409 /// Remember the virtual registers that need to be added to the Machine PHI
410 /// nodes as input. We cannot just directly add them, because expansion
411 /// might result in multiple MBB's for one BB. As such, the start of the
412 /// BB might correspond to a different MBB than the end.
413 bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
415 /// materializeRegForValue - Helper for getRegForVale. This function is
416 /// called when the value isn't already available in a register and must
417 /// be materialized with new instructions.
418 unsigned materializeRegForValue(const Value *V, MVT VT);
420 /// flushLocalValueMap - clears LocalValueMap and moves the area for the
421 /// new local variables to the beginning of the block. It helps to avoid
422 /// spilling cached variables across heavy instructions like calls.
423 void flushLocalValueMap();
425 /// hasTrivialKill - Test whether the given value has exactly one use.
426 bool hasTrivialKill(const Value *V) const;