1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/Target/TargetCallingConv.h"
22 #include "llvm/CallingConv.h"
25 class TargetRegisterInfo;
29 /// CCValAssign - Represent assignment of one arg/retval to a location.
33 Full, // The value fills the full location.
34 SExt, // The value is sign extended in the location.
35 ZExt, // The value is zero extended in the location.
36 AExt, // The value is extended with undefined upper bits.
37 BCvt, // The value is bit-converted in the location.
38 VExt, // The value is vector-widened in the location.
39 // FIXME: Not implemented yet. Code that uses AExt to mean
40 // vector-widen should be fixed to use VExt instead.
41 Indirect // The location contains pointer to the value.
42 // TODO: a subset of the value is in the location.
45 /// ValNo - This is the value number begin assigned (e.g. an argument number).
48 /// Loc is either a stack offset or a register number.
51 /// isMem - True if this is a memory loc, false if it is a register loc.
54 /// isCustom - True if this arg/retval requires special handling.
57 /// Information about how the value is assigned.
60 /// ValVT - The type of the value being assigned.
63 /// LocVT - The type of the location being assigned to.
67 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
68 unsigned RegNo, MVT LocVT,
81 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
82 unsigned RegNo, MVT LocVT,
85 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
90 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
91 unsigned Offset, MVT LocVT,
104 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
105 unsigned Offset, MVT LocVT,
108 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
113 unsigned getValNo() const { return ValNo; }
114 MVT getValVT() const { return ValVT; }
116 bool isRegLoc() const { return !isMem; }
117 bool isMemLoc() const { return isMem; }
119 bool needsCustom() const { return isCustom; }
121 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
122 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
123 MVT getLocVT() const { return LocVT; }
125 LocInfo getLocInfo() const { return HTP; }
126 bool isExtInLoc() const {
127 return (HTP == AExt || HTP == SExt || HTP == ZExt);
132 /// CCAssignFn - This function assigns a location for Val, updating State to
133 /// reflect the change. It returns 'true' if it failed to handle Val.
134 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
135 MVT LocVT, CCValAssign::LocInfo LocInfo,
136 ISD::ArgFlagsTy ArgFlags, CCState &State);
138 /// CCCustomFn - This function assigns a location for Val, possibly updating
139 /// all args to reflect changes and indicates if it handled it. It must set
140 /// isCustom if it handles the arg and returns true.
141 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
142 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
143 ISD::ArgFlagsTy &ArgFlags, CCState &State);
145 /// ParmContext - This enum tracks whether calling convention lowering is in
146 /// the context of prologue or call generation. Not all backends make use of
147 /// this information.
148 typedef enum { Unknown, Prologue, Call } ParmContext;
150 /// CCState - This class holds information needed while lowering arguments and
151 /// return values. It captures which registers are already assigned and which
152 /// stack slots are used. It provides accessors to allocate these values.
154 CallingConv::ID CallingConv;
157 const TargetMachine &TM;
158 const TargetRegisterInfo &TRI;
159 SmallVector<CCValAssign, 16> &Locs;
160 LLVMContext &Context;
162 unsigned StackOffset;
163 SmallVector<uint32_t, 16> UsedRegs;
164 unsigned FirstByValReg;
165 bool FirstByValRegValid;
166 ParmContext CallOrPrologue;
168 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
169 const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs,
172 void addLoc(const CCValAssign &V) {
176 LLVMContext &getContext() const { return Context; }
177 const TargetMachine &getTarget() const { return TM; }
178 MachineFunction &getMachineFunction() const { return MF; }
179 CallingConv::ID getCallingConv() const { return CallingConv; }
180 bool isVarArg() const { return IsVarArg; }
182 unsigned getNextStackOffset() const { return StackOffset; }
184 /// isAllocated - Return true if the specified register (or an alias) is
186 bool isAllocated(unsigned Reg) const {
187 return UsedRegs[Reg/32] & (1 << (Reg&31));
190 /// AnalyzeFormalArguments - Analyze an array of argument values,
191 /// incorporating info about the formals into this state.
192 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
195 /// AnalyzeReturn - Analyze the returned values of a return,
196 /// incorporating info about the result values into this state.
197 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
200 /// CheckReturn - Analyze the return values of a function, returning
201 /// true if the return can be performed without sret-demotion, and
203 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
206 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
207 /// incorporating info about the passed values into this state.
208 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
211 /// AnalyzeCallOperands - Same as above except it takes vectors of types
212 /// and argument flags.
213 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
214 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
217 /// AnalyzeCallResult - Analyze the return values of a call,
218 /// incorporating info about the passed values into this state.
219 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
222 /// AnalyzeCallResult - Same as above except it's specialized for calls which
223 /// produce a single value.
224 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
226 /// getFirstUnallocated - Return the first unallocated register in the set, or
227 /// NumRegs if they are all allocated.
228 unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
229 for (unsigned i = 0; i != NumRegs; ++i)
230 if (!isAllocated(Regs[i]))
235 /// AllocateReg - Attempt to allocate one register. If it is not available,
236 /// return zero. Otherwise, return the register, marking it and any aliases
238 unsigned AllocateReg(unsigned Reg) {
239 if (isAllocated(Reg)) return 0;
244 /// Version of AllocateReg with extra register to be shadowed.
245 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
246 if (isAllocated(Reg)) return 0;
248 MarkAllocated(ShadowReg);
252 /// AllocateReg - Attempt to allocate one of the specified registers. If none
253 /// are available, return zero. Otherwise, return the first one available,
254 /// marking it and any aliases as allocated.
255 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
256 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
257 if (FirstUnalloc == NumRegs)
258 return 0; // Didn't find the reg.
260 // Mark the register and any aliases as allocated.
261 unsigned Reg = Regs[FirstUnalloc];
266 /// Version of AllocateReg with list of registers to be shadowed.
267 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs,
269 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
270 if (FirstUnalloc == NumRegs)
271 return 0; // Didn't find the reg.
273 // Mark the register and any aliases as allocated.
274 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
276 MarkAllocated(ShadowReg);
280 /// AllocateStack - Allocate a chunk of stack space with the specified size
282 unsigned AllocateStack(unsigned Size, unsigned Align) {
283 assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
284 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
285 unsigned Result = StackOffset;
290 /// Version of AllocateStack with extra register to be shadowed.
291 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
292 MarkAllocated(ShadowReg);
293 return AllocateStack(Size, Align);
296 // HandleByVal - Allocate a stack slot large enough to pass an argument by
297 // value. The size and alignment information of the argument is encoded in its
298 // parameter attribute.
299 void HandleByVal(unsigned ValNo, MVT ValVT,
300 MVT LocVT, CCValAssign::LocInfo LocInfo,
301 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
303 // First GPR that carries part of a byval aggregate that's split
304 // between registers and memory.
305 unsigned getFirstByValReg() { return FirstByValRegValid ? FirstByValReg : 0; }
306 void setFirstByValReg(unsigned r) { FirstByValReg = r; FirstByValRegValid = true; }
307 void clearFirstByValReg() { FirstByValReg = 0; FirstByValRegValid = false; }
308 bool isFirstByValRegValid() { return FirstByValRegValid; }
310 ParmContext getCallOrPrologue() { return CallOrPrologue; }
311 void setCallOrPrologue(ParmContext pc) { CallOrPrologue = pc; }
314 /// MarkAllocated - Mark a register and all of its aliases as allocated.
315 void MarkAllocated(unsigned Reg);
320 } // end namespace llvm