rockchip: avoid change ddr freq before lcd driver is inited

Signed-off-by: cl <cl@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3126b.c b/arch/arm/mach-rockchip/rk3126b.c
index 8021ea8911efd1f1b211c0b47749e184317cc617..7ecdce7014dc283c5384639a382dd5f1842e3501 100755 (executable)
--- a/arch/arm/mach-rockchip/rk3126b.c
+++ b/arch/arm/mach-rockchip/rk3126b.c
@@ -75,7 +75,7 @@ static int __init rk3126b_ddr_init(void)
        ddr_round_rate = _ddr_round_rate;
        ddr_set_auto_self_refresh = _ddr_set_auto_self_refresh;
        ddr_bandwidth_get = _ddr_bandwidth_get;
-       ddr_init(DDR3_DEFAULT, 300);
+       ddr_init(DDR3_DEFAULT, 0);
 
        return 0;
 }

diff --git a/arch/arm/mach-rockchip/rk312x.c b/arch/arm/mach-rockchip/rk312x.c
index 5bdb9dfb2483511445ae6ffe4a05f92a169ba42b..452bdc0dbd3174de1310811dfd9fb10ac3319135 100755 (executable)
--- a/arch/arm/mach-rockchip/rk312x.c
+++ b/arch/arm/mach-rockchip/rk312x.c
@@ -484,8 +484,9 @@ static int __init rk312x_ddr_init(void)
                ddr_round_rate = _ddr_round_rate;
                ddr_set_auto_self_refresh = _ddr_set_auto_self_refresh;
                ddr_bandwidth_get = _ddr_bandwidth_get;
-               ddr_init(DDR3_DEFAULT, 300);
-               }
+               ddr_init(DDR3_DEFAULT, 0);
+       }
+
        return 0;
 }
 arch_initcall_sync(rk312x_ddr_init);

diff --git a/arch/arm/mach-rockchip/rk3288.c b/arch/arm/mach-rockchip/rk3288.c
index 71fd7ff4467d58993173563f692300e45decf187..100327c3129d7aab25ef2866918a9c2bffe55340 100755 (executable)
--- a/arch/arm/mach-rockchip/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288.c
@@ -671,7 +671,7 @@ static int __init rk3288_ddr_init(void)
        ddr_set_auto_self_refresh = _ddr_set_auto_self_refresh;
        ddr_bandwidth_get = _ddr_bandwidth_get;
 
-        ddr_init(DDR3_DEFAULT, 300);
+       ddr_init(DDR3_DEFAULT, 0);
     }
 
     return 0;