ARM64: dts: rk3399: support fusb302 for box rev1/2
authorMeng Dongyang <daniel.meng@rock-chips.com>
Tue, 9 Aug 2016 04:17:37 +0000 (12:17 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Tue, 9 Aug 2016 09:30:57 +0000 (17:30 +0800)
Change-Id: Iea3f9e673a08bc959b3f57d169fff738ce746645
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399-box-rev1.dts
arch/arm64/boot/dts/rockchip/rk3399-box.dtsi

index ddbe95a..60b2e9f 100644 (file)
                                <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
                };
        };
+
+       fusb30x {
+               fusb0_int: fusb0-int {
+                       rockchip,pins =
+                               <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+};
+
+&i2c4 {
+       status = "okay";
+       fusb0: fusb30x@22 {
+               compatible = "fairchild,fusb302";
+               reg = <0x22>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&fusb0_int>;
+               vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+               int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
 };
index ae234cd..fca7b9b 100644 (file)
 
 &u2phy0 {
        status = "okay";
+       extcon = <&fusb0>;
 
        u2phy0_otg: otg-port {
                status = "okay";
 
 &usbdrd_dwc3_0 {
        dr_mode = "peripheral";
+       extcon = <&fusb0>;
        status = "okay";
 };
 
        status = "okay";
 };
 
+&tcphy0{
+       extcon = <&fusb0>;
+};
+
 &pwm2 {
        status = "okay";
 };