arch/arm64/boot/dts/rockchip/rk3399-box.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/pwm/pwm.h>
  43 #include <dt-bindings/input/input.h>
  44 #include "rk3399.dtsi"
  45 #include "rk3399-android.dtsi"
  46
  47 / {
  48         compatible = "rockchip,rk3399-box","rockchip,rk3399";
  49
  50         vcc1v8_s0: vcc1v8-s0 {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "vcc1v8_s0";
  53                 regulator-min-microvolt = <1800000>;
  54                 regulator-max-microvolt = <1800000>;
  55                 regulator-always-on;
  56         };
  57
  58         vcc_sys: vcc-sys {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vcc_sys";
  61                 regulator-min-microvolt = <5000000>;
  62                 regulator-max-microvolt = <5000000>;
  63                 regulator-always-on;
  64         };
  65
  66         vcc_phy: vcc-phy-regulator {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "vcc_phy";
  69                 regulator-always-on;
  70                 regulator-boot-on;
  71         };
  72
  73         vcc3v3_sys: vcc3v3-sys {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vcc3v3_sys";
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78                 regulator-always-on;
  79                 vin-supply = <&vcc_sys>;
  80         };
  81
  82         vcc5v0_host: vcc5v0-host-regulator {
  83                 compatible = "regulator-fixed";
  84                 enable-active-high;
  85                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&host_vbus_drv>;
  88                 regulator-name = "vcc5v0_host";
  89         };
  90
  91         vdd_log: vdd-log {
  92                 compatible = "pwm-regulator";
  93                 pwms = <&pwm2 0 25000 0>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <800000>;
  96                 regulator-max-microvolt = <1400000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99
 100                 /* for rockchip boot on */
 101                 rockchip,pwm_id= <2>;
 102                 rockchip,pwm_voltage = <900000>;
 103
 104                 vin-supply = <&vcc_sys>;
 105         };
 106
 107         clkin_gmac: external-gmac-clock {
 108                 compatible = "fixed-clock";
 109                 clock-frequency = <125000000>;
 110                 clock-output-names = "clkin_gmac";
 111                 #clock-cells = <0>;
 112         };
 113
 114         io-domains {
 115                 compatible = "rockchip,rk3399-io-voltage-domain";
 116                 rockchip,grf = <&grf>;
 117
 118                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
 119                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
 120                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 121                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 122         };
 123
 124         pmu-io-domains {
 125                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 126                 rockchip,grf = <&pmugrf>;
 127
 128                 pmu1830-supply = <&vcc_1v8>;
 129         };
 130
 131         spdif-sound {
 132                 status = "okay";
 133                 compatible = "simple-audio-card";
 134                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 135                 simple-audio-card,cpu {
 136                         sound-dai = <&spdif>;
 137                 };
 138                 simple-audio-card,codec {
 139                         sound-dai = <&spdif_out>;
 140                 };
 141         };
 142
 143         spdif_out: spdif-out {
 144                 status = "okay";
 145                 compatible = "linux,spdif-dit";
 146                 #sound-dai-cells = <0>;
 147         };
 148
 149         hdmi_sound: hdmi-sound {
 150                 status = "okay";
 151                 compatible = "simple-audio-card";
 152                 simple-audio-card,format = "i2s";
 153                 simple-audio-card,mclk-fs = <256>;
 154                 simple-audio-card,name = "rockchip,hdmi";
 155                 simple-audio-card,cpu {
 156                         sound-dai = <&i2s2>;
 157                 };
 158                 simple-audio-card,codec {
 159                         sound-dai = <&dw_hdmi_audio>;
 160                 };
 161         };
 162
 163         dw_hdmi_audio: dw-hdmi-audio {
 164                 status = "okay";
 165                 compatible = "rockchip,dw-hdmi-audio";
 166                 #sound-dai-cells = <0>;
 167         };
 168
 169         sdio_pwrseq: sdio-pwrseq {
 170                 compatible = "mmc-pwrseq-simple";
 171                 clocks = <&rk808 1>;
 172                 clock-names = "ext_clock";
 173                 pinctrl-names = "default";
 174                 pinctrl-0 = <&wifi_enable_h>;
 175
 176                 /*
 177                  * On the module itself this is one of these (depending
 178                  * on the actual card populated):
 179                  * - SDIO_RESET_L_WL_REG_ON
 180                  * - PDN (power down when low)
 181                  */
 182                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 183         };
 184
 185         wireless-wlan {
 186                 compatible = "wlan-platdata";
 187                 rockchip,grf = <&grf>;
 188                 wifi_chip_type = "ap6354";
 189                 sdio_vref = <1800>;
 190                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 191                 status = "okay";
 192         };
 193
 194         wireless-bluetooth {
 195                 compatible = "bluetooth-platdata";
 196                 /* wifi-bt-power-toggle; */
 197                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 198                 pinctrl-names = "default", "rts_gpio";
 199                 pinctrl-0 = <&uart0_rts>;
 200                 pinctrl-1 = <&uart0_gpios>;
 201                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
 202                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 203                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 204                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 205                 status = "okay";
 206         };
 207 };
 208
 209 &sdmmc {
 210         clock-frequency = <100000000>;
 211         clock-freq-min-max = <100000 100000000>;
 212         supports-sd;
 213         bus-width = <4>;
 214         cap-mmc-highspeed;
 215         cap-sd-highspeed;
 216         disable-wp;
 217         num-slots = <1>;
 218         sd-uhs-sdr104;
 219         vqmmc-supply = <&vcc_sd>;
 220         pinctrl-names = "default";
 221         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 222         status = "okay";
 223 };
 224
 225 &sdio0 {
 226         clock-frequency = <100000000>;
 227         clock-freq-min-max = <200000 100000000>;
 228         supports-sdio;
 229         bus-width = <4>;
 230         disable-wp;
 231         cap-sd-highspeed;
 232         cap-sdio-irq;
 233         keep-power-in-suspend;
 234         mmc-pwrseq = <&sdio_pwrseq>;
 235         non-removable;
 236         num-slots = <1>;
 237         pinctrl-names = "default";
 238         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 239         sd-uhs-sdr104;
 240         status = "okay";
 241 };
 242
 243 &emmc_phy {
 244         freq-sel = <200000000>;
 245         dr-sel = <50>;
 246         opdelay = <4>;
 247         status = "okay";
 248 };
 249
 250 &sdhci {
 251         bus-width = <8>;
 252         mmc-hs400-1_8v;
 253         supports-emmc;
 254         non-removable;
 255         mmc-hs400-enhanced-strobe;
 256         status = "okay";
 257 };
 258
 259 &i2s0 {
 260         status = "okay";
 261         rockchip,i2s-broken-burst-len;
 262         rockchip,playback-channels = <8>;
 263         rockchip,capture-channels = <8>;
 264         #sound-dai-cells = <0>;
 265 };
 266
 267 &i2s2 {
 268         #sound-dai-cells = <0>;
 269 };
 270
 271 &spdif {
 272         pinctrl-0 = <&spdif_bus_1>;
 273         status = "okay";
 274         #sound-dai-cells = <0>;
 275 };
 276
 277 &cluster0_opp {
 278         opp@408000000 {
 279                 opp-hz = /bits/ 64 <408000000>;
 280                 opp-microvolt = <800000>;
 281                 clock-latency-ns = <40000>;
 282         };
 283         opp@600000000 {
 284                 opp-hz = /bits/ 64 <600000000>;
 285                 opp-microvolt = <800000>;
 286         };
 287         opp@816000000 {
 288                 opp-hz = /bits/ 64 <816000000>;
 289                 opp-microvolt = <800000>;
 290         };
 291         opp@1008000000 {
 292                 opp-hz = /bits/ 64 <1008000000>;
 293                 opp-microvolt = <875000>;
 294         };
 295         opp@1200000000 {
 296                 opp-hz = /bits/ 64 <1200000000>;
 297                 opp-microvolt = <925000>;
 298         };
 299         opp@1416000000 {
 300                 opp-hz = /bits/ 64 <1416000000>;
 301                 opp-microvolt = <1050000>;
 302         };
 303         opp@1512000000 {
 304                 opp-hz = /bits/ 64 <1512000000>;
 305                 opp-microvolt = <1075000>;
 306         };
 307 };
 308
 309 &cluster1_opp {
 310         opp@408000000 {
 311                 opp-hz = /bits/ 64 <408000000>;
 312                 opp-microvolt = <800000>;
 313                 clock-latency-ns = <40000>;
 314         };
 315         opp@600000000 {
 316                 opp-hz = /bits/ 64 <600000000>;
 317                 opp-microvolt = <800000>;
 318         };
 319         opp@816000000 {
 320                 opp-hz = /bits/ 64 <816000000>;
 321                 opp-microvolt = <825000>;
 322         };
 323         opp@1008000000 {
 324                 opp-hz = /bits/ 64 <1008000000>;
 325                 opp-microvolt = <875000>;
 326         };
 327         opp@1200000000 {
 328                 opp-hz = /bits/ 64 <1200000000>;
 329                 opp-microvolt = <950000>;
 330         };
 331         opp@1416000000 {
 332                 opp-hz = /bits/ 64 <1416000000>;
 333                 opp-microvolt = <1025000>;
 334         };
 335         opp@1608000000 {
 336                 opp-hz = /bits/ 64 <1608000000>;
 337                 opp-microvolt = <1100000>;
 338         };
 339         opp@1800000000 {
 340                 opp-hz = /bits/ 64 <1800000000>;
 341                 opp-microvolt = <1175000>;
 342         };
 343         opp@1992000000 {
 344                 opp-hz = /bits/ 64 <1992000000>;
 345                 opp-microvolt = <1250000>;
 346         };
 347 };
 348
 349 &CPU_COST_A72 {
 350         busy-cost-data = <
 351                 210   129       /*  408MHz */
 352                 308   184       /*  600MHz */
 353                 419   246       /*  816MHz */
 354                 518   335       /* 1008MHz */
 355                 617   428       /* 1200MHz */
 356                 728   573       /* 1416MHz */
 357                 827   724       /* 1608MHz */
 358                 925   900       /* 1800MHz */
 359                 1024  1108      /* 1992MHz */
 360         >;
 361         idle-cost-data = <
 362               15
 363               15
 364                0
 365         >;
 366 };
 367
 368 &CPU_COST_A53 {
 369         busy-cost-data = <
 370                 108    46       /*  408M */
 371                 159    67       /*  600M */
 372                 216    90       /*  816M */
 373                 267    120      /* 1008M */
 374                 318    153      /* 1200M */
 375                 375    198      /* 1416M */
 376                 401    222      /* 1512M */
 377         >;
 378         idle-cost-data = <
 379               6
 380               6
 381               0
 382         >;
 383 };
 384
 385 &CLUSTER_COST_A72 {
 386         busy-cost-data = <
 387                 210   129       /*  408MHz */
 388                 308   184       /*  600MHz */
 389                 419   246       /*  816MHz */
 390                 518   335       /* 1008MHz */
 391                 617   428       /* 1200MHz */
 392                 728   573       /* 1416MHz */
 393                 827   724       /* 1608MHz */
 394                 925   900       /* 1800MHz */
 395                 1024  1108      /* 1992MHz */
 396         >;
 397         idle-cost-data = <
 398                  65
 399                  65
 400                  65
 401         >;
 402 };
 403
 404 &CLUSTER_COST_A53 {
 405         busy-cost-data = <
 406                 108    46       /*  408M */
 407                 159    67       /*  600M */
 408                 216    90       /*  816M */
 409                 267    120      /* 1008M */
 410                 318    153      /* 1200M */
 411                 375    198      /* 1416M */
 412                 401    222      /* 1512M */
 413         >;
 414         idle-cost-data = <
 415                 56
 416                 56
 417                 56
 418         >;
 419 };
 420
 421 &gpu_opp_table {
 422         opp@200000000 {
 423                 opp-hz = /bits/ 64 <200000000>;
 424                 opp-microvolt = <800000>;
 425         };
 426         opp@300000000 {
 427                 opp-hz = /bits/ 64 <300000000>;
 428                 opp-microvolt = <800000>;
 429         };
 430         opp@400000000 {
 431                 opp-hz = /bits/ 64 <400000000>;
 432                 opp-microvolt = <800000>;
 433         };
 434         opp@500000000 {
 435                 opp-hz = /bits/ 64 <500000000>;
 436                 opp-microvolt = <900000>;
 437         };
 438         opp@600000000 {
 439                 opp-hz = /bits/ 64 <600000000>;
 440                 opp-microvolt = <900000>;
 441         };
 442         opp@800000000 {
 443                 opp-hz = /bits/ 64 <800000000>;
 444                 opp-microvolt = <1000000>;
 445         };
 446 };
 447
 448 &i2c0 {
 449         status = "okay";
 450         i2c-scl-rising-time-ns = <168>;
 451         i2c-scl-falling-time-ns = <4>;
 452         clock-frequency = <400000>;
 453
 454         vdd_cpu_b: syr827@40 {
 455                 compatible = "silergy,syr827";
 456                 reg = <0x40>;
 457                 regulator-compatible = "fan53555-reg";
 458                 regulator-name = "vdd_cpu_b";
 459                 regulator-min-microvolt = <712500>;
 460                 regulator-max-microvolt = <1500000>;
 461                 regulator-ramp-delay = <1000>;
 462                 fcs,suspend-voltage-selector = <0>;
 463                 regulator-always-on;
 464                 regulator-boot-on;
 465                 vin-supply = <&vcc_sys>;
 466                 regulator-state-mem {
 467                         regulator-off-in-suspend;
 468                 };
 469         };
 470
 471         vdd_gpu: syr828@41 {
 472                 compatible = "silergy,syr828";
 473                 reg = <0x41>;
 474                 regulator-compatible = "fan53555-reg";
 475                 regulator-name = "vdd_gpu";
 476                 regulator-min-microvolt = <712500>;
 477                 regulator-max-microvolt = <1500000>;
 478                 regulator-ramp-delay = <1000>;
 479                 fcs,suspend-voltage-selector = <1>;
 480                 regulator-always-on;
 481                 regulator-boot-on;
 482                 vin-supply = <&vcc_sys>;
 483                 regulator-state-mem {
 484                         regulator-off-in-suspend;
 485                 };
 486         };
 487
 488         rk808: pmic@1b {
 489                 compatible = "rockchip,rk808";
 490                 reg = <0x1b>;
 491                 interrupt-parent = <&gpio1>;
 492                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 493                 pinctrl-names = "default";
 494                 pinctrl-0 = <&pmic_int_l>;
 495                 rockchip,system-power-controller;
 496                 wakeup-source;
 497                 #clock-cells = <1>;
 498                 clock-output-names = "xin32k", "rk808-clkout2";
 499
 500                 vcc1-supply = <&vcc_sys>;
 501                 vcc2-supply = <&vcc_sys>;
 502                 vcc3-supply = <&vcc_sys>;
 503                 vcc4-supply = <&vcc_sys>;
 504                 vcc6-supply = <&vcc_sys>;
 505                 vcc7-supply = <&vcc_sys>;
 506                 vcc8-supply = <&vcc3v3_sys>;
 507                 vcc9-supply = <&vcc_sys>;
 508                 vcc10-supply = <&vcc_sys>;
 509                 vcc11-supply = <&vcc_sys>;
 510                 vcc12-supply = <&vcc3v3_sys>;
 511                 vddio-supply = <&vcc_1v8>;
 512
 513                 regulators {
 514                         vdd_center: DCDC_REG1 {
 515                                 regulator-name = "vdd_center";
 516                                 regulator-min-microvolt = <750000>;
 517                                 regulator-max-microvolt = <1350000>;
 518                                 regulator-always-on;
 519                                 regulator-boot-on;
 520                                 regulator-state-mem {
 521                                         regulator-off-in-suspend;
 522                                 };
 523                         };
 524
 525                         vdd_cpu_l: DCDC_REG2 {
 526                                 regulator-name = "vdd_cpu_l";
 527                                 regulator-min-microvolt = <750000>;
 528                                 regulator-max-microvolt = <1350000>;
 529                                 regulator-always-on;
 530                                 regulator-boot-on;
 531                                 regulator-state-mem {
 532                                         regulator-off-in-suspend;
 533                                 };
 534                         };
 535
 536                         vcc_ddr: DCDC_REG3 {
 537                                 regulator-name = "vcc_ddr";
 538                                 regulator-always-on;
 539                                 regulator-boot-on;
 540                                 regulator-state-mem {
 541                                         regulator-on-in-suspend;
 542                                 };
 543                         };
 544
 545                         vcc_1v8: DCDC_REG4 {
 546                                 regulator-name = "vcc_1v8";
 547                                 regulator-min-microvolt = <1800000>;
 548                                 regulator-max-microvolt = <1800000>;
 549                                 regulator-always-on;
 550                                 regulator-boot-on;
 551                                 regulator-state-mem {
 552                                         regulator-on-in-suspend;
 553                                         regulator-suspend-microvolt = <1800000>;
 554                                 };
 555                         };
 556
 557                         vcc1v8_dvp: LDO_REG1 {
 558                                 regulator-name = "vcc1v8_dvp";
 559                                 regulator-min-microvolt = <1800000>;
 560                                 regulator-max-microvolt = <1800000>;
 561                                 regulator-always-on;
 562                                 regulator-boot-on;
 563                                 regulator-state-mem {
 564                                         regulator-on-in-suspend;
 565                                         regulator-suspend-microvolt = <1800000>;
 566                                 };
 567                         };
 568
 569                         vcca1v8_hdmi: LDO_REG2 {
 570                                 regulator-name = "vcca1v8_hdmi";
 571                                 regulator-min-microvolt = <1800000>;
 572                                 regulator-max-microvolt = <1800000>;
 573                                 regulator-always-on;
 574                                 regulator-boot-on;
 575                                 regulator-state-mem {
 576                                         regulator-on-in-suspend;
 577                                         regulator-suspend-microvolt = <1800000>;
 578                                 };
 579                         };
 580
 581                         vcca_1v8: LDO_REG3 {
 582                                 regulator-name = "vcca_1v8";
 583                                 regulator-min-microvolt = <1800000>;
 584                                 regulator-max-microvolt = <1800000>;
 585                                 regulator-always-on;
 586                                 regulator-boot-on;
 587                                 regulator-state-mem {
 588                                         regulator-on-in-suspend;
 589                                         regulator-suspend-microvolt = <1800000>;
 590                                 };
 591                         };
 592
 593                         vcc_sd: LDO_REG4 {
 594                                 regulator-name = "vcc_sd";
 595                                 regulator-min-microvolt = <1800000>;
 596                                 regulator-max-microvolt = <3300000>;
 597                                 regulator-always-on;
 598                                 regulator-boot-on;
 599                                 regulator-state-mem {
 600                                         regulator-on-in-suspend;
 601                                         regulator-suspend-microvolt = <3300000>;
 602                                 };
 603                         };
 604
 605                         vcc3v0_sd: LDO_REG5 {
 606                                 regulator-name = "vcc3v0_sd";
 607                                 regulator-min-microvolt = <3000000>;
 608                                 regulator-max-microvolt = <3000000>;
 609                                 regulator-always-on;
 610                                 regulator-boot-on;
 611                                 regulator-state-mem {
 612                                         regulator-on-in-suspend;
 613                                         regulator-suspend-microvolt = <3000000>;
 614                                 };
 615                         };
 616
 617                         vcc_1v5: LDO_REG6 {
 618                                 regulator-name = "vcc_1v5";
 619                                 regulator-min-microvolt = <1500000>;
 620                                 regulator-max-microvolt = <1500000>;
 621                                 regulator-always-on;
 622                                 regulator-boot-on;
 623                                 regulator-state-mem {
 624                                         regulator-on-in-suspend;
 625                                         regulator-suspend-microvolt = <1500000>;
 626                                 };
 627                         };
 628
 629                         vcca0v9_hdmi: LDO_REG7 {
 630                                 regulator-name = "vcca0v9_hdmi";
 631                                 regulator-min-microvolt = <900000>;
 632                                 regulator-max-microvolt = <900000>;
 633                                 regulator-always-on;
 634                                 regulator-boot-on;
 635                                 regulator-state-mem {
 636                                         regulator-on-in-suspend;
 637                                         regulator-suspend-microvolt = <900000>;
 638                                 };
 639                         };
 640
 641                         vcc_3v0: LDO_REG8 {
 642                                 regulator-name = "vcc_3v0";
 643                                 regulator-min-microvolt = <3000000>;
 644                                 regulator-max-microvolt = <3000000>;
 645                                 regulator-always-on;
 646                                 regulator-boot-on;
 647                                 regulator-state-mem {
 648                                         regulator-on-in-suspend;
 649                                         regulator-suspend-microvolt = <3000000>;
 650                                 };
 651                         };
 652
 653                         vcc3v3_s3: SWITCH_REG1 {
 654                                 regulator-name = "vcc3v3_s3";
 655                                 regulator-always-on;
 656                                 regulator-boot-on;
 657                                 regulator-state-mem {
 658                                         regulator-on-in-suspend;
 659                                 };
 660                         };
 661
 662                         vcc3v3_s0: SWITCH_REG2 {
 663                                 regulator-name = "vcc3v3_s0";
 664                                 regulator-always-on;
 665                                 regulator-boot-on;
 666                                 regulator-state-mem {
 667                                         regulator-on-in-suspend;
 668                                 };
 669                         };
 670                 };
 671         };
 672 };
 673
 674 &cpu_l0 {
 675         cpu-supply = <&vdd_cpu_l>;
 676 };
 677
 678 &cpu_l1 {
 679         cpu-supply = <&vdd_cpu_l>;
 680 };
 681
 682 &cpu_l2 {
 683         cpu-supply = <&vdd_cpu_l>;
 684 };
 685
 686 &cpu_l3 {
 687         cpu-supply = <&vdd_cpu_l>;
 688 };
 689
 690 &cpu_b0 {
 691         cpu-supply = <&vdd_cpu_b>;
 692 };
 693
 694 &cpu_b1 {
 695         cpu-supply = <&vdd_cpu_b>;
 696 };
 697
 698 &gpu {
 699         status = "okay";
 700         mali-supply = <&vdd_gpu>;
 701 };
 702
 703 &rga {
 704         status = "okay";
 705 };
 706
 707 &threshold {
 708         temperature = <85000>;
 709 };
 710
 711 &target {
 712         temperature = <100000>;
 713 };
 714
 715 &soc_crit {
 716         temperature = <105000>;
 717 };
 718
 719 &tsadc {
 720         /* tshut mode 0:CRU 1:GPIO */
 721         rockchip,hw-tshut-mode = <1>;
 722         /* tshut polarity 0:LOW 1:HIGH */
 723         rockchip,hw-tshut-polarity = <1>;
 724         rockchip,hw-tshut-temp = <110000>;
 725         status = "okay";
 726 };
 727
 728 &u2phy0 {
 729         status = "okay";
 730
 731         u2phy0_otg: otg-port {
 732                 status = "okay";
 733         };
 734
 735         u2phy0_host: host-port {
 736                 phy-supply = <&vcc5v0_host>;
 737                 status = "okay";
 738         };
 739 };
 740
 741 &u2phy1 {
 742         status = "okay";
 743
 744         u2phy1_otg: otg-port {
 745                 status = "okay";
 746         };
 747
 748         u2phy1_host: host-port {
 749                 phy-supply = <&vcc5v0_host>;
 750                 status = "okay";
 751         };
 752 };
 753
 754 &uart0 {
 755         pinctrl-names = "default";
 756         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 757         status = "okay";
 758 };
 759
 760 &uart2 {
 761         status = "okay";
 762 };
 763
 764 &usb_host0_ehci {
 765         status = "okay";
 766 };
 767
 768 &usb_host0_ohci {
 769         status = "okay";
 770 };
 771
 772 &usb_host1_ehci {
 773         status = "okay";
 774 };
 775
 776 &usb_host1_ohci {
 777         status = "okay";
 778 };
 779
 780 &usbdrd3_0 {
 781         status = "okay";
 782 };
 783
 784 &usbdrd_dwc3_0 {
 785         dr_mode = "peripheral";
 786         status = "okay";
 787 };
 788
 789 &usbdrd3_1 {
 790         status = "okay";
 791 };
 792
 793 &usbdrd_dwc3_1 {
 794         dr_mode = "host";
 795         status = "okay";
 796 };
 797
 798 &pwm2 {
 799         status = "okay";
 800 };
 801
 802 &pwm3 {
 803         status = "okay";
 804
 805         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
 806         compatible = "rockchip,remotectl-pwm";
 807         remote_pwm_id = <3>;
 808         handle_cpu_id = <0>;
 809
 810         ir_key1 {
 811                 rockchip,usercode = <0x4040>;
 812                 rockchip,key_table =
 813                         <0xf2   KEY_REPLY>,
 814                         <0xba   KEY_BACK>,
 815                         <0xf4   KEY_UP>,
 816                         <0xf1   KEY_DOWN>,
 817                         <0xef   KEY_LEFT>,
 818                         <0xee   KEY_RIGHT>,
 819                         <0xbd   KEY_HOME>,
 820                         <0xea   KEY_VOLUMEUP>,
 821                         <0xe3   KEY_VOLUMEDOWN>,
 822                         <0xe2   KEY_SEARCH>,
 823                         <0xb2   KEY_POWER>,
 824                         <0xbc   KEY_MUTE>,
 825                         <0xec   KEY_MENU>,
 826                         <0xbf   0x190>,
 827                         <0xe0   0x191>,
 828                         <0xe1   0x192>,
 829                         <0xe9   183>,
 830                         <0xe6   248>,
 831                         <0xe8   185>,
 832                         <0xe7   186>,
 833                         <0xf0   388>,
 834                         <0xbe   0x175>;
 835         };
 836
 837         ir_key2 {
 838                 rockchip,usercode = <0xff00>;
 839                 rockchip,key_table =
 840                         <0xf9   KEY_HOME>,
 841                         <0xbf   KEY_BACK>,
 842                         <0xfb   KEY_MENU>,
 843                         <0xaa   KEY_REPLY>,
 844                         <0xb9   KEY_UP>,
 845                         <0xe9   KEY_DOWN>,
 846                         <0xb8   KEY_LEFT>,
 847                         <0xea   KEY_RIGHT>,
 848                         <0xeb   KEY_VOLUMEDOWN>,
 849                         <0xef   KEY_VOLUMEUP>,
 850                         <0xf7   KEY_MUTE>,
 851                         <0xe7   KEY_POWER>,
 852                         <0xfc   KEY_POWER>,
 853                         <0xa9   KEY_VOLUMEDOWN>,
 854                         <0xa8   KEY_VOLUMEDOWN>,
 855                         <0xe0   KEY_VOLUMEDOWN>,
 856                         <0xa5   KEY_VOLUMEDOWN>,
 857                         <0xab   183>,
 858                         <0xb7   388>,
 859                         <0xf8   184>,
 860                         <0xaf   185>,
 861                         <0xed   KEY_VOLUMEDOWN>,
 862                         <0xee   186>,
 863                         <0xb3   KEY_VOLUMEDOWN>,
 864                         <0xf1   KEY_VOLUMEDOWN>,
 865                         <0xf2   KEY_VOLUMEDOWN>,
 866                         <0xf3   KEY_SEARCH>,
 867                         <0xb4   KEY_VOLUMEDOWN>,
 868                         <0xbe   KEY_SEARCH>;
 869         };
 870
 871         ir_key3 {
 872                 rockchip,usercode = <0x1dcc>;
 873                 rockchip,key_table =
 874                         <0xee   KEY_REPLY>,
 875                         <0xf0   KEY_BACK>,
 876                         <0xf8   KEY_UP>,
 877                         <0xbb   KEY_DOWN>,
 878                         <0xef   KEY_LEFT>,
 879                         <0xed   KEY_RIGHT>,
 880                         <0xfc   KEY_HOME>,
 881                         <0xf1   KEY_VOLUMEUP>,
 882                         <0xfd   KEY_VOLUMEDOWN>,
 883                         <0xb7   KEY_SEARCH>,
 884                         <0xff   KEY_POWER>,
 885                         <0xf3   KEY_MUTE>,
 886                         <0xbf   KEY_MENU>,
 887                         <0xf9   0x191>,
 888                         <0xf5   0x192>,
 889                         <0xb3   388>,
 890                         <0xbe   KEY_1>,
 891                         <0xba   KEY_2>,
 892                         <0xb2   KEY_3>,
 893                         <0xbd   KEY_4>,
 894                         <0xf9   KEY_5>,
 895                         <0xb1   KEY_6>,
 896                         <0xfc   KEY_7>,
 897                         <0xf8   KEY_8>,
 898                         <0xb0   KEY_9>,
 899                         <0xb6   KEY_0>,
 900                         <0xb5   KEY_BACKSPACE>;
 901         };
 902 };
 903
 904 &gmac {
 905         phy-supply = <&vcc_phy>;
 906         phy-mode = "rgmii";
 907         clock_in_out = "input";
 908         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 909         snps,reset-active-low;
 910         snps,reset-delays-us = <0 10000 50000>;
 911         assigned-clocks = <&cru SCLK_RMII_SRC>;
 912         assigned-clock-parents = <&clkin_gmac>;
 913         pinctrl-names = "default";
 914         pinctrl-0 = <&rgmii_pins>;
 915         tx_delay = <0x28>;
 916         rx_delay = <0x11>;
 917         status = "okay";
 918 };
 919
 920 &saradc {
 921         status = "okay";
 922 };
 923
 924 &rk_screen {
 925         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 926 };
 927
 928 &disp_timings {
 929         native-mode = <&timing1>; /* 1080p */
 930 };
 931
 932 &vopb_rk_fb {
 933         status = "okay";
 934 };
 935
 936 &fb {
 937         rockchip,disp-mode = <NO_DUAL>;
 938         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 939 };
 940
 941 &hdmi_rk_fb {
 942         status = "okay";
 943         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
 944 };
 945
 946 &i2s2 {
 947         status = "okay";
 948 };
 949
 950 &pinctrl {
 951         sdio-pwrseq {
 952                 wifi_enable_h: wifi-enable-h {
 953                         rockchip,pins =
 954                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 955                 };
 956         };
 957
 958         wireless-bluetooth {
 959                 uart0_gpios: uart0-gpios {
 960                         rockchip,pins =
 961                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 962                 };
 963         };
 964
 965         usb2 {
 966                 host_vbus_drv: host-vbus-drv {
 967                         rockchip,pins =
 968                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 969                 };
 970         };
 971
 972         pmic {
 973                 pmic_int_l: pmic-int-l {
 974                         rockchip,pins =
 975                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 976                 };
 977         };
 978 };