ARM64: dts: rk3366: add vpu device
authorsayon.chen <sayon.chen@rock-chips.com>
Wed, 9 Mar 2016 00:46:11 +0000 (08:46 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Thu, 10 Mar 2016 03:08:12 +0000 (11:08 +0800)
add vpu_service and rkvdec device

Change-Id: I53dea4053fa61bd0cd4f6313d9ea7e87673f2ce4
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3366-tb.dts
arch/arm64/boot/dts/rockchip/rk3366.dtsi

index ac4ddd152b6b703afe833f92887fec13cfff7e5a..c95f59237d221f29b1646c2d823142c2fe2586d3 100644 (file)
        status = "okay";
 };
 
+&vpu {
+       status = "okay";
+};
+
+&rkvdec {
+       status = "okay";
+};
+
 &vop_big {
        status = "okay";
        rockchip,prop = <PRMRY>;
index 32ec3f50039f24d9e0d13f9b107fc622de4b8149..c454211bf0f5bb0cb7c638e92c4d4e075cca4291 100644 (file)
                status = "disabled";
        };
 
+       vpu: vpu_service@ff9a0000 {
+               compatible = "rockchip,vpu_service";
+               rockchip,grf = <&grf>;
+               iommu_enabled = <1>;
+               reg = <0x0 0xff9a0000 0x0 0x800>;
+               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "irq_dec", "irq_enc";
+               clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>;
+               clock-names = "aclk_vcodec", "hclk_vcodec";
+               resets = <&cru SRST_VIDEO_AHB>, <&cru SRST_VIDEO_AXI>;
+               reset-names = "video_h", "video_a";
+               name = "vpu_service";
+               dev_mode = <0>;
+               status = "disabled";
+       };
+
+       rkvdec: rkvdec@ff9b0000 {
+               compatible = "rockchip,rkvdec";
+               rockchip,grf = <&grf>;
+               iommu_enabled = <1>;
+               reg = <0x0 0xff9b0000 0x0 0x400>;
+               interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "irq_dec";
+               clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,<&cru SCLK_HEVC_CABAC>,<&cru SCLK_HEVC_CORE>;
+               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
+               resets = <&cru SRST_RKVDEC_AHB>, <&cru SRST_VIDEO_AXI>;
+               reset-names = "video_h", "video_a";
+               dev_mode = <2>;
+               name = "rkvdec";
+               status = "disabled";
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3366-pinctrl";
                rockchip,grf = <&grf>;