ARM64: dts: rk3366: enable vpu mmu

enable vpu mmu

Change-Id: I07d0c0e251d726b76110ecab0f3276ba4e97ee33
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
index 71701910901066712943ca3b0f2d31ab88633533..ac4ddd152b6b703afe833f92887fec13cfff7e5a 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
@@ -654,6 +654,14 @@
        status = "okay";
 };
 
+&vpu_mmu {
+       status = "okay";
+};
+
+&vdec_mmu {
+       status = "okay";
+};
+
 &vop_big {
        status = "okay";
        rockchip,prop = <PRMRY>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index b86c33f97dc4a1c930b82ee0a67d872018fd03e0..32ec3f50039f24d9e0d13f9b107fc622de4b8149 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -747,6 +747,25 @@
                status = "disabled";
        };
 
+       vpu_mmu: vpu_mmu {
+               dbgname = "vpu";
+               compatible = "rockchip,vpu_mmu";
+               reg = <0x0 0xff9a0800 0x0 0x100>;
+               interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vpu_mmu";
+               status = "disabled";
+       };
+
+       vdec_mmu: vdec_mmu {
+               dbgname = "vdec";
+               compatible = "rockchip,vdec_mmu";
+               reg = <0x0 0xff9b0480 0x0 0x40>,
+                     <0x0 0xff9b04c0 0x0 0x40>;
+               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vdec_mmu";
+               status = "disabled";
+       };
+
        dsihost0: mipi@ff960000 {
                compatible = "rockchip,rk3368-dsi";
                rockchip,prop = <0>;