dt/bindings: power: add RK3399 SoCs header for power-domain
authorElaine Zhang <zhangqing@rock-chips.com>
Mon, 14 Mar 2016 02:08:07 +0000 (10:08 +0800)
committerElaine Zhang <zhangqing@rock-chips.com>
Mon, 14 Mar 2016 02:08:07 +0000 (10:08 +0800)
According to a description from TRM, add all the power domains

Change-Id: Ibbf17fb1edc125358760db8acd99dd681913cd3c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
include/dt-bindings/power/rk3399-power.h [new file with mode: 0644]

diff --git a/include/dt-bindings/power/rk3399-power.h b/include/dt-bindings/power/rk3399-power.h
new file mode 100644 (file)
index 0000000..168b3bf
--- /dev/null
@@ -0,0 +1,53 @@
+#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
+#define __DT_BINDINGS_POWER_RK3399_POWER_H__
+
+/* VD_CORE_L */
+#define RK3399_PD_A53_L0       0
+#define RK3399_PD_A53_L1       1
+#define RK3399_PD_A53_L2       2
+#define RK3399_PD_A53_L3       3
+#define RK3399_PD_SCU_L                4
+
+/* VD_CORE_B */
+#define RK3399_PD_A72_B0       5
+#define RK3399_PD_A72_B1       6
+#define RK3399_PD_SCU_B                7
+
+/* VD_LOGIC */
+#define RK3399_PD_TCPD0                8
+#define RK3399_PD_TCPD1                9
+#define RK3399_PD_CCI          10
+#define RK3399_PD_CCI0         11
+#define RK3399_PD_CCI1         12
+#define RK3399_PD_PERILP       13
+#define RK3399_PD_PERIHP       14
+#define RK3399_PD_VIO          15
+#define RK3399_PD_VO           16
+#define RK3399_PD_VOPB         17
+#define RK3399_PD_VOPL         18
+#define RK3399_PD_ISP0         19
+#define RK3399_PD_ISP1         20
+#define RK3399_PD_HDCP         21
+#define RK3399_PD_GMAC         22
+#define RK3399_PD_EMMC         23
+#define RK3399_PD_USB3         24
+#define RK3399_PD_EDP          25
+#define RK3399_PD_GIC          26
+#define RK3399_PD_SD           27
+#define RK3399_PD_SDIOAUDIO    28
+#define RK3399_PD_ALIVE                29
+
+/* VD_CENTER */
+#define RK3399_PD_CENTER       30
+#define RK3399_PD_VCODEC       31
+#define RK3399_PD_VDU          32
+#define RK3399_PD_RGA          33
+#define RK3399_PD_IEP          34
+
+/* VD_GPU */
+#define RK3399_PD_GPU          35
+
+/* VD_PMU */
+#define RK3399_PD_PMU          36
+
+#endif