ARM64: dts: rk3399: add pinctrl for i2s spdif
authorSugar Zhang <sugar.zhang@rock-chips.com>
Fri, 11 Mar 2016 09:51:47 +0000 (17:51 +0800)
committerSugar Zhang <sugar.zhang@rock-chips.com>
Fri, 11 Mar 2016 09:51:47 +0000 (17:51 +0800)
Change-Id: I12ae87196180efadb6a8b16787b4815c42223970
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 3e697d590ec4934600de57cff5b7fb50e43630b4..fa6be22ca942eca9ae06f3dbe54ea90a43d216f1 100644 (file)
                reg = <0x0 0xff770000 0x0 0x10000>;
        };
 
+       spdif: spdif@ff870000 {
+               compatible = "rockchip,rk3399-spdif";
+               reg = <0x0 0xff870000 0x0 0x1000>;
+               interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+               dmas = <&dmac_bus 7>;
+               dma-names = "tx";
+               clock-names = "hclk", "mclk";
+               clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF_8CH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spdif_bus>;
+               status = "disabled";
+       };
+
        i2s0: i2s@ff880000 {
                compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
                reg = <0x0 0xff880000 0x0 0x1000>;
                dma-names = "tx", "rx";
                clock-names = "i2s_hclk", "i2s_clk";
                clocks = <&cru HCLK_I2S0_8CH>, <&cru SCLK_I2S0_8CH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2s0_8ch_bus>;
                status = "disabled";
        };
 
                dma-names = "tx", "rx";
                clock-names = "i2s_hclk", "i2s_clk";
                clocks = <&cru HCLK_I2S1_8CH>, <&cru SCLK_I2S1_8CH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2s1_2ch_bus>;
                status = "disabled";
        };
 
                        };
                };
 
+               spdif {
+                       spdif_bus: spdif-bus {
+                               rockchip,pins =
+                                       <4 21 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
                spi0 {
                        spi0_clk: spi0-clk {
                                rockchip,pins =