ARM64: dts: add usb2.0 dwc otg configuration for RK3368 sheep board
authorFrank Wang <frank.wang@rock-chips.com>
Mon, 22 Feb 2016 08:07:45 +0000 (16:07 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Wed, 24 Feb 2016 06:21:37 +0000 (14:21 +0800)
Change-Id: I01fd9671f89d9e61e2a59ac2272569ce8ebfd092
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts

index ffd3a1e..da3ba72 100644 (file)
 / {
        model = "Rockchip Sheep board";
        compatible = "rockchip,sheep", "rockchip,rk3368";
+
+       dwc_control_usb: dwc-control-usb {
+               compatible = "rockchip,rk3368-dwc-control-usb";
+               rockchip,grf = <&grf>;
+               interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "otg_id", "otg_bvalid",
+                                 "otg_linestate", "host0_linestate";
+               clocks = <&cru HCLK_USB_PERI>, <&cru SCLK_USBPHY480M>;
+               clock-names = "hclk_usb_peri", "usbphy_480m";
+
+               usb_bc {
+                       compatible = "inno,phy";
+                       regbase = &dwc_control_usb;
+                       rk_usb,bvalid     = <0x4bc 23 1>;
+                       rk_usb,iddig      = <0x4bc 26 1>;
+                       rk_usb,vdmsrcen   = <0x718 12 1>;
+                       rk_usb,vdpsrcen   = <0x718 11 1>;
+                       rk_usb,rdmpden    = <0x718 10 1>;
+                       rk_usb,idpsrcen   = <0x718  9 1>;
+                       rk_usb,idmsinken  = <0x718  8 1>;
+                       rk_usb,idpsinken  = <0x718  7 1>;
+                       rk_usb,dpattach   = <0x4b8 31 1>;
+                       rk_usb,cpdet      = <0x4b8 30 1>;
+                       rk_usb,dcpattach  = <0x4b8 29 1>;
+               };
+       };
 };
 
 &rt5640 {
 &gpu {
        logic-supply = <&vdd_logic>;
 };
+
+&dwc_control_usb {
+       host_drv_gpio = <&gpio0 4 GPIO_ACTIVE_LOW>;
+       otg_drv_gpio = <&gpio0 25 GPIO_ACTIVE_LOW>;
+
+       rockchip,remote_wakeup;
+       rockchip,usb_irq_wakeup;
+};
+
+&usb_otg {
+       clocks = <&cru SCLK_OTGPHY0>, <&cru HCLK_OTG0>;
+       clock-names = "sclk_otgphy0", "otg";
+       resets = <&cru SRST_USBOTG_AHB>,
+                <&cru SRST_USBOTG_PHY>,
+                <&cru SRST_USBOTG_CON>;
+       reset-names = "otg_ahb", "otg_phy", "otg_controller";
+       /* 0 - Normal, 1 - Force Host, 2 - Force Device */
+       rockchip,usb-mode = <0>;
+       status = "okay";
+};