drm/bridge: dw_hdmi: set vdisplay for frame packing 3d mode
authoralgea.cao <algea.cao@rock-chips.com>
Mon, 27 Mar 2017 08:34:35 +0000 (16:34 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Sat, 1 Apr 2017 02:55:27 +0000 (10:55 +0800)
This patch is only applicable to 3d frame packing
of progressive mode.
According to HDMI Specification 1.4b 8.2.3.2,
vertical toatal line is x2 of 2D vertical toatal line
and pixel clock frequency is x2 of 2D pixel clock frequency.

vdisplay += vtotal
mpixelclock *= 2

Change-Id: I097c25cd1a930635e33f0a7bc86797ad1c7ed607
Signed-off-by: algea.cao <algea.cao@rock-chips.com>
drivers/gpu/drm/bridge/dw-hdmi.c

index e909262fd57513ce7830e2ae551586aaff9e7be1..d05e1095a0ec5673b86f1fba66b45d8b55226869 100644 (file)
@@ -1505,6 +1505,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
        vmode->mpixelclock = mode->crtc_clock * 1000;
        if (mode->flags & DRM_MODE_FLAG_420_MASK)
                vmode->mpixelclock /= 2;
+       if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
+               DRM_MODE_FLAG_3D_FRAME_PACKING)
+               vmode->mpixelclock *= 2;
        dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);
 
        /* Set up HDMI_FC_INVIDCONF
@@ -1576,6 +1579,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
                vblank /= 2;
                v_de_vs /= 2;
                vsync_len /= 2;
+       } else if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
+               DRM_MODE_FLAG_3D_FRAME_PACKING) {
+               vdisplay += mode->vtotal;
        }
 
        /* Scrambling Control */