arm64: dts: rockchip: add otg-port node of usb2-phy for rk3328 dwc2

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 60ff14a935071013aa41c851150868011bc0a827..6171fade725ee07f96b92cb950c7aeda31fba6e0 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -388,6 +388,51 @@
                status = "disabled";
        };
 
+       pwm0: pwm@ff1b0000 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0000 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm0_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
+       pwm1: pwm@ff1b0010 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0010 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm1_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
+       pwm2: pwm@ff1b0020 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0020 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm2_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
+       pwm3: pwm@ff1b0030 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0030 0x0 0x10>;
+               interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwmir_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
        amba {
                compatible = "simple-bus";
                #address-cells = <2>;
@@ -503,6 +548,16 @@
                                interrupt-names = "linestate";
                                status = "disabled";
                        };
+
+                       u2phy_otg: otg-port {
+                               #phy-cells = <0>;
+                               interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "otg-bvalid", "otg-id",
+                                                 "linestate";
+                               status = "disabled";
+                       };
                };
        };
 
@@ -611,6 +666,8 @@
                g-rx-fifo-size = <275>;
                g-tx-fifo-size = <256 128 128 64 64 32>;
                g-use-dma;
+               phys = <&u2phy_otg>;
+               phy-names = "usb2-phy";
                status = "disabled";
        };