1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.c $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
13 * with Synopsys or any supplement thereto. You are permitted to use and
14 * redistribute this Software in source and binary forms, with or without
15 * modification, provided that redistributions of source code must retain this
16 * notice. You may not view, use, disclose, copy or distribute this file or
17 * any information contained herein except pursuant to this license grant from
18 * Synopsys. If you do not agree with this notice, including the disclaimer
19 * below, then you are not authorized to use the Software.
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
35 * The dwc_otg_driver module provides the initialization and cleanup entry
36 * points for the DWC_otg driver. This module will be dynamically installed
37 * after Linux is booted using the insmod command. When the module is
38 * installed, the dwc_otg_driver_init function is called. When the module is
39 * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
41 * This module also defines a data structure for the dwc_otg_driver, which is
42 * used in conjunction with the standard ARM lm_device structure. These
43 * structures allow the OTG driver to comply with the standard Linux driver
44 * model in which devices and drivers are registered with a bus driver. This
45 * has the benefit that Linux can expose attributes of the driver and device
46 * in its special sysfs file system. Users can then read or write files in
47 * this file system to perform diagnostics on the driver components or the
51 #include "dwc_otg_os_dep.h"
52 #include "common_port/dwc_os.h"
53 #include "dwc_otg_dbg.h"
54 #include "dwc_otg_driver.h"
55 #include "dwc_otg_attr.h"
56 #include "dwc_otg_core_if.h"
57 #include "dwc_otg_pcd_if.h"
58 #include "dwc_otg_hcd_if.h"
59 #include "dwc_otg_cil.h"
60 #include "dwc_otg_pcd.h"
62 #include "usbdev_rk.h"
64 #define DWC_DRIVER_VERSION "3.10a 21-DEC-2012"
65 #define DWC_DRIVER_DESC "HS OTG USB Controller driver"
67 static const char dwc_host20_driver_name[] = "usb20_host";
68 static const char dwc_otg20_driver_name[] = "usb20_otg";
70 dwc_otg_device_t* g_otgdev = NULL;
72 extern int pcd_init( struct platform_device *_dev );
73 extern int otg20_hcd_init( struct platform_device *_dev );
74 extern int host20_hcd_init( struct platform_device *_dev );
75 extern int pcd_remove( struct platform_device *_dev );
76 extern void hcd_remove( struct platform_device *_dev);
77 extern void dwc_otg_adp_start( dwc_otg_core_if_t * core_if, uint8_t is_host);
79 #ifdef CONFIG_USB20_OTG
80 static struct usb20otg_pdata_id usb20otg_pdata[] = {
82 .name = "rk3188-usb20otg",
83 .pdata = &usb20otg_pdata_rk3188,
86 .name = "rk3288-usb20otg",
87 .pdata = &usb20otg_pdata_rk3288,
93 #ifdef CONFIG_USB20_HOST
94 static struct usb20host_pdata_id usb20host_pdata[] = {
96 .name = "rk3188-usb20host",
97 .pdata = &usb20host_pdata_rk3188,
100 .name = "rk3288-usb20host",
101 .pdata = &usb20host_pdata_rk3288,
107 /*-------------------------------------------------------------------------*/
108 /* Encapsulate the module parameter settings */
110 struct dwc_otg_driver_module_params {
114 int32_t dma_desc_enable;
115 int32_t dma_burst_size;
117 int32_t host_support_fs_ls_low_power;
118 int32_t host_ls_low_power_phy_clk;
119 int32_t enable_dynamic_fifo;
120 int32_t data_fifo_size;
121 int32_t dev_rx_fifo_size;
122 int32_t dev_nperio_tx_fifo_size;
123 uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS];
124 int32_t host_rx_fifo_size;
125 int32_t host_nperio_tx_fifo_size;
126 int32_t host_perio_tx_fifo_size;
127 int32_t max_transfer_size;
128 int32_t max_packet_count;
129 int32_t host_channels;
130 int32_t dev_endpoints;
132 int32_t phy_utmi_width;
133 int32_t phy_ulpi_ddr;
134 int32_t phy_ulpi_ext_vbus;
138 int32_t en_multiple_tx_fifo;
139 uint32_t dev_tx_fifo_size[MAX_TX_FIFOS];
141 uint32_t tx_thr_length;
142 uint32_t rx_thr_length;
147 int32_t baseline_besl;
150 int32_t ahb_thr_ratio;
160 static struct dwc_otg_driver_module_params dwc_otg_module_params = {
162 .otg_cap = DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE,
164 .dma_desc_enable = 0,
165 .dma_burst_size = -1,
167 .host_support_fs_ls_low_power = -1,
168 .host_ls_low_power_phy_clk = -1,
169 .enable_dynamic_fifo = 1,
170 .data_fifo_size = -1,
171 .dev_rx_fifo_size = 0x120,
172 .dev_nperio_tx_fifo_size = 0x10,
173 .dev_perio_tx_fifo_size = {
174 /* dev_perio_tx_fifo_size_1 */
192 .host_rx_fifo_size = -1,
193 .host_nperio_tx_fifo_size = -1,
194 .host_perio_tx_fifo_size = -1,
195 .max_transfer_size = -1,
196 .max_packet_count = -1,
200 .phy_utmi_width = -1,
202 .phy_ulpi_ext_vbus = -1,
206 .en_multiple_tx_fifo = -1,
207 .dev_tx_fifo_size = {
208 /* dev_tx_fifo_size */
246 #ifdef CONFIG_USB20_HOST
247 static struct dwc_otg_driver_module_params dwc_host_module_params = {
249 .otg_cap = DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE,
251 .dma_desc_enable = 0,
252 .dma_burst_size = -1,
254 .host_support_fs_ls_low_power = -1,
255 .host_ls_low_power_phy_clk = -1,
256 .enable_dynamic_fifo = -1,
257 .data_fifo_size = -1,
258 .dev_rx_fifo_size = -1,
259 .dev_nperio_tx_fifo_size = -1,
260 .dev_perio_tx_fifo_size = {
261 /* dev_perio_tx_fifo_size_1 */
279 .host_rx_fifo_size = -1,
280 .host_nperio_tx_fifo_size = -1,
281 .host_perio_tx_fifo_size = -1,
282 .max_transfer_size = -1,
283 .max_packet_count = -1,
287 .phy_utmi_width = -1,
289 .phy_ulpi_ext_vbus = -1,
293 .en_multiple_tx_fifo = -1,
294 .dev_tx_fifo_size = {
295 /* dev_tx_fifo_size */
335 * This function shows the Driver Version.
337 static ssize_t version_show(struct device_driver *dev, char *buf)
339 return snprintf(buf, sizeof(DWC_DRIVER_VERSION) + 2, "%s\n",
343 static DRIVER_ATTR(version, S_IRUGO, version_show, NULL);
346 * Global Debug Level Mask.
348 uint32_t g_dbg_lvl = DBG_OFF; /* OFF */
351 * This function shows the driver Debug Level.
353 static ssize_t dbg_level_show(struct device_driver *drv, char *buf)
355 return sprintf(buf, "0x%0x\n", g_dbg_lvl);
359 * This function stores the driver Debug Level.
361 static ssize_t dbg_level_store(struct device_driver *drv, const char *buf,
364 g_dbg_lvl = simple_strtoul(buf, NULL, 16);
368 static DRIVER_ATTR(debuglevel, S_IRUGO | S_IWUSR, dbg_level_show,
371 extern void hcd_start(dwc_otg_core_if_t *core_if);
372 extern void hub_disconnect_device(struct usb_hub *hub);
374 void dwc_otg_force_host(dwc_otg_core_if_t *core_if)
376 dwc_otg_device_t *otg_dev = core_if->otg_dev;
377 dctl_data_t dctl = {.d32=0};
380 if(core_if->op_state == A_HOST)
382 printk("dwc_otg_force_host,already in A_HOST mode,everest\n");
385 core_if->op_state = A_HOST;
387 cancel_delayed_work(&otg_dev->pcd->check_vbus_work);
388 dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl);
389 dctl.b.sftdiscon = 1;
390 DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32);
392 local_irq_save(flags);
393 cil_pcd_stop(core_if);
395 * Initialize the Core for Host mode.
398 dwc_otg_core_init(core_if);
399 dwc_otg_enable_global_interrupts(core_if);
400 cil_hcd_start(core_if);
401 local_irq_restore(flags);
403 void dwc_otg_force_device(dwc_otg_core_if_t *core_if)
405 dwc_otg_device_t *otg_dev = core_if->otg_dev;
408 local_irq_save(flags);
410 if(core_if->op_state == B_PERIPHERAL) {
411 printk("dwc_otg_force_device,already in B_PERIPHERAL,everest\n");
414 core_if->op_state = B_PERIPHERAL;
415 cil_hcd_stop(core_if);
416 //hub_disconnect_device(g_root_hub20);
417 otg_dev->pcd->phy_suspend = 1;
418 otg_dev->pcd->vbus_status = 0;
419 dwc_otg_pcd_start_check_vbus_work(otg_dev->pcd);
421 /* Reset the Controller */
422 dwc_otg_core_reset( core_if );
424 dwc_otg_core_init(core_if);
425 dwc_otg_disable_global_interrupts(core_if);
426 cil_pcd_start(core_if);
428 local_irq_restore(flags);
430 static void dwc_otg_set_force_mode(dwc_otg_core_if_t *core_if, int mode)
432 gusbcfg_data_t usbcfg = { .d32 = 0 };
433 printk("!!!dwc_otg_set_force_mode\n");
434 usbcfg.d32 = DWC_READ_REG32( &core_if->core_global_regs->gusbcfg);
436 case USB_MODE_FORCE_HOST:
437 usbcfg.b.force_host_mode = 1;
438 usbcfg.b.force_dev_mode = 0;
440 case USB_MODE_FORCE_DEVICE:
441 usbcfg.b.force_host_mode = 0;
442 usbcfg.b.force_dev_mode = 1;
444 case USB_MODE_NORMAL:
445 usbcfg.b.force_host_mode = 0;
446 usbcfg.b.force_dev_mode = 0;
449 DWC_WRITE_REG32( &core_if->core_global_regs->gusbcfg, usbcfg.d32 );
452 static ssize_t force_usb_mode_show(struct device_driver *drv, char *buf)
454 dwc_otg_device_t *otg_dev = g_otgdev;
455 dwc_otg_core_if_t *core_if = otg_dev->core_if;
457 return sprintf(buf, "%d\n", core_if->usb_mode);
460 static ssize_t force_usb_mode_store(struct device_driver *drv, const char *buf,
463 int new_mode = simple_strtoul(buf, NULL, 16);
464 dwc_otg_device_t *otg_dev = g_otgdev;
469 dwc_otg_core_if_t *core_if = otg_dev->core_if;
470 struct dwc_otg_platform_data *pldata = otg_dev->pldata;
472 DWC_PRINTF("%s %d->%d\n",__func__, core_if->usb_mode, new_mode);
474 if(core_if->usb_mode == new_mode) {
478 if(pldata->phy_status == USB_PHY_SUSPEND) {
479 pldata->clock_enable(pldata, 1);
480 pldata->phy_suspend(pldata, USB_PHY_ENABLED);
484 case USB_MODE_FORCE_HOST:
485 if(USB_MODE_FORCE_DEVICE == core_if->usb_mode) {
487 core_if->usb_mode = new_mode;
488 dwc_otg_force_host(core_if);
489 } else if(USB_MODE_NORMAL == core_if->usb_mode) {
490 core_if->usb_mode = new_mode;
491 if(dwc_otg_is_host_mode(core_if)) {
492 dwc_otg_set_force_mode(core_if, new_mode);
494 dwc_otg_force_host(core_if);
499 case USB_MODE_FORCE_DEVICE:
500 if(USB_MODE_FORCE_HOST == core_if->usb_mode) {
501 core_if->usb_mode = new_mode;
502 dwc_otg_force_device(core_if);
503 } else if(USB_MODE_NORMAL == core_if->usb_mode) {
504 core_if->usb_mode = new_mode;
505 if(dwc_otg_is_device_mode(core_if)) {
506 dwc_otg_set_force_mode(core_if, new_mode);
508 dwc_otg_force_device(core_if);
513 case USB_MODE_NORMAL:
514 if(USB_MODE_FORCE_DEVICE == core_if->usb_mode) {
515 core_if->usb_mode = new_mode;
516 cancel_delayed_work(&otg_dev->pcd->check_vbus_work);
517 dwc_otg_set_force_mode(core_if, new_mode);
519 if(dwc_otg_is_host_mode(core_if)) {
520 dwc_otg_force_host(core_if);
522 dwc_otg_pcd_start_check_vbus_work(otg_dev->pcd);
524 } else if(USB_MODE_FORCE_HOST == core_if->usb_mode) {
525 core_if->usb_mode = new_mode;
526 dwc_otg_set_force_mode(core_if, new_mode);
528 if(dwc_otg_is_device_mode(core_if)) {
529 dwc_otg_force_device(core_if);
540 static DRIVER_ATTR(force_usb_mode, S_IRUGO | S_IWUSR, force_usb_mode_show, force_usb_mode_store);
543 static ssize_t dwc_otg_conn_en_show(struct device_driver *_drv, char *_buf)
546 dwc_otg_device_t *otg_dev = g_otgdev;
547 dwc_otg_pcd_t *_pcd = otg_dev->pcd;
548 return sprintf (_buf, "%d\n", _pcd->conn_en);
552 static ssize_t dwc_otg_conn_en_store(struct device_driver *_drv, const char *_buf,
555 int enable = simple_strtoul(_buf, NULL, 10);
556 dwc_otg_device_t *otg_dev = g_otgdev;
557 dwc_otg_pcd_t *_pcd = otg_dev->pcd;
558 DWC_PRINTF("%s %d->%d\n",__func__, _pcd->conn_en, enable);
560 _pcd->conn_en = enable;
563 static DRIVER_ATTR(dwc_otg_conn_en, S_IRUGO|S_IWUSR, dwc_otg_conn_en_show, dwc_otg_conn_en_store);
565 static ssize_t vbus_status_show(struct device_driver *_drv, char *_buf)
567 dwc_otg_device_t *otg_dev = g_otgdev;
568 dwc_otg_pcd_t *_pcd = otg_dev->pcd;
569 return sprintf (_buf, "%d\n", _pcd->vbus_status);
571 static DRIVER_ATTR(vbus_status, S_IRUGO, vbus_status_show, NULL);
574 * This function is called during module intialization
575 * to pass module parameters to the DWC_OTG CORE.
577 static int set_parameters(dwc_otg_core_if_t * core_if, struct dwc_otg_driver_module_params module_params)
582 if (module_params.otg_cap != -1) {
584 dwc_otg_set_param_otg_cap(core_if,
585 module_params.otg_cap);
587 if (module_params.dma_enable != -1) {
589 dwc_otg_set_param_dma_enable(core_if,
593 if (module_params.dma_desc_enable != -1) {
595 dwc_otg_set_param_dma_desc_enable(core_if,
599 if (module_params.opt != -1) {
601 dwc_otg_set_param_opt(core_if, module_params.opt);
603 if (module_params.dma_burst_size != -1) {
605 dwc_otg_set_param_dma_burst_size(core_if,
609 if (module_params.host_support_fs_ls_low_power != -1) {
611 dwc_otg_set_param_host_support_fs_ls_low_power(core_if,
613 host_support_fs_ls_low_power);
615 if (module_params.enable_dynamic_fifo != -1) {
617 dwc_otg_set_param_enable_dynamic_fifo(core_if,
619 enable_dynamic_fifo);
621 if (module_params.data_fifo_size != -1) {
623 dwc_otg_set_param_data_fifo_size(core_if,
627 if (module_params.dev_rx_fifo_size != -1) {
629 dwc_otg_set_param_dev_rx_fifo_size(core_if,
633 if (module_params.dev_nperio_tx_fifo_size != -1) {
635 dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if,
637 dev_nperio_tx_fifo_size);
639 if (module_params.host_rx_fifo_size != -1) {
641 dwc_otg_set_param_host_rx_fifo_size(core_if,
642 module_params.host_rx_fifo_size);
644 if (module_params.host_nperio_tx_fifo_size != -1) {
646 dwc_otg_set_param_host_nperio_tx_fifo_size(core_if,
648 host_nperio_tx_fifo_size);
650 if (module_params.host_perio_tx_fifo_size != -1) {
652 dwc_otg_set_param_host_perio_tx_fifo_size(core_if,
654 host_perio_tx_fifo_size);
656 if (module_params.max_transfer_size != -1) {
658 dwc_otg_set_param_max_transfer_size(core_if,
662 if (module_params.max_packet_count != -1) {
664 dwc_otg_set_param_max_packet_count(core_if,
668 if (module_params.host_channels != -1) {
670 dwc_otg_set_param_host_channels(core_if,
674 if (module_params.dev_endpoints != -1) {
676 dwc_otg_set_param_dev_endpoints(core_if,
680 if (module_params.phy_type != -1) {
682 dwc_otg_set_param_phy_type(core_if,
683 module_params.phy_type);
685 if (module_params.speed != -1) {
687 dwc_otg_set_param_speed(core_if,
688 module_params.speed);
690 if (module_params.host_ls_low_power_phy_clk != -1) {
692 dwc_otg_set_param_host_ls_low_power_phy_clk(core_if,
694 host_ls_low_power_phy_clk);
696 if (module_params.phy_ulpi_ddr != -1) {
698 dwc_otg_set_param_phy_ulpi_ddr(core_if,
702 if (module_params.phy_ulpi_ext_vbus != -1) {
704 dwc_otg_set_param_phy_ulpi_ext_vbus(core_if,
708 if (module_params.phy_utmi_width != -1) {
710 dwc_otg_set_param_phy_utmi_width(core_if,
714 if (module_params.ulpi_fs_ls != -1) {
716 dwc_otg_set_param_ulpi_fs_ls(core_if,
717 module_params.ulpi_fs_ls);
719 if (module_params.ts_dline != -1) {
721 dwc_otg_set_param_ts_dline(core_if,
722 module_params.ts_dline);
724 if (module_params.i2c_enable != -1) {
726 dwc_otg_set_param_i2c_enable(core_if,
730 if (module_params.en_multiple_tx_fifo != -1) {
732 dwc_otg_set_param_en_multiple_tx_fifo(core_if,
734 en_multiple_tx_fifo);
736 for (i = 0; i < 15; i++) {
737 if (module_params.dev_perio_tx_fifo_size[i] != -1) {
739 dwc_otg_set_param_dev_perio_tx_fifo_size(core_if,
741 dev_perio_tx_fifo_size
746 for (i = 0; i < 15; i++) {
747 if (module_params.dev_tx_fifo_size[i] != -1) {
748 retval += dwc_otg_set_param_dev_tx_fifo_size(core_if,
754 if (module_params.thr_ctl != -1) {
756 dwc_otg_set_param_thr_ctl(core_if,
757 module_params.thr_ctl);
759 if (module_params.mpi_enable != -1) {
761 dwc_otg_set_param_mpi_enable(core_if,
765 if (module_params.pti_enable != -1) {
767 dwc_otg_set_param_pti_enable(core_if,
771 if (module_params.lpm_enable != -1) {
773 dwc_otg_set_param_lpm_enable(core_if,
777 if (module_params.besl_enable != -1) {
779 dwc_otg_set_param_besl_enable(core_if,
783 if (module_params.baseline_besl != -1) {
785 dwc_otg_set_param_baseline_besl(core_if,
789 if (module_params.deep_besl != -1) {
791 dwc_otg_set_param_deep_besl(core_if,
795 if (module_params.ic_usb_cap != -1) {
797 dwc_otg_set_param_ic_usb_cap(core_if,
801 if (module_params.tx_thr_length != -1) {
803 dwc_otg_set_param_tx_thr_length(core_if,
804 module_params.tx_thr_length);
806 if (module_params.rx_thr_length != -1) {
808 dwc_otg_set_param_rx_thr_length(core_if,
812 if (module_params.ahb_thr_ratio != -1) {
814 dwc_otg_set_param_ahb_thr_ratio(core_if,
815 module_params.ahb_thr_ratio);
817 if (module_params.power_down != -1) {
819 dwc_otg_set_param_power_down(core_if,
820 module_params.power_down);
822 if (module_params.reload_ctl != -1) {
824 dwc_otg_set_param_reload_ctl(core_if,
825 module_params.reload_ctl);
828 if (module_params.dev_out_nak != -1) {
830 dwc_otg_set_param_dev_out_nak(core_if,
831 module_params.dev_out_nak);
834 if (module_params.cont_on_bna != -1) {
836 dwc_otg_set_param_cont_on_bna(core_if,
837 module_params.cont_on_bna);
840 if (module_params.ahb_single != -1) {
842 dwc_otg_set_param_ahb_single(core_if,
843 module_params.ahb_single);
846 if (module_params.otg_ver != -1) {
848 dwc_otg_set_param_otg_ver(core_if,
849 module_params.otg_ver);
851 if (module_params.adp_enable != -1) {
853 dwc_otg_set_param_adp_enable(core_if,
861 * This function is the top level interrupt handler for the Common
862 * (Device and host modes) interrupts.
864 static irqreturn_t dwc_otg_common_irq(int irq, void *dev)
866 int32_t retval = IRQ_NONE;
868 retval = dwc_otg_handle_common_intr(dev);
870 //S3C2410X_CLEAR_EINTPEND();
872 return IRQ_RETVAL(retval);
875 #ifdef CONFIG_USB20_HOST
877 * This function is called when a lm_device is unregistered with the
878 * dwc_otg_driver. This happens, for example, when the rmmod command is
879 * executed. The device may or may not be electrically present. If it is
880 * present, the driver stops device processing. Any resources used on behalf
881 * of this device are freed.
885 static int host20_driver_remove( struct platform_device *_dev )
888 dwc_otg_device_t *otg_dev = dwc_get_device_platform_data(_dev);
889 DWC_DEBUGPL(DBG_ANY, "%s(%p)\n", __func__, _dev);
892 /* Memory allocation for the dwc_otg_device failed. */
893 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
897 #ifndef DWC_DEVICE_ONLY
901 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
906 #ifndef DWC_HOST_ONLY
910 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->pcd NULL!\n", __func__);
918 if (otg_dev->common_irq_installed) {
919 //free_irq(_dev->irq, otg_dev);
920 free_irq(platform_get_irq(_dev,0), otg_dev );
922 DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__);
926 if (otg_dev->core_if) {
927 dwc_otg_cil_remove(otg_dev->core_if);
929 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->core_if NULL!\n", __func__);
934 * Remove the device attributes
936 dwc_otg_attr_remove(_dev);
941 if (otg_dev->os_dep.base) {
942 iounmap(otg_dev->os_dep.base);
947 * Clear the drvdata pointer.
950 dwc_set_device_platform_data(_dev, 0);
955 static const struct of_device_id usb20_host_of_match[] = {
957 .compatible = "rockchip,rk3188_usb20_host",
958 .data = &usb20host_pdata[RK3188_USB_CTLR],
961 .compatible = "rockchip,rk3288_usb20_host",
962 .data = &usb20host_pdata[RK3288_USB_CTLR],
966 MODULE_DEVICE_TABLE(of, usb20_host_of_match);
969 * This function is called when an lm_device is bound to a
970 * dwc_otg_driver. It creates the driver components required to
971 * control the device (CIL, HCD, and PCD) and it initializes the
972 * device. The driver components are stored in a dwc_otg_device
973 * structure. A reference to the dwc_otg_device is saved in the
974 * lm_device. This allows the driver to access the dwc_otg_device
975 * structure on subsequent calls to driver methods for this device.
977 * @param _dev Bus device
979 static int host20_driver_probe(struct platform_device *_dev)
983 struct resource *res_base;
984 dwc_otg_device_t *dwc_otg_device;
985 struct device *dev = &_dev->dev;
986 struct device_node *node = _dev->dev.of_node;
987 struct dwc_otg_platform_data *pldata;
988 struct usb20host_pdata_id *p;
989 const struct of_device_id *match =
990 of_match_device(of_match_ptr( usb20_host_of_match ), &_dev->dev);
993 p = (struct usb20host_pdata_id *)match->data;
995 dev_err(dev, "usb20host match failed\n");
999 dev->platform_data = p->pdata;
1000 pldata = dev->platform_data;
1004 dev_err(dev, "device node not found\n");
1011 if(pldata->clock_init){
1012 pldata->clock_init(pldata);
1013 pldata->clock_enable(pldata, 1);
1016 if(pldata->phy_suspend)
1017 pldata->phy_suspend(pldata, USB_PHY_ENABLED);
1019 if(pldata->soft_reset)
1020 pldata->soft_reset();
1022 res_base=platform_get_resource(_dev, IORESOURCE_MEM, 0);
1024 dwc_otg_device = DWC_ALLOC(sizeof(dwc_otg_device_t));
1026 if (!dwc_otg_device) {
1027 dev_err(&_dev->dev, "kmalloc of dwc_otg_device failed\n");
1032 memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
1033 dwc_otg_device->os_dep.reg_offset = 0xFFFFFFFF;
1036 * Map the DWC_otg Core memory into virtual address space.
1039 dwc_otg_device->os_dep.base = devm_ioremap_resource(dev, res_base);
1041 if (!dwc_otg_device->os_dep.base) {
1042 dev_err(&_dev->dev, "ioremap() failed\n");
1043 DWC_FREE(dwc_otg_device);
1047 dev_dbg(&_dev->dev, "base=0x%08x\n",
1048 (unsigned)dwc_otg_device->os_dep.base);
1051 * Initialize driver data to point to the global DWC_otg
1055 dwc_set_device_platform_data(_dev, dwc_otg_device);
1056 pldata->privdata = dwc_otg_device;
1057 dwc_otg_device->pldata = (void *)pldata;
1059 dev_dbg(&_dev->dev, "dwc_otg_device=0x%p\n", dwc_otg_device);
1061 dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->os_dep.base);
1064 if (!dwc_otg_device->core_if) {
1065 dev_err(&_dev->dev, "CIL initialization failed!\n");
1070 dwc_otg_device->core_if->otg_dev= dwc_otg_device;
1073 * Attempt to ensure this device is really a DWC_otg Controller.
1074 * Read and verify the SNPSID register contents. The value should be
1075 * 0x45F42XXX or 0x45F42XXX, which corresponds to either "OT2" or "OTG3",
1076 * as in "OTG version 2.XX" or "OTG version 3.XX".
1079 if (((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F542000) &&
1080 ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F543000)) {
1081 dev_err(&_dev->dev, "Bad value for SNPSID: 0x%08x\n",
1082 dwc_otg_get_gsnpsid(dwc_otg_device->core_if));
1088 * Validate parameter values.
1090 if (set_parameters(dwc_otg_device->core_if ,dwc_host_module_params )) {
1096 * Create Device Attributes in sysfs
1098 dwc_otg_attr_create(_dev);
1101 * Disable the global interrupt until all the interrupt
1102 * handlers are installed.
1104 dwc_otg_disable_global_interrupts(dwc_otg_device->core_if);
1107 * Install the interrupt handler for the common interrupts before
1108 * enabling common interrupts in core_init below.
1110 irq = platform_get_irq(_dev,0);
1111 DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n",
1113 retval = request_irq(irq, dwc_otg_common_irq,
1114 IRQF_SHARED , "dwc_otg",
1117 DWC_ERROR("request of irq%d failed\n", irq);
1121 dwc_otg_device->common_irq_installed = 1;
1125 * Initialize the DWC_otg core.
1127 dwc_otg_core_init(dwc_otg_device->core_if);
1130 * Initialize the HCD
1132 retval = host20_hcd_init(_dev);
1134 DWC_ERROR("hcd_init failed\n");
1135 dwc_otg_device->hcd = NULL;
1140 * Enable the global interrupt after all the interrupt
1141 * handlers are installed if there is no ADP support else
1142 * perform initial actions required for Internal ADP logic.
1144 if (!dwc_otg_get_param_adp_enable(dwc_otg_device->core_if))
1145 dwc_otg_enable_global_interrupts(dwc_otg_device->core_if);
1147 dwc_otg_adp_start(dwc_otg_device->core_if,
1148 dwc_otg_is_host_mode(dwc_otg_device->core_if));
1153 host20_driver_remove(_dev);
1155 if(pldata->clock_enable)
1156 pldata->clock_enable(pldata, 0);
1162 static int dwc_otg_driver_suspend(struct platform_device *_dev , pm_message_t state )
1167 static int dwc_otg_driver_resume(struct platform_device *_dev )
1172 static void dwc_otg_driver_shutdown(struct platform_device *_dev )
1174 struct device *dev = &_dev->dev;
1175 dwc_otg_device_t *otg_dev = dev->platform_data;
1176 dwc_otg_core_if_t *core_if = otg_dev->core_if;
1177 dctl_data_t dctl = {.d32=0};
1179 DWC_PRINTF("%s: disconnect USB %s mode\n" , __func__ ,
1180 dwc_otg_is_host_mode(core_if) ? "host" : "device");
1181 if(dwc_otg_is_host_mode(core_if))
1183 if (core_if->hcd_cb && core_if->hcd_cb->stop)
1185 core_if->hcd_cb->stop( core_if->hcd_cb_p);
1190 /* soft disconnect */
1191 dctl.d32 = DWC_READ_REG32( &core_if->dev_if->dev_global_regs->dctl );
1192 dctl.b.sftdiscon = 1;
1193 DWC_WRITE_REG32( &core_if->dev_if->dev_global_regs->dctl, dctl.d32 );
1195 /* Clear any pending interrupts */
1196 DWC_WRITE_REG32( &core_if->core_global_regs->gintsts, 0xFFFFFFFF);
1202 * This structure defines the methods to be called by a bus driver
1203 * during the lifecycle of a device on that bus. Both drivers and
1204 * devices are registered with a bus driver. The bus driver matches
1205 * devices to drivers based on information in the device and driver
1208 * The probe function is called when the bus driver matches a device
1209 * to this driver. The remove function is called when a device is
1210 * unregistered with the bus driver.
1212 #ifdef CONFIG_USB20_HOST
1213 static struct platform_driver dwc_host_driver = {
1215 .name = (char *)dwc_host20_driver_name,
1216 .of_match_table = of_match_ptr(usb20_host_of_match),
1218 .probe = host20_driver_probe,
1219 .remove = host20_driver_remove,
1220 .suspend = dwc_otg_driver_suspend,
1221 .resume = dwc_otg_driver_resume,
1225 #ifdef CONFIG_USB20_OTG
1227 * This function is called when a lm_device is unregistered with the
1228 * dwc_otg_driver. This happens, for example, when the rmmod command is
1229 * executed. The device may or may not be electrically present. If it is
1230 * present, the driver stops device processing. Any resources used on behalf
1231 * of this device are freed.
1235 static int otg20_driver_remove( struct platform_device *_dev )
1238 dwc_otg_device_t *otg_dev = dwc_get_device_platform_data(_dev);
1239 DWC_DEBUGPL(DBG_ANY, "%s(%p)\n", __func__, _dev);
1242 /* Memory allocation for the dwc_otg_device failed. */
1243 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
1246 #ifndef DWC_DEVICE_ONLY
1250 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
1255 #ifndef DWC_HOST_ONLY
1259 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->pcd NULL!\n", __func__);
1266 if (otg_dev->common_irq_installed) {
1267 //free_irq(_dev->irq, otg_dev);
1268 free_irq(platform_get_irq(_dev,0), otg_dev );
1270 DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__);
1274 if (otg_dev->core_if) {
1275 dwc_otg_cil_remove(otg_dev->core_if);
1277 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->core_if NULL!\n", __func__);
1282 * Remove the device attributes
1284 dwc_otg_attr_remove(_dev);
1287 * Return the memory.
1289 if (otg_dev->os_dep.base) {
1290 iounmap(otg_dev->os_dep.base);
1295 * Clear the drvdata pointer.
1298 dwc_set_device_platform_data(_dev, 0);
1303 static const struct of_device_id usb20_otg_of_match[] = {
1305 .compatible = "rockchip,rk3188_usb20_otg",
1306 .data = &usb20otg_pdata[RK3188_USB_CTLR],
1309 .compatible = "rockchip,rk3288_usb20_otg",
1310 .data = &usb20otg_pdata[RK3288_USB_CTLR],
1315 MODULE_DEVICE_TABLE(of, usb20_otg_of_match);
1318 * This function is called when an lm_device is bound to a
1319 * dwc_otg_driver. It creates the driver components required to
1320 * control the device (CIL, HCD, and PCD) and it initializes the
1321 * device. The driver components are stored in a dwc_otg_device
1322 * structure. A reference to the dwc_otg_device is saved in the
1323 * lm_device. This allows the driver to access the dwc_otg_device
1324 * structure on subsequent calls to driver methods for this device.
1326 * @param _dev Bus device
1328 static int otg20_driver_probe(struct platform_device *_dev)
1332 struct resource *res_base;
1333 dwc_otg_device_t *dwc_otg_device;
1334 struct device *dev = &_dev->dev;
1335 struct device_node *node = _dev->dev.of_node;
1336 struct dwc_otg_platform_data *pldata;
1337 struct usb20otg_pdata_id *p;
1338 const struct of_device_id *match =
1339 of_match_device(of_match_ptr( usb20_otg_of_match ), &_dev->dev);
1342 p = (struct usb20otg_pdata_id *)match->data;
1344 dev_err(dev, "usb20otg match failed\n");
1348 dev->platform_data = p->pdata;
1349 // dev->platform_data = &usb20otg_pdata;
1350 pldata = dev->platform_data;
1354 dev_err(dev, "device node not found\n");
1357 /*todo : move to usbdev_rk-XX.c*/
1361 if(pldata->clock_init){
1362 pldata->clock_init(pldata);
1363 pldata->clock_enable(pldata, 1);
1366 if(pldata->phy_suspend)
1367 pldata->phy_suspend(pldata, USB_PHY_ENABLED);
1368 if(pldata->dwc_otg_uart_mode)
1369 pldata->dwc_otg_uart_mode(pldata, PHY_USB_MODE);
1370 if(pldata->soft_reset)
1371 pldata->soft_reset();
1374 res_base=platform_get_resource(_dev, IORESOURCE_MEM, 0);
1376 dwc_otg_device = DWC_ALLOC(sizeof(dwc_otg_device_t));
1378 if (!dwc_otg_device) {
1379 dev_err(&_dev->dev, "kmalloc of dwc_otg_device failed\n");
1384 memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
1385 dwc_otg_device->os_dep.reg_offset = 0xFFFFFFFF;
1388 * Map the DWC_otg Core memory into virtual address space.
1391 dwc_otg_device->os_dep.base = devm_ioremap_resource(dev, res_base);
1393 if (!dwc_otg_device->os_dep.base) {
1394 dev_err(&_dev->dev, "ioremap() failed\n");
1395 DWC_FREE(dwc_otg_device);
1399 dev_dbg(&_dev->dev, "base=0x%08x\n",
1400 (unsigned)dwc_otg_device->os_dep.base);
1403 * Initialize driver data to point to the global DWC_otg
1407 g_otgdev = dwc_otg_device;
1408 pldata->privdata = dwc_otg_device;
1409 dwc_otg_device->pldata = pldata;
1411 dwc_set_device_platform_data(_dev, dwc_otg_device);
1413 dev_dbg(&_dev->dev, "dwc_otg_device=0x%p\n", dwc_otg_device);
1415 dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->os_dep.base);
1416 if (!dwc_otg_device->core_if) {
1417 dev_err(&_dev->dev, "CIL initialization failed!\n");
1422 dwc_otg_device->core_if->otg_dev = dwc_otg_device;
1424 * Attempt to ensure this device is really a DWC_otg Controller.
1425 * Read and verify the SNPSID register contents. The value should be
1426 * 0x45F42XXX or 0x45F42XXX, which corresponds to either "OT2" or "OTG3",
1427 * as in "OTG version 2.XX" or "OTG version 3.XX".
1430 if (((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F542000) &&
1431 ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F543000)) {
1432 dev_err(&_dev->dev, "Bad value for SNPSID: 0x%08x\n",
1433 dwc_otg_get_gsnpsid(dwc_otg_device->core_if));
1439 * Validate parameter values.
1441 if (set_parameters(dwc_otg_device->core_if ,dwc_otg_module_params)) {
1447 * Create Device Attributes in sysfs
1449 dwc_otg_attr_create(_dev);
1452 * Disable the global interrupt until all the interrupt
1453 * handlers are installed.
1455 dwc_otg_disable_global_interrupts(dwc_otg_device->core_if);
1458 * Install the interrupt handler for the common interrupts before
1459 * enabling common interrupts in core_init below.
1461 irq = platform_get_irq(_dev,0);
1462 DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n",
1464 retval = request_irq(irq, dwc_otg_common_irq,
1465 IRQF_SHARED , "dwc_otg",
1468 DWC_ERROR("request of irq%d failed\n", irq);
1472 dwc_otg_device->common_irq_installed = 1;
1476 * Initialize the DWC_otg core.
1478 dwc_otg_core_init(dwc_otg_device->core_if);
1479 dwc_otg_device->core_if->usb_mode = 0;// TODO: Can be read from Device-Tree
1480 #ifndef DWC_HOST_ONLY
1482 * Initialize the PCD
1484 retval = pcd_init(_dev);
1486 DWC_ERROR("pcd_init failed\n");
1487 dwc_otg_device->pcd = NULL;
1491 #ifndef DWC_DEVICE_ONLY
1493 * Initialize the HCD
1495 retval = otg20_hcd_init(_dev);
1497 DWC_ERROR("hcd_init failed\n");
1498 dwc_otg_device->hcd = NULL;
1503 * Enable the global interrupt after all the interrupt
1504 * handlers are installed if there is no ADP support else
1505 * perform initial actions required for Internal ADP logic.
1507 if (!dwc_otg_get_param_adp_enable(dwc_otg_device->core_if))
1508 dwc_otg_enable_global_interrupts(dwc_otg_device->core_if);
1510 dwc_otg_adp_start(dwc_otg_device->core_if,
1511 dwc_otg_is_host_mode(dwc_otg_device->core_if));
1516 otg20_driver_remove(_dev);
1519 if(pldata->clock_enable)
1520 pldata->clock_enable(pldata, 0);
1525 static struct platform_driver dwc_otg_driver = {
1527 .name = (char *)dwc_otg20_driver_name,
1528 .of_match_table = of_match_ptr(usb20_otg_of_match),
1530 .probe = otg20_driver_probe,
1531 .remove = otg20_driver_remove,
1532 .suspend = dwc_otg_driver_suspend,
1533 .resume = dwc_otg_driver_resume,
1534 .shutdown = dwc_otg_driver_shutdown,
1539 * This function is called when the dwc_otg_driver is installed with the
1540 * insmod command. It registers the dwc_otg_driver structure with the
1541 * appropriate bus driver. This will cause the dwc_otg_driver_probe function
1542 * to be called. In addition, the bus driver will automatically expose
1543 * attributes defined for the device and driver in the special sysfs file
1548 static int __init dwc_otg_driver_init(void)
1553 #ifdef CONFIG_USB20_OTG
1555 printk(KERN_INFO "%s: version %s\n", dwc_otg20_driver_name,
1556 DWC_DRIVER_VERSION);
1558 retval = platform_driver_register(&dwc_otg_driver);
1560 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1564 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_version);
1565 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
1566 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_dwc_otg_conn_en);
1567 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_vbus_status);
1568 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_force_usb_mode);
1573 #ifdef CONFIG_USB20_HOST
1574 printk(KERN_INFO "%s: version %s\n", dwc_host20_driver_name,
1575 DWC_DRIVER_VERSION);
1577 retval = platform_driver_register(&dwc_host_driver);
1579 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1583 error = driver_create_file(&dwc_host_driver.driver, &driver_attr_version);
1584 error = driver_create_file(&dwc_host_driver.driver, &driver_attr_debuglevel);
1589 module_init(dwc_otg_driver_init);
1592 * This function is called when the driver is removed from the kernel
1593 * with the rmmod command. The driver unregisters itself with its bus
1597 static void __exit dwc_otg_driver_cleanup(void)
1599 printk(KERN_DEBUG "dwc_otg_driver_cleanup()\n");
1601 #ifdef CONFIG_USB20_HOST
1603 driver_remove_file(&dwc_host_driver.driver, &driver_attr_debuglevel);
1604 driver_remove_file(&dwc_host_driver.driver, &driver_attr_version);
1605 platform_driver_unregister(&dwc_host_driver);
1606 printk(KERN_INFO "%s module removed\n", dwc_host20_driver_name);
1609 #ifdef CONFIG_USB20_OTG
1611 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_dwc_otg_conn_en);
1612 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
1613 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version);
1614 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_vbus_status);
1615 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_force_usb_mode);
1616 platform_driver_unregister(&dwc_otg_driver);
1617 printk(KERN_INFO "%s module removed\n", dwc_otg20_driver_name);
1621 module_exit(dwc_otg_driver_cleanup);
1623 MODULE_DESCRIPTION(DWC_DRIVER_DESC);
1624 MODULE_AUTHOR("Synopsys Inc.");
1625 MODULE_LICENSE("GPL");
1627 module_param_named(otg_cap, dwc_otg_module_params.otg_cap, int, 0444);
1628 MODULE_PARM_DESC(otg_cap, "OTG Capabilities 0=HNP&SRP 1=SRP Only 2=None");
1629 module_param_named(opt, dwc_otg_module_params.opt, int, 0444);
1630 MODULE_PARM_DESC(opt, "OPT Mode");
1631 module_param_named(dma_enable, dwc_otg_module_params.dma_enable, int, 0444);
1632 MODULE_PARM_DESC(dma_enable, "DMA Mode 0=Slave 1=DMA enabled");
1634 module_param_named(dma_desc_enable, dwc_otg_module_params.dma_desc_enable, int,
1636 MODULE_PARM_DESC(dma_desc_enable,
1637 "DMA Desc Mode 0=Address DMA 1=DMA Descriptor enabled");
1639 module_param_named(dma_burst_size, dwc_otg_module_params.dma_burst_size, int,
1641 MODULE_PARM_DESC(dma_burst_size,
1642 "DMA Burst Size 1, 4, 8, 16, 32, 64, 128, 256");
1643 module_param_named(speed, dwc_otg_module_params.speed, int, 0444);
1644 MODULE_PARM_DESC(speed, "Speed 0=High Speed 1=Full Speed");
1645 module_param_named(host_support_fs_ls_low_power,
1646 dwc_otg_module_params.host_support_fs_ls_low_power, int,
1648 MODULE_PARM_DESC(host_support_fs_ls_low_power,
1649 "Support Low Power w/FS or LS 0=Support 1=Don't Support");
1650 module_param_named(host_ls_low_power_phy_clk,
1651 dwc_otg_module_params.host_ls_low_power_phy_clk, int, 0444);
1652 MODULE_PARM_DESC(host_ls_low_power_phy_clk,
1653 "Low Speed Low Power Clock 0=48Mhz 1=6Mhz");
1654 module_param_named(enable_dynamic_fifo,
1655 dwc_otg_module_params.enable_dynamic_fifo, int, 0444);
1656 MODULE_PARM_DESC(enable_dynamic_fifo, "0=cC Setting 1=Allow Dynamic Sizing");
1657 module_param_named(data_fifo_size, dwc_otg_module_params.data_fifo_size, int,
1659 MODULE_PARM_DESC(data_fifo_size,
1660 "Total number of words in the data FIFO memory 32-32768");
1661 module_param_named(dev_rx_fifo_size, dwc_otg_module_params.dev_rx_fifo_size,
1663 MODULE_PARM_DESC(dev_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
1664 module_param_named(dev_nperio_tx_fifo_size,
1665 dwc_otg_module_params.dev_nperio_tx_fifo_size, int, 0444);
1666 MODULE_PARM_DESC(dev_nperio_tx_fifo_size,
1667 "Number of words in the non-periodic Tx FIFO 16-32768");
1668 module_param_named(dev_perio_tx_fifo_size_1,
1669 dwc_otg_module_params.dev_perio_tx_fifo_size[0], int, 0444);
1670 MODULE_PARM_DESC(dev_perio_tx_fifo_size_1,
1671 "Number of words in the periodic Tx FIFO 4-768");
1672 module_param_named(dev_perio_tx_fifo_size_2,
1673 dwc_otg_module_params.dev_perio_tx_fifo_size[1], int, 0444);
1674 MODULE_PARM_DESC(dev_perio_tx_fifo_size_2,
1675 "Number of words in the periodic Tx FIFO 4-768");
1676 module_param_named(dev_perio_tx_fifo_size_3,
1677 dwc_otg_module_params.dev_perio_tx_fifo_size[2], int, 0444);
1678 MODULE_PARM_DESC(dev_perio_tx_fifo_size_3,
1679 "Number of words in the periodic Tx FIFO 4-768");
1680 module_param_named(dev_perio_tx_fifo_size_4,
1681 dwc_otg_module_params.dev_perio_tx_fifo_size[3], int, 0444);
1682 MODULE_PARM_DESC(dev_perio_tx_fifo_size_4,
1683 "Number of words in the periodic Tx FIFO 4-768");
1684 module_param_named(dev_perio_tx_fifo_size_5,
1685 dwc_otg_module_params.dev_perio_tx_fifo_size[4], int, 0444);
1686 MODULE_PARM_DESC(dev_perio_tx_fifo_size_5,
1687 "Number of words in the periodic Tx FIFO 4-768");
1688 module_param_named(dev_perio_tx_fifo_size_6,
1689 dwc_otg_module_params.dev_perio_tx_fifo_size[5], int, 0444);
1690 MODULE_PARM_DESC(dev_perio_tx_fifo_size_6,
1691 "Number of words in the periodic Tx FIFO 4-768");
1692 module_param_named(dev_perio_tx_fifo_size_7,
1693 dwc_otg_module_params.dev_perio_tx_fifo_size[6], int, 0444);
1694 MODULE_PARM_DESC(dev_perio_tx_fifo_size_7,
1695 "Number of words in the periodic Tx FIFO 4-768");
1696 module_param_named(dev_perio_tx_fifo_size_8,
1697 dwc_otg_module_params.dev_perio_tx_fifo_size[7], int, 0444);
1698 MODULE_PARM_DESC(dev_perio_tx_fifo_size_8,
1699 "Number of words in the periodic Tx FIFO 4-768");
1700 module_param_named(dev_perio_tx_fifo_size_9,
1701 dwc_otg_module_params.dev_perio_tx_fifo_size[8], int, 0444);
1702 MODULE_PARM_DESC(dev_perio_tx_fifo_size_9,
1703 "Number of words in the periodic Tx FIFO 4-768");
1704 module_param_named(dev_perio_tx_fifo_size_10,
1705 dwc_otg_module_params.dev_perio_tx_fifo_size[9], int, 0444);
1706 MODULE_PARM_DESC(dev_perio_tx_fifo_size_10,
1707 "Number of words in the periodic Tx FIFO 4-768");
1708 module_param_named(dev_perio_tx_fifo_size_11,
1709 dwc_otg_module_params.dev_perio_tx_fifo_size[10], int, 0444);
1710 MODULE_PARM_DESC(dev_perio_tx_fifo_size_11,
1711 "Number of words in the periodic Tx FIFO 4-768");
1712 module_param_named(dev_perio_tx_fifo_size_12,
1713 dwc_otg_module_params.dev_perio_tx_fifo_size[11], int, 0444);
1714 MODULE_PARM_DESC(dev_perio_tx_fifo_size_12,
1715 "Number of words in the periodic Tx FIFO 4-768");
1716 module_param_named(dev_perio_tx_fifo_size_13,
1717 dwc_otg_module_params.dev_perio_tx_fifo_size[12], int, 0444);
1718 MODULE_PARM_DESC(dev_perio_tx_fifo_size_13,
1719 "Number of words in the periodic Tx FIFO 4-768");
1720 module_param_named(dev_perio_tx_fifo_size_14,
1721 dwc_otg_module_params.dev_perio_tx_fifo_size[13], int, 0444);
1722 MODULE_PARM_DESC(dev_perio_tx_fifo_size_14,
1723 "Number of words in the periodic Tx FIFO 4-768");
1724 module_param_named(dev_perio_tx_fifo_size_15,
1725 dwc_otg_module_params.dev_perio_tx_fifo_size[14], int, 0444);
1726 MODULE_PARM_DESC(dev_perio_tx_fifo_size_15,
1727 "Number of words in the periodic Tx FIFO 4-768");
1728 module_param_named(host_rx_fifo_size, dwc_otg_module_params.host_rx_fifo_size,
1730 MODULE_PARM_DESC(host_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
1731 module_param_named(host_nperio_tx_fifo_size,
1732 dwc_otg_module_params.host_nperio_tx_fifo_size, int, 0444);
1733 MODULE_PARM_DESC(host_nperio_tx_fifo_size,
1734 "Number of words in the non-periodic Tx FIFO 16-32768");
1735 module_param_named(host_perio_tx_fifo_size,
1736 dwc_otg_module_params.host_perio_tx_fifo_size, int, 0444);
1737 MODULE_PARM_DESC(host_perio_tx_fifo_size,
1738 "Number of words in the host periodic Tx FIFO 16-32768");
1739 module_param_named(max_transfer_size, dwc_otg_module_params.max_transfer_size,
1741 /** @todo Set the max to 512K, modify checks */
1742 MODULE_PARM_DESC(max_transfer_size,
1743 "The maximum transfer size supported in bytes 2047-65535");
1744 module_param_named(max_packet_count, dwc_otg_module_params.max_packet_count,
1746 MODULE_PARM_DESC(max_packet_count,
1747 "The maximum number of packets in a transfer 15-511");
1748 module_param_named(host_channels, dwc_otg_module_params.host_channels, int,
1750 MODULE_PARM_DESC(host_channels,
1751 "The number of host channel registers to use 1-16");
1752 module_param_named(dev_endpoints, dwc_otg_module_params.dev_endpoints, int,
1754 MODULE_PARM_DESC(dev_endpoints,
1755 "The number of endpoints in addition to EP0 available for device mode 1-15");
1756 module_param_named(phy_type, dwc_otg_module_params.phy_type, int, 0444);
1757 MODULE_PARM_DESC(phy_type, "0=Reserved 1=UTMI+ 2=ULPI");
1758 module_param_named(phy_utmi_width, dwc_otg_module_params.phy_utmi_width, int,
1760 MODULE_PARM_DESC(phy_utmi_width, "Specifies the UTMI+ Data Width 8 or 16 bits");
1761 module_param_named(phy_ulpi_ddr, dwc_otg_module_params.phy_ulpi_ddr, int, 0444);
1762 MODULE_PARM_DESC(phy_ulpi_ddr,
1763 "ULPI at double or single data rate 0=Single 1=Double");
1764 module_param_named(phy_ulpi_ext_vbus, dwc_otg_module_params.phy_ulpi_ext_vbus,
1766 MODULE_PARM_DESC(phy_ulpi_ext_vbus,
1767 "ULPI PHY using internal or external vbus 0=Internal");
1768 module_param_named(i2c_enable, dwc_otg_module_params.i2c_enable, int, 0444);
1769 MODULE_PARM_DESC(i2c_enable, "FS PHY Interface");
1770 module_param_named(ulpi_fs_ls, dwc_otg_module_params.ulpi_fs_ls, int, 0444);
1771 MODULE_PARM_DESC(ulpi_fs_ls, "ULPI PHY FS/LS mode only");
1772 module_param_named(ts_dline, dwc_otg_module_params.ts_dline, int, 0444);
1773 MODULE_PARM_DESC(ts_dline, "Term select Dline pulsing for all PHYs");
1774 module_param_named(debug, g_dbg_lvl, int, 0444);
1775 MODULE_PARM_DESC(debug, "");
1777 module_param_named(en_multiple_tx_fifo,
1778 dwc_otg_module_params.en_multiple_tx_fifo, int, 0444);
1779 MODULE_PARM_DESC(en_multiple_tx_fifo,
1780 "Dedicated Non Periodic Tx FIFOs 0=disabled 1=enabled");
1781 module_param_named(dev_tx_fifo_size_1,
1782 dwc_otg_module_params.dev_tx_fifo_size[0], int, 0444);
1783 MODULE_PARM_DESC(dev_tx_fifo_size_1, "Number of words in the Tx FIFO 4-768");
1784 module_param_named(dev_tx_fifo_size_2,
1785 dwc_otg_module_params.dev_tx_fifo_size[1], int, 0444);
1786 MODULE_PARM_DESC(dev_tx_fifo_size_2, "Number of words in the Tx FIFO 4-768");
1787 module_param_named(dev_tx_fifo_size_3,
1788 dwc_otg_module_params.dev_tx_fifo_size[2], int, 0444);
1789 MODULE_PARM_DESC(dev_tx_fifo_size_3, "Number of words in the Tx FIFO 4-768");
1790 module_param_named(dev_tx_fifo_size_4,
1791 dwc_otg_module_params.dev_tx_fifo_size[3], int, 0444);
1792 MODULE_PARM_DESC(dev_tx_fifo_size_4, "Number of words in the Tx FIFO 4-768");
1793 module_param_named(dev_tx_fifo_size_5,
1794 dwc_otg_module_params.dev_tx_fifo_size[4], int, 0444);
1795 MODULE_PARM_DESC(dev_tx_fifo_size_5, "Number of words in the Tx FIFO 4-768");
1796 module_param_named(dev_tx_fifo_size_6,
1797 dwc_otg_module_params.dev_tx_fifo_size[5], int, 0444);
1798 MODULE_PARM_DESC(dev_tx_fifo_size_6, "Number of words in the Tx FIFO 4-768");
1799 module_param_named(dev_tx_fifo_size_7,
1800 dwc_otg_module_params.dev_tx_fifo_size[6], int, 0444);
1801 MODULE_PARM_DESC(dev_tx_fifo_size_7, "Number of words in the Tx FIFO 4-768");
1802 module_param_named(dev_tx_fifo_size_8,
1803 dwc_otg_module_params.dev_tx_fifo_size[7], int, 0444);
1804 MODULE_PARM_DESC(dev_tx_fifo_size_8, "Number of words in the Tx FIFO 4-768");
1805 module_param_named(dev_tx_fifo_size_9,
1806 dwc_otg_module_params.dev_tx_fifo_size[8], int, 0444);
1807 MODULE_PARM_DESC(dev_tx_fifo_size_9, "Number of words in the Tx FIFO 4-768");
1808 module_param_named(dev_tx_fifo_size_10,
1809 dwc_otg_module_params.dev_tx_fifo_size[9], int, 0444);
1810 MODULE_PARM_DESC(dev_tx_fifo_size_10, "Number of words in the Tx FIFO 4-768");
1811 module_param_named(dev_tx_fifo_size_11,
1812 dwc_otg_module_params.dev_tx_fifo_size[10], int, 0444);
1813 MODULE_PARM_DESC(dev_tx_fifo_size_11, "Number of words in the Tx FIFO 4-768");
1814 module_param_named(dev_tx_fifo_size_12,
1815 dwc_otg_module_params.dev_tx_fifo_size[11], int, 0444);
1816 MODULE_PARM_DESC(dev_tx_fifo_size_12, "Number of words in the Tx FIFO 4-768");
1817 module_param_named(dev_tx_fifo_size_13,
1818 dwc_otg_module_params.dev_tx_fifo_size[12], int, 0444);
1819 MODULE_PARM_DESC(dev_tx_fifo_size_13, "Number of words in the Tx FIFO 4-768");
1820 module_param_named(dev_tx_fifo_size_14,
1821 dwc_otg_module_params.dev_tx_fifo_size[13], int, 0444);
1822 MODULE_PARM_DESC(dev_tx_fifo_size_14, "Number of words in the Tx FIFO 4-768");
1823 module_param_named(dev_tx_fifo_size_15,
1824 dwc_otg_module_params.dev_tx_fifo_size[14], int, 0444);
1825 MODULE_PARM_DESC(dev_tx_fifo_size_15, "Number of words in the Tx FIFO 4-768");
1827 module_param_named(thr_ctl, dwc_otg_module_params.thr_ctl, int, 0444);
1828 MODULE_PARM_DESC(thr_ctl,
1829 "Thresholding enable flag bit 0 - non ISO Tx thr., 1 - ISO Tx thr., 2 - Rx thr.- bit 0=disabled 1=enabled");
1830 module_param_named(tx_thr_length, dwc_otg_module_params.tx_thr_length, int,
1832 MODULE_PARM_DESC(tx_thr_length, "Tx Threshold length in 32 bit DWORDs");
1833 module_param_named(rx_thr_length, dwc_otg_module_params.rx_thr_length, int,
1835 MODULE_PARM_DESC(rx_thr_length, "Rx Threshold length in 32 bit DWORDs");
1837 module_param_named(pti_enable, dwc_otg_module_params.pti_enable, int, 0444);
1838 module_param_named(mpi_enable, dwc_otg_module_params.mpi_enable, int, 0444);
1839 module_param_named(lpm_enable, dwc_otg_module_params.lpm_enable, int, 0444);
1840 MODULE_PARM_DESC(lpm_enable, "LPM Enable 0=LPM Disabled 1=LPM Enabled");
1842 module_param_named(besl_enable, dwc_otg_module_params.besl_enable, int, 0444);
1843 MODULE_PARM_DESC(besl_enable, "BESL Enable 0=BESL Disabled 1=BESL Enabled");
1844 module_param_named(baseline_besl, dwc_otg_module_params.baseline_besl, int, 0444);
1845 MODULE_PARM_DESC(baseline_besl, "Set the baseline besl value");
1846 module_param_named(deep_besl, dwc_otg_module_params.deep_besl, int, 0444);
1847 MODULE_PARM_DESC(deep_besl, "Set the deep besl value");
1849 module_param_named(ic_usb_cap, dwc_otg_module_params.ic_usb_cap, int, 0444);
1850 MODULE_PARM_DESC(ic_usb_cap,
1851 "IC_USB Capability 0=IC_USB Disabled 1=IC_USB Enabled");
1852 module_param_named(ahb_thr_ratio, dwc_otg_module_params.ahb_thr_ratio, int,
1854 MODULE_PARM_DESC(ahb_thr_ratio, "AHB Threshold Ratio");
1855 module_param_named(power_down, dwc_otg_module_params.power_down, int, 0444);
1856 MODULE_PARM_DESC(power_down, "Power Down Mode");
1857 module_param_named(reload_ctl, dwc_otg_module_params.reload_ctl, int, 0444);
1858 MODULE_PARM_DESC(reload_ctl, "HFIR Reload Control");
1859 module_param_named(dev_out_nak, dwc_otg_module_params.dev_out_nak, int, 0444);
1860 MODULE_PARM_DESC(dev_out_nak, "Enable Device OUT NAK");
1861 module_param_named(cont_on_bna, dwc_otg_module_params.cont_on_bna, int, 0444);
1862 MODULE_PARM_DESC(cont_on_bna, "Enable Enable Continue on BNA");
1863 module_param_named(ahb_single, dwc_otg_module_params.ahb_single, int, 0444);
1864 MODULE_PARM_DESC(ahb_single, "Enable AHB Single Support");
1865 module_param_named(adp_enable, dwc_otg_module_params.adp_enable, int, 0444);
1866 MODULE_PARM_DESC(adp_enable, "ADP Enable 0=ADP Disabled 1=ADP Enabled");
1867 module_param_named(otg_ver, dwc_otg_module_params.otg_ver, int, 0444);
1868 MODULE_PARM_DESC(otg_ver, "OTG revision supported 0=OTG 1.3 1=OTG 2.0");
1870 /** @page "Module Parameters"
1872 * The following parameters may be specified when starting the module.
1873 * These parameters define how the DWC_otg controller should be
1874 * configured. Parameter values are passed to the CIL initialization
1875 * function dwc_otg_cil_init
1877 * Example: <code>modprobe dwc_otg speed=1 otg_cap=1</code>
1881 <tr><td>Parameter Name</td><td>Meaning</td></tr>
1885 <td>Specifies the OTG capabilities. The driver will automatically detect the
1886 value for this parameter if none is specified.
1887 - 0: HNP and SRP capable (default, if available)
1888 - 1: SRP Only capable
1889 - 2: No HNP/SRP capable
1894 <td>Specifies whether to use slave or DMA mode for accessing the data FIFOs.
1895 The driver will automatically detect the value for this parameter if none is
1898 - 1: DMA (default, if available)
1902 <td>dma_burst_size</td>
1903 <td>The DMA Burst size (applicable only for External DMA Mode).
1904 - Values: 1, 4, 8 16, 32, 64, 128, 256 (default 32)
1909 <td>Specifies the maximum speed of operation in host and device mode. The
1910 actual speed depends on the speed of the attached device and the value of
1912 - 0: High Speed (default)
1917 <td>host_support_fs_ls_low_power</td>
1918 <td>Specifies whether low power mode is supported when attached to a Full
1919 Speed or Low Speed device in host mode.
1920 - 0: Don't support low power mode (default)
1921 - 1: Support low power mode
1925 <td>host_ls_low_power_phy_clk</td>
1926 <td>Specifies the PHY clock rate in low power mode when connected to a Low
1927 Speed device in host mode. This parameter is applicable only if
1928 HOST_SUPPORT_FS_LS_LOW_POWER is enabled.
1929 - 0: 48 MHz (default)
1934 <td>enable_dynamic_fifo</td>
1935 <td> Specifies whether FIFOs may be resized by the driver software.
1936 - 0: Use cC FIFO size parameters
1937 - 1: Allow dynamic FIFO sizing (default)
1941 <td>data_fifo_size</td>
1942 <td>Total number of 4-byte words in the data FIFO memory. This memory
1943 includes the Rx FIFO, non-periodic Tx FIFO, and periodic Tx FIFOs.
1944 - Values: 32 to 32768 (default 8192)
1946 Note: The total FIFO memory depth in the FPGA configuration is 8192.
1950 <td>dev_rx_fifo_size</td>
1951 <td>Number of 4-byte words in the Rx FIFO in device mode when dynamic
1952 FIFO sizing is enabled.
1953 - Values: 16 to 32768 (default 1064)
1957 <td>dev_nperio_tx_fifo_size</td>
1958 <td>Number of 4-byte words in the non-periodic Tx FIFO in device mode when
1959 dynamic FIFO sizing is enabled.
1960 - Values: 16 to 32768 (default 1024)
1964 <td>dev_perio_tx_fifo_size_n (n = 1 to 15)</td>
1965 <td>Number of 4-byte words in each of the periodic Tx FIFOs in device mode
1966 when dynamic FIFO sizing is enabled.
1967 - Values: 4 to 768 (default 256)
1971 <td>host_rx_fifo_size</td>
1972 <td>Number of 4-byte words in the Rx FIFO in host mode when dynamic FIFO
1974 - Values: 16 to 32768 (default 1024)
1978 <td>host_nperio_tx_fifo_size</td>
1979 <td>Number of 4-byte words in the non-periodic Tx FIFO in host mode when
1980 dynamic FIFO sizing is enabled in the core.
1981 - Values: 16 to 32768 (default 1024)
1985 <td>host_perio_tx_fifo_size</td>
1986 <td>Number of 4-byte words in the host periodic Tx FIFO when dynamic FIFO
1988 - Values: 16 to 32768 (default 1024)
1992 <td>max_transfer_size</td>
1993 <td>The maximum transfer size supported in bytes.
1994 - Values: 2047 to 65,535 (default 65,535)
1998 <td>max_packet_count</td>
1999 <td>The maximum number of packets in a transfer.
2000 - Values: 15 to 511 (default 511)
2004 <td>host_channels</td>
2005 <td>The number of host channel registers to use.
2006 - Values: 1 to 16 (default 12)
2008 Note: The FPGA configuration supports a maximum of 12 host channels.
2012 <td>dev_endpoints</td>
2013 <td>The number of endpoints in addition to EP0 available for device mode
2015 - Values: 1 to 15 (default 6 IN and OUT)
2017 Note: The FPGA configuration supports a maximum of 6 IN and OUT endpoints in
2023 <td>Specifies the type of PHY interface to use. By default, the driver will
2024 automatically detect the phy_type.
2026 - 1: UTMI+ (default, if available)
2031 <td>phy_utmi_width</td>
2032 <td>Specifies the UTMI+ Data Width. This parameter is applicable for a
2033 phy_type of UTMI+. Also, this parameter is applicable only if the
2034 OTG_HSPHY_WIDTH cC parameter was set to "8 and 16 bits", meaning that the
2035 core has been configured to work at either data path width.
2036 - Values: 8 or 16 bits (default 16)
2040 <td>phy_ulpi_ddr</td>
2041 <td>Specifies whether the ULPI operates at double or single data rate. This
2042 parameter is only applicable if phy_type is ULPI.
2043 - 0: single data rate ULPI interface with 8 bit wide data bus (default)
2044 - 1: double data rate ULPI interface with 4 bit wide data bus
2049 <td>Specifies whether to use the I2C interface for full speed PHY. This
2050 parameter is only applicable if PHY_TYPE is FS.
2051 - 0: Disabled (default)
2057 <td>Specifies whether to use ULPI FS/LS mode only.
2058 - 0: Disabled (default)
2064 <td>Specifies whether term select D-Line pulsing for all PHYs is enabled.
2065 - 0: Disabled (default)
2070 <td>en_multiple_tx_fifo</td>
2071 <td>Specifies whether dedicatedto tx fifos are enabled for non periodic IN EPs.
2072 The driver will automatically detect the value for this parameter if none is
2075 - 1: Enabled (default, if available)
2079 <td>dev_tx_fifo_size_n (n = 1 to 15)</td>
2080 <td>Number of 4-byte words in each of the Tx FIFOs in device mode
2081 when dynamic FIFO sizing is enabled.
2082 - Values: 4 to 768 (default 256)
2086 <td>tx_thr_length</td>
2087 <td>Transmit Threshold length in 32 bit double words
2088 - Values: 8 to 128 (default 64)
2092 <td>rx_thr_length</td>
2093 <td>Receive Threshold length in 32 bit double words
2094 - Values: 8 to 128 (default 64)
2099 <td>Specifies whether to enable Thresholding for Device mode. Bits 0, 1, 2 of
2100 this parmater specifies if thresholding is enabled for non-Iso Tx, Iso Tx and
2101 Rx transfers accordingly.
2102 The driver will automatically detect the value for this parameter if none is
2104 - Values: 0 to 7 (default 0)
2105 Bit values indicate:
2106 - 0: Thresholding disabled
2107 - 1: Thresholding enabled
2111 <td>dma_desc_enable</td>
2112 <td>Specifies whether to enable Descriptor DMA mode.
2113 The driver will automatically detect the value for this parameter if none is
2115 - 0: Descriptor DMA disabled
2116 - 1: Descriptor DMA (default, if available)
2121 <td>Specifies whether to enable MPI enhancement mode.
2122 The driver will automatically detect the value for this parameter if none is
2124 - 0: MPI disabled (default)
2130 <td>Specifies whether to enable PTI enhancement support.
2131 The driver will automatically detect the value for this parameter if none is
2133 - 0: PTI disabled (default)
2139 <td>Specifies whether to enable LPM support.
2140 The driver will automatically detect the value for this parameter if none is
2143 - 1: LPM enable (default, if available)
2147 <td>besl_enable</td>
2148 <td>Specifies whether to enable LPM Errata support.
2149 The driver will automatically detect the value for this parameter if none is
2151 - 0: LPM Errata disabled (default)
2152 - 1: LPM Errata enable
2156 <td>baseline_besl</td>
2157 <td>Specifies the baseline besl value.
2158 - Values: 0 to 15 (default 0)
2163 <td>Specifies the deep besl value.
2164 - Values: 0 to 15 (default 15)
2169 <td>Specifies whether to enable IC_USB capability.
2170 The driver will automatically detect the value for this parameter if none is
2172 - 0: IC_USB disabled (default, if available)
2177 <td>ahb_thr_ratio</td>
2178 <td>Specifies AHB Threshold ratio.
2179 - Values: 0 to 3 (default 0)
2184 <td>Specifies Power Down(Hibernation) Mode.
2185 The driver will automatically detect the value for this parameter if none is
2187 - 0: Power Down disabled (default)
2188 - 2: Power Down enabled
2193 <td>Specifies whether dynamic reloading of the HFIR register is allowed during
2194 run time. The driver will automatically detect the value for this parameter if
2195 none is specified. In case the HFIR value is reloaded when HFIR.RldCtrl == 1'b0
2196 the core might misbehave.
2197 - 0: Reload Control disabled (default)
2198 - 1: Reload Control enabled
2202 <td>dev_out_nak</td>
2203 <td>Specifies whether Device OUT NAK enhancement enabled or no.
2204 The driver will automatically detect the value for this parameter if
2205 none is specified. This parameter is valid only when OTG_EN_DESC_DMA == 1
\92b1.
2206 - 0: The core does not set NAK after Bulk OUT transfer complete (default)
2207 - 1: The core sets NAK after Bulk OUT transfer complete
2211 <td>cont_on_bna</td>
2212 <td>Specifies whether Enable Continue on BNA enabled or no.
2213 After receiving BNA interrupt the core disables the endpoint,when the
2214 endpoint is re-enabled by the application the
2215 - 0: Core starts processing from the DOEPDMA descriptor (default)
2216 - 1: Core starts processing from the descriptor which received the BNA.
2217 This parameter is valid only when OTG_EN_DESC_DMA == 1
\92b1.
2222 <td>This bit when programmed supports SINGLE transfers for remainder data
2223 in a transfer for DMA mode of operation.
2224 - 0: The remainder data will be sent using INCR burst size (default)
2225 - 1: The remainder data will be sent using SINGLE burst size.
2230 <td>Specifies whether ADP feature is enabled.
2231 The driver will automatically detect the value for this parameter if none is
2233 - 0: ADP feature disabled (default)
2234 - 1: ADP feature enabled
2239 <td>Specifies whether OTG is performing as USB OTG Revision 2.0 or Revision 1.3
2241 - 0: OTG 2.0 support disabled (default)
2242 - 1: OTG 2.0 support enabled