drivers/mfd/fusb302.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Zain Wang <zain.wang@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/extcon.h>
  14 #include <linux/gpio.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/module.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/regmap.h>
  19
  20 #include "fusb302.h"
  21
  22 #define FUSB302_MAX_REG         (FUSB_REG_FIFO + 50)
  23 #define FUSB_MS_TO_NS(x)        ((s64)x * 1000 * 1000)
  24
  25 #define FUSB_MODE_DRP           0
  26 #define FUSB_MODE_UFP           1
  27 #define FUSB_MODE_DFP           2
  28 #define FUSB_MODE_ASS           3
  29
  30 #define TYPEC_CC_VOLT_OPEN      0
  31 #define TYPEC_CC_VOLT_RA        1
  32 #define TYPEC_CC_VOLT_RD        2
  33 #define TYPEC_CC_VOLT_RP        3
  34
  35 #define EVENT_CC                BIT(0)
  36 #define EVENT_RX                BIT(1)
  37 #define EVENT_TX                BIT(2)
  38 #define EVENT_REC_RESET         BIT(3)
  39 #define EVENT_WORK_CONTINUE     BIT(5)
  40 #define EVENT_TIMER_MUX         BIT(6)
  41 #define EVENT_TIMER_STATE       BIT(7)
  42 #define FLAG_EVENT              (EVENT_RX | EVENT_TIMER_MUX | \
  43                                  EVENT_TIMER_STATE)
  44
  45 #define PIN_MAP_A               BIT(0)
  46 #define PIN_MAP_B               BIT(1)
  47 #define PIN_MAP_C               BIT(2)
  48 #define PIN_MAP_D               BIT(3)
  49 #define PIN_MAP_E               BIT(4)
  50 #define PIN_MAP_F               BIT(5)
  51
  52 static u8 fusb30x_port_used;
  53 static struct fusb30x_chip *fusb30x_port_info[256];
  54
  55 static bool is_write_reg(struct device *dev, unsigned int reg)
  56 {
  57         if (reg >= FUSB_REG_FIFO)
  58                 return true;
  59         else
  60                 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
  61                         true : false;
  62 }
  63
  64 static bool is_volatile_reg(struct device *dev, unsigned int reg)
  65 {
  66         if (reg > FUSB_REG_CONTROL4)
  67                 return true;
  68
  69         switch (reg) {
  70         case FUSB_REG_CONTROL0:
  71         case FUSB_REG_CONTROL1:
  72         case FUSB_REG_CONTROL3:
  73         case FUSB_REG_RESET:
  74                 return true;
  75         }
  76         return false;
  77 }
  78
  79 struct regmap_config fusb302_regmap_config = {
  80         .reg_bits = 8,
  81         .val_bits = 8,
  82         .writeable_reg = is_write_reg,
  83         .volatile_reg = is_volatile_reg,
  84         .max_register = FUSB302_MAX_REG,
  85         .cache_type = REGCACHE_RBTREE,
  86 };
  87
  88 static void dump_notify_info(struct fusb30x_chip *chip)
  89 {
  90         dev_dbg(chip->dev, "port        %d\n", chip->port_num);
  91         dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
  92         dev_dbg(chip->dev, "power_role  %d\n", chip->notify.power_role);
  93         dev_dbg(chip->dev, "data_role   %d\n", chip->notify.data_role);
  94         dev_dbg(chip->dev, "cc          %d\n", chip->notify.is_cc_connected);
  95         dev_dbg(chip->dev, "pd          %d\n", chip->notify.is_pd_connected);
  96         dev_dbg(chip->dev, "enter_mode  %d\n", chip->notify.is_enter_mode);
  97         dev_dbg(chip->dev, "pin support %d\n",
  98                 chip->notify.pin_assignment_support);
  99         dev_dbg(chip->dev, "pin def     %d\n", chip->notify.pin_assignment_def);
 100         dev_dbg(chip->dev, "attention   %d\n", chip->notify.attention);
 101 }
 102
 103 static const unsigned int fusb302_cable[] = {
 104         EXTCON_USB,
 105         EXTCON_USB_HOST,
 106         EXTCON_CHG_USB_SDP,
 107         EXTCON_CHG_USB_CDP,
 108         EXTCON_CHG_USB_DCP,
 109         EXTCON_CHG_USB_SLOW,
 110         EXTCON_DISP_DP,
 111         EXTCON_NONE,
 112 };
 113
 114 void fusb_irq_disable(struct fusb30x_chip *chip)
 115 {
 116         unsigned long irqflags = 0;
 117
 118         spin_lock_irqsave(&chip->irq_lock, irqflags);
 119         if (chip->enable_irq) {
 120                 disable_irq_nosync(chip->gpio_int_irq);
 121                 chip->enable_irq = 0;
 122         } else {
 123                 dev_warn(chip->dev, "irq have already disabled\n");
 124         }
 125         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 126 }
 127
 128 void fusb_irq_enable(struct fusb30x_chip *chip)
 129 {
 130         unsigned long irqflags = 0;
 131
 132         spin_lock_irqsave(&chip->irq_lock, irqflags);
 133         if (!chip->enable_irq) {
 134                 enable_irq(chip->gpio_int_irq);
 135                 chip->enable_irq = 1;
 136         }
 137         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 138 }
 139
 140 static void platform_fusb_notify(struct fusb30x_chip *chip)
 141 {
 142         bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0;
 143         union extcon_property_value property;
 144
 145         if (chip->notify.is_cc_connected)
 146                 chip->notify.orientation = chip->cc_polarity + 1;
 147
 148         /* avoid notify repeated */
 149         if (memcmp(&chip->notify, &chip->notify_cmp,
 150                    sizeof(struct notify_info))) {
 151                 dump_notify_info(chip);
 152                 chip->notify.attention = 0;
 153                 memcpy(&chip->notify_cmp, &chip->notify,
 154                        sizeof(struct notify_info));
 155
 156                 plugged = chip->notify.is_cc_connected ||
 157                           chip->notify.is_pd_connected;
 158                 flip = chip->notify.orientation ?
 159                        (chip->notify.orientation - 1) : 0;
 160                 dp = chip->notify.is_enter_mode;
 161
 162                 if (dp)
 163                         dfp = (chip->notify.pin_assignment_def &
 164                                 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
 165                 else if (chip->notify.data_role)
 166                         dfp = 1;
 167                 else if (plugged)
 168                         ufp = 1;
 169
 170                 property.intval = flip;
 171                 extcon_set_property(chip->extcon, EXTCON_USB,
 172                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 173                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 174                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 175                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 176                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 177                 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
 178                 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
 179                 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
 180                 extcon_sync(chip->extcon, EXTCON_USB);
 181                 extcon_sync(chip->extcon, EXTCON_USB_HOST);
 182                 extcon_sync(chip->extcon, EXTCON_DISP_DP);
 183         }
 184 }
 185
 186 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
 187 {
 188         return !gpiod_get_value(chip->gpio_int);
 189 }
 190
 191 static void fusb_timer_start(struct hrtimer *timer, int ms)
 192 {
 193         ktime_t ktime;
 194
 195         ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
 196         hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
 197 }
 198
 199 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
 200                                          int vbus_other)
 201 {
 202         if (chip->gpio_vbus_5v)
 203                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
 204
 205         if (chip->gpio_vbus_other)
 206                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
 207 }
 208
 209 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
 210 {
 211         dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
 212         if (!state)
 213                 dev_info(chip->dev, "PD disabled\n");
 214         chip->conn_state = state;
 215         chip->sub_state = 0;
 216         chip->val_tmp = 0;
 217         chip->work_continue = 1;
 218 }
 219
 220 static int tcpm_get_message(struct fusb30x_chip *chip)
 221 {
 222         u8 buf[32];
 223         int len;
 224
 225         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
 226         chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
 227
 228         len = PD_HEADER_CNT(chip->rec_head) << 2;
 229         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
 230
 231         memcpy(chip->rec_load, buf, len);
 232
 233         return 0;
 234 }
 235
 236 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
 237 {
 238         tcpm_get_message(chip);
 239 }
 240
 241 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
 242 {
 243         u8 val;
 244         int *CC_MEASURE;
 245         u8 store;
 246
 247         *CC1 = TYPEC_CC_VOLT_OPEN;
 248         *CC2 = TYPEC_CC_VOLT_OPEN;
 249
 250         if (chip->cc_state & 0x01)
 251                 CC_MEASURE = CC1;
 252         else
 253                 CC_MEASURE = CC2;
 254
 255         if (chip->cc_state & 0x04) {
 256                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, (u32 *)(&store));
 257
 258                 /* measure cc1 first */
 259                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 260                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 261                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 262                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 263                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 264                                    SWITCHES0_MEAS_CC1);
 265                 usleep_range(250, 300);
 266
 267                 regmap_read(chip->regmap, FUSB_REG_STATUS0, (u32 *)(&val));
 268                 val &= STATUS0_BC_LVL;
 269                 if (val)
 270                         *CC1 = val;
 271
 272                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 273                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 274                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 275                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 276                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 277                                    SWITCHES0_MEAS_CC2);
 278                 usleep_range(250, 300);
 279
 280                 regmap_read(chip->regmap, FUSB_REG_STATUS0, (u32 *)(&val));
 281                 val &= STATUS0_BC_LVL;
 282                 if (val)
 283                         *CC2 = val;
 284
 285                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 286                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 287                                    store);
 288         } else {
 289                 if (chip->cc_state & 0x01) {
 290                         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 291                                            SWITCHES0_MEAS_CC1 |
 292                                            SWITCHES0_MEAS_CC2 |
 293                                            SWITCHES0_PU_EN1 |
 294                                            SWITCHES0_PU_EN2 |
 295                                            SWITCHES0_PDWN1 |
 296                                            SWITCHES0_PDWN2,
 297                                            SWITCHES0_MEAS_CC1 |
 298                                            SWITCHES0_PU_EN1);
 299                 } else {
 300                         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 301                                            SWITCHES0_MEAS_CC1 |
 302                                            SWITCHES0_MEAS_CC2 |
 303                                            SWITCHES0_PU_EN1 |
 304                                            SWITCHES0_PU_EN2 |
 305                                            SWITCHES0_PDWN1 |
 306                                            SWITCHES0_PDWN2,
 307                                            SWITCHES0_MEAS_CC2 |
 308                                            SWITCHES0_PU_EN2);
 309                 }
 310
 311                 regmap_write(chip->regmap, FUSB_REG_MEASURE, 0x26 << 2);
 312                 usleep_range(250, 300);
 313
 314                 regmap_read(chip->regmap, FUSB_REG_STATUS0, (u32 *)(&val));
 315
 316                 if (val & STATUS0_COMP) {
 317                         *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
 318                 } else {
 319                         regmap_write(chip->regmap, FUSB_REG_MEASURE, 0x05 << 2);
 320                         usleep_range(250, 300);
 321
 322                         regmap_read(chip->regmap, FUSB_REG_STATUS0,
 323                                     (u32 *)(&val));
 324
 325                         if (val & STATUS0_COMP)
 326                                 *CC_MEASURE = TYPEC_CC_VOLT_RA;
 327                         else
 328                                 *CC_MEASURE = TYPEC_CC_VOLT_RD;
 329                 }
 330         }
 331         return 0;
 332 }
 333
 334 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
 335 {
 336         u8 val = 0, mask;
 337
 338         val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 339                  SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 340
 341         mask = ~val;
 342
 343         switch (mode) {
 344         case FUSB_MODE_DFP:
 345                 if (chip->togdone_pullup)
 346                         val |= SWITCHES0_PU_EN2;
 347                 else
 348                         val |= SWITCHES0_PU_EN1;
 349                 break;
 350         case FUSB_MODE_UFP:
 351                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 352                 break;
 353         case FUSB_MODE_DRP:
 354                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 355                 break;
 356         case FUSB_MODE_ASS:
 357                 break;
 358         }
 359
 360         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
 361         return 0;
 362 }
 363
 364 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
 365 {
 366         u8 val = 0;
 367
 368         if (enable) {
 369                 if (chip->cc_polarity)
 370                         val |= SWITCHES0_MEAS_CC2;
 371                 else
 372                         val |= SWITCHES0_MEAS_CC1;
 373                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 374                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 375                                    val);
 376                 fusb302_flush_rx_fifo(chip);
 377                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 378                                    SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
 379         } else {
 380                 /*
 381                  * bit of a hack here.
 382                  * when this function is called to disable rx (enable=0)
 383                  * using it as an indication of detach (gulp!)
 384                  * to reset our knowledge of where
 385                  * the toggle state machine landed.
 386                  */
 387                 chip->togdone_pullup = 0;
 388
 389 #ifdef  FUSB_HAVE_DRP
 390                 tcpm_set_cc(chip, FUSB_MODE_DRP);
 391                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 392                                    CONTROL2_TOG_RD_ONLY,
 393                                    CONTROL2_TOG_RD_ONLY);
 394 #endif
 395                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 396                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 397                                    0);
 398                 regmap_update_bits(chip->regmap,
 399                                    FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
 400         }
 401
 402         return 0;
 403 }
 404
 405 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
 406 {
 407         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 408                            SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
 409                            (chip->notify.power_role << 7) |
 410                            (chip->notify.data_role << 4));
 411         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 412                            SWITCHES1_SPECREV, 2 << 5);
 413         return 0;
 414 }
 415
 416 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
 417 {
 418         u8 val = 0;
 419
 420 #ifdef FUSB_VCONN_SUPPORT
 421         if (chip->vconn_enabled) {
 422                 if (polarity)
 423                         val |= SWITCHES0_VCONN_CC1;
 424                 else
 425                         val |= SWITCHES0_VCONN_CC2;
 426         }
 427 #endif
 428
 429         if (polarity)
 430                 val |= SWITCHES0_MEAS_CC2;
 431         else
 432                 val |= SWITCHES0_MEAS_CC1;
 433
 434         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 435                            SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
 436                            SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 437                            val);
 438
 439         val = 0;
 440         if (polarity)
 441                 val |= SWITCHES1_TXCC2;
 442         else
 443                 val |= SWITCHES1_TXCC1;
 444         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 445                            SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
 446                            val);
 447
 448         chip->cc_polarity = polarity;
 449
 450         return 0;
 451 }
 452
 453 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
 454 {
 455         u8 val = 0;
 456
 457         if (enable) {
 458                 tcpm_set_polarity(chip, chip->cc_polarity);
 459         } else {
 460                 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
 461                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 462                                    SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
 463                                    val);
 464         }
 465         chip->vconn_enabled = enable;
 466         return 0;
 467 }
 468
 469 static void fusb302_pd_reset(struct fusb30x_chip *chip)
 470 {
 471         regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
 472         regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
 473 }
 474
 475 static void tcpm_init(struct fusb30x_chip *chip)
 476 {
 477         u8 val;
 478
 479         regmap_read(chip->regmap, FUSB_REG_DEVICEID, (u32 *)(&chip->chip_id));
 480         platform_set_vbus_lvl_enable(chip, 0, 0);
 481         chip->notify.is_cc_connected = 0;
 482         chip->cc_state = 0;
 483
 484         /* restore default settings */
 485         regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
 486                            RESET_SW_RESET);
 487         fusb302_pd_reset(chip);
 488         /* set auto_retry and number of retries */
 489         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 490                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
 491                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
 492
 493         /* set interrupts */
 494         val = 0xff;
 495         val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
 496                  MASK_M_VBUSOK);
 497         regmap_write(chip->regmap, FUSB_REG_MASK, val);
 498
 499         val = 0xff;
 500         val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
 501                  MASKA_M_TXSENT | MASKA_M_HARDRST);
 502         regmap_write(chip->regmap, FUSB_REG_MASKA, val);
 503
 504         val = 0xff;
 505         val = ~MASKB_M_GCRCSEND;
 506         regmap_write(chip->regmap, FUSB_REG_MASKB, val);
 507
 508 #ifdef  FUSB_HAVE_DRP
 509                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 510                                    CONTROL2_MODE | CONTROL2_TOGGLE,
 511                                    (1 << 1) | CONTROL2_TOGGLE);
 512
 513                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 514                                    CONTROL2_TOG_RD_ONLY,
 515                                    CONTROL2_TOG_RD_ONLY);
 516 #endif
 517         /* Interrupts Enable */
 518         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
 519                            ~CONTROL0_INT_MASK);
 520
 521         tcpm_set_polarity(chip, 0);
 522         tcpm_set_vconn(chip, 0);
 523
 524         regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
 525 }
 526
 527 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
 528 {
 529         chip->msg_id = 0;
 530         chip->vdm_state = 0;
 531         if (chip->notify.power_role)
 532                 set_state(chip, policy_src_transition_default);
 533         else
 534                 set_state(chip, policy_snk_transition_default);
 535 }
 536
 537 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
 538 {
 539         int interrupt, interrupta, interruptb;
 540         u32 val;
 541
 542         regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
 543         regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
 544         regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
 545
 546         if (interrupt & INTERRUPT_BC_LVL) {
 547                 if (chip->notify.is_cc_connected)
 548                         *evt |= EVENT_CC;
 549         }
 550
 551         if (interrupt & INTERRUPT_VBUSOK) {
 552                 if (chip->notify.is_cc_connected)
 553                         *evt |= EVENT_CC;
 554         }
 555
 556         if (interrupta & INTERRUPTA_TOGDONE) {
 557                 *evt |= EVENT_CC;
 558                 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
 559                 chip->cc_state = ((u8)val >> 3) & 0x07;
 560
 561                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 562                                    CONTROL2_TOGGLE,
 563                                    0);
 564
 565                 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 566                          SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 567
 568                 if (chip->cc_state | 0x01)
 569                         val |= SWITCHES0_PU_EN1;
 570                 else
 571                         val |= SWITCHES0_PU_EN2;
 572
 573                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 574                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 575                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 576                                    val);
 577         }
 578
 579         if (interrupta & INTERRUPTA_TXSENT) {
 580                 *evt |= EVENT_TX;
 581                 fusb302_flush_rx_fifo(chip);
 582                 chip->tx_state = tx_success;
 583         }
 584
 585         if (interruptb & INTERRUPTB_GCRCSENT)
 586                 *evt |= EVENT_RX;
 587
 588         if (interrupta & INTERRUPTA_HARDRST) {
 589                 fusb302_pd_reset(chip);
 590                 pd_execute_hard_reset(chip);
 591                 *evt |= EVENT_REC_RESET;
 592         }
 593
 594         if (interrupta & INTERRUPTA_RETRYFAIL) {
 595                 *evt |= EVENT_TX;
 596                 chip->tx_state = tx_failed;
 597         }
 598
 599         if (interrupta & INTERRUPTA_HARDSENT) {
 600                 chip->tx_state = tx_success;
 601                 chip->timer_state = T_DISABLED;
 602                 *evt |= EVENT_TX;
 603         }
 604 }
 605
 606 static void mux_alert(struct fusb30x_chip *chip, int *evt)
 607 {
 608         if (!chip->timer_mux) {
 609                 *evt |= EVENT_TIMER_MUX;
 610                 chip->timer_mux = T_DISABLED;
 611         }
 612
 613         if (!chip->timer_state) {
 614                 *evt |= EVENT_TIMER_STATE;
 615                 chip->timer_state = T_DISABLED;
 616         }
 617
 618         if (chip->work_continue) {
 619                 *evt |= EVENT_WORK_CONTINUE;
 620                 chip->work_continue = 0;
 621         }
 622 }
 623
 624 static void set_state_unattached(struct fusb30x_chip *chip)
 625 {
 626         dev_info(chip->dev, "connection has disconnected\n");
 627         tcpm_init(chip);
 628         tcpm_set_rx_enable(chip, 0);
 629         chip->conn_state = unattached;
 630         tcpm_set_cc(chip, FUSB_MODE_DRP);
 631
 632         /* claer notify_info */
 633         memset(&chip->notify, 0, sizeof(struct notify_info));
 634         platform_fusb_notify(chip);
 635
 636         msleep(100);
 637 }
 638
 639 static int tcpm_check_vbus(struct fusb30x_chip *chip)
 640 {
 641         u8 val;
 642
 643         /* Read status register */
 644         regmap_read(chip->regmap, FUSB_REG_STATUS0, (u32 *)&val);
 645
 646         return (val & STATUS0_VBUSOK) ? 1 : 0;
 647 }
 648
 649 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 650 {
 651         int i;
 652         struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
 653
 654         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 655                          ((chip->notify.power_role & 0x1) << 8) |
 656                          (1 << 6) |
 657                          ((chip->notify.data_role & 0x1) << 5);
 658
 659         if (is_DMT) {
 660                 switch (cmd) {
 661                 case DMT_SOURCECAPABILITIES:
 662                         chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
 663
 664                         for (i = 0; i < chip->n_caps_used; i++) {
 665                                 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
 666                                                     (pd_cap_info->dual_role_power << 29) |
 667                                                     (pd_cap_info->usb_suspend_support << 28) |
 668                                                     (pd_cap_info->externally_powered << 27) |
 669                                                     (pd_cap_info->usb_communications_cap << 26) |
 670                                                     (pd_cap_info->data_role_swap << 25) |
 671                                                     (pd_cap_info->peak_current << 20) |
 672                                                     (chip->source_power_supply[i] << 10) |
 673                                                     (chip->source_max_current[i]);
 674                         }
 675                         break;
 676                 case DMT_REQUEST:
 677                         chip->send_head |= ((1 << 12) | (cmd & 0xf));
 678                         /* send request with FVRDO */
 679                         chip->send_load[0] = (chip->pos_power << 28) |
 680                                             (0 << 27) |
 681                                             (1 << 26) |
 682                                             (0 << 25) |
 683                                             (0 << 24);
 684
 685                         switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
 686                         case 0:
 687                                 /* Fixed Supply */
 688                                 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 689                                 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 690                                 break;
 691                         case 1:
 692                                 /* Battery */
 693                                 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 694                                 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 695                                 break;
 696                         default:
 697                                 /* not meet battery caps */
 698                                 break;
 699                         }
 700                         break;
 701                 case DMT_SINKCAPABILITIES:
 702                         break;
 703                 case DMT_VENDERDEFINED:
 704                         break;
 705                 default:
 706                         break;
 707                 }
 708         } else {
 709                 chip->send_head |= (cmd & 0xf);
 710         }
 711 }
 712
 713 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 714 {
 715         chip->send_head = (chip->msg_id & 0x7) << 9;
 716         chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 717
 718         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 719                          ((chip->notify.power_role & 0x1) << 8) |
 720                          (1 << 6) |
 721                          ((chip->notify.data_role & 0x1) << 5) |
 722                          (DMT_VENDERDEFINED & 0xf);
 723
 724         chip->send_load[0] = (1 << 15) |
 725                             (0 << 13) |
 726                             (type << 6) |
 727                             (cmd);
 728
 729         switch (cmd) {
 730         case VDM_DISCOVERY_ID:
 731         case VDM_DISCOVERY_SVIDS:
 732         case VDM_ATTENTION:
 733                 chip->send_load[0] |= (0xff00 << 16);
 734                 chip->send_head |= (1 << 12);
 735                 break;
 736         case VDM_DISCOVERY_MODES:
 737                 chip->send_load[0] |=
 738                         (chip->vdm_svid[chip->val_tmp >> 1] << 16);
 739                 chip->send_head |= (1 << 12);
 740                 break;
 741         case VDM_ENTER_MODE:
 742                 chip->send_head |= (1 << 12);
 743                 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
 744                 break;
 745         case VDM_EXIT_MODE:
 746                 chip->send_head |= (1 << 12);
 747                 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
 748                 break;
 749         case VDM_DP_STATUS_UPDATE:
 750                 chip->send_head |= (2 << 12);
 751                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 752                 chip->send_load[1] = 5;
 753                 break;
 754         case VDM_DP_CONFIG:
 755                 chip->send_head |= (2 << 12);
 756                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 757                 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 758                                     (1 << 2) | 2;
 759                 break;
 760         default:
 761                 break;
 762         }
 763 }
 764
 765 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
 766 {
 767         switch (chip->tx_state) {
 768         case 0:
 769                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 770                                    CONTROL3_SEND_HARDRESET,
 771                                    CONTROL3_SEND_HARDRESET);
 772                 chip->tx_state = tx_busy;
 773                 chip->timer_state = T_BMC_TIMEOUT;
 774                 fusb_timer_start(&chip->timer_state_machine,
 775                                  chip->timer_state);
 776                 break;
 777         default:
 778                 if (evt & EVENT_TIMER_STATE)
 779                         chip->tx_state = tx_success;
 780                 break;
 781         }
 782         return chip->tx_state;
 783 }
 784
 785 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
 786 {
 787         u8 senddata[40];
 788         int pos = 0;
 789         u8 len;
 790
 791         switch (chip->tx_state) {
 792         case 0:
 793                 senddata[pos++] = FUSB_TKN_SYNC1;
 794                 senddata[pos++] = FUSB_TKN_SYNC1;
 795                 senddata[pos++] = FUSB_TKN_SYNC1;
 796                 senddata[pos++] = FUSB_TKN_SYNC2;
 797
 798                 len = PD_HEADER_CNT(chip->send_head) << 2;
 799                 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
 800
 801                 senddata[pos++] = chip->send_head & 0xff;
 802                 senddata[pos++] = (chip->send_head >> 8) & 0xff;
 803
 804                 memcpy(&senddata[pos], chip->send_load, len);
 805                 pos += len;
 806
 807                 senddata[pos++] = FUSB_TKN_JAMCRC;
 808                 senddata[pos++] = FUSB_TKN_EOP;
 809                 senddata[pos++] = FUSB_TKN_TXOFF;
 810                 senddata[pos++] = FUSB_TKN_TXON;
 811
 812                 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
 813                 chip->tx_state = tx_busy;
 814                 break;
 815
 816         default:
 817                 /* wait Tx result */
 818                 break;
 819         }
 820
 821         return chip->tx_state;
 822 }
 823
 824 static void process_vdm_msg(struct fusb30x_chip *chip)
 825 {
 826         u32 vdm_header = chip->rec_load[0];
 827         int i;
 828         u32 tmp;
 829
 830         /* can't procee unstructed vdm msg */
 831         if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
 832                 return;
 833
 834         switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
 835         case VDM_TYPE_INIT:
 836                 switch (GET_VDMHEAD_CMD(vdm_header)) {
 837                 case VDM_ATTENTION:
 838                         dev_info(chip->dev, "attention, dp_status %x\n",
 839                                  chip->rec_load[1]);
 840                         chip->notify.attention = 1;
 841                         chip->vdm_state = 6;
 842                         break;
 843                 default:
 844                         dev_warn(chip->dev, "rec unknown init vdm msg\n");
 845                         break;
 846                 }
 847                 break;
 848         case VDM_TYPE_ACK:
 849                 switch (GET_VDMHEAD_CMD(vdm_header)) {
 850                 case VDM_DISCOVERY_ID:
 851                         chip->vdm_id = chip->rec_load[1];
 852                         break;
 853                 case VDM_DISCOVERY_SVIDS:
 854                         for (i = 0; i < 6; i++) {
 855                                 tmp = (chip->rec_load[i + 1] >> 16) &
 856                                       0x0000ffff;
 857                                 if (tmp) {
 858                                         chip->vdm_svid[i * 2] = tmp;
 859                                         chip->vdm_svid_num++;
 860                                 } else {
 861                                         break;
 862                                 }
 863
 864                                 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
 865                                 if (tmp) {
 866                                         chip->vdm_svid[i * 2 + 1] = tmp;
 867                                         chip->vdm_svid_num++;
 868                                 } else {
 869                                         break;
 870                                 }
 871                         }
 872                         break;
 873                 case VDM_DISCOVERY_MODES:
 874                         /* indicate there are some vdo modes */
 875                         if (PD_HEADER_CNT(chip->rec_head) > 1) {
 876                                 /*
 877                                  * store mode config,
 878                                  * enter first mode default
 879                                  */
 880                                 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
 881                                         chip->val_tmp |= 1;
 882                                         break;
 883                                 }
 884                                 chip->notify.pin_assignment_support = 0;
 885                                 chip->notify.pin_assignment_def = 0;
 886                                 chip->notify.pin_assignment_support =
 887                                         (chip->rec_load[1] >> 8) & 0x3f;
 888                                 tmp = chip->notify.pin_assignment_support;
 889                                 for (i = 0; i < 6; i++) {
 890                                         if (!(tmp & 0x20))
 891                                                 tmp = tmp << 1;
 892                                         else
 893                                                 break;
 894                                 }
 895                                 chip->notify.pin_assignment_def = 0x20 >> i;
 896                                 chip->val_tmp |= 1;
 897                         }
 898                         break;
 899                 case VDM_ENTER_MODE:
 900                         chip->val_tmp = 1;
 901                         break;
 902                 case VDM_DP_STATUS_UPDATE:
 903                         dev_dbg(chip->dev, "dp_status 0x%x\n",
 904                                 chip->rec_load[1]);
 905                         chip->val_tmp = 1;
 906                         break;
 907                 case VDM_DP_CONFIG:
 908                         chip->val_tmp = 1;
 909                         dev_info(chip->dev,
 910                                  "DP config successful, pin_assignment 0x%x\n",
 911                                  chip->notify.pin_assignment_def);
 912                         chip->notify.is_enter_mode = 1;
 913                         break;
 914                 default:
 915                         break;
 916                 }
 917                 break;
 918         case VDM_TYPE_NACK:
 919                         dev_warn(chip->dev, "REC NACK for 0x%x\n",
 920                                  GET_VDMHEAD_CMD(vdm_header));
 921                         /* disable vdm */
 922                         chip->vdm_state = 0xff;
 923                 break;
 924         }
 925 }
 926
 927 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
 928 {
 929         int tmp;
 930
 931         switch (chip->vdm_send_state) {
 932         case 0:
 933                 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
 934                 chip->vdm_id = 0;
 935                 chip->tx_state = 0;
 936                 chip->vdm_send_state++;
 937         case 1:
 938                 tmp = policy_send_data(chip);
 939                 if (tmp == tx_success) {
 940                         chip->vdm_send_state++;
 941                         chip->timer_state = T_SENDER_RESPONSE;
 942                         fusb_timer_start(&chip->timer_state_machine,
 943                                          chip->timer_state);
 944                 } else if (tmp == tx_failed) {
 945                         dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
 946                         /* disable auto_vdm_machine */
 947                         chip->vdm_state = 0xff;
 948                 }
 949
 950                 if (chip->vdm_send_state != 2)
 951                         break;
 952         default:
 953                 if (evt & EVENT_TIMER_STATE) {
 954                         dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
 955                         chip->vdm_state = 0xff;
 956                         chip->work_continue = 1;
 957                 }
 958
 959                 if (!chip->vdm_id)
 960                         break;
 961                 chip->vdm_send_state = 0;
 962                 return 0;
 963         }
 964         return -EINPROGRESS;
 965 }
 966
 967 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
 968 {
 969         int tmp;
 970
 971         switch (chip->vdm_send_state) {
 972         case 0:
 973                 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
 974                 memset(chip->vdm_svid, 0, 12);
 975                 chip->vdm_svid_num = 0;
 976                 chip->tx_state = 0;
 977                 chip->vdm_send_state++;
 978         case 1:
 979                 tmp = policy_send_data(chip);
 980                 if (tmp == tx_success) {
 981                         chip->vdm_send_state++;
 982                         chip->timer_state = T_SENDER_RESPONSE;
 983                         fusb_timer_start(&chip->timer_state_machine,
 984                                          chip->timer_state);
 985                 } else if (tmp == tx_failed) {
 986                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
 987                         /* disable auto_vdm_machine */
 988                         chip->vdm_state = 0xff;
 989                 }
 990
 991                 if (chip->vdm_send_state != 2)
 992                         break;
 993         default:
 994                 if (evt & EVENT_TIMER_STATE) {
 995                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
 996                         chip->vdm_state = 0xff;
 997                         chip->work_continue = 1;
 998                 }
 999
1000                 if (!chip->vdm_svid_num)
1001                         break;
1002                 chip->vdm_send_state = 0;
1003                 return 0;
1004         }
1005         return -EINPROGRESS;
1006 }
1007
1008 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1009 {
1010         int tmp;
1011
1012         if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1013                 switch (chip->vdm_send_state) {
1014                 case 0:
1015                         set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1016                                      VDM_TYPE_INIT, 0);
1017                         chip->tx_state = 0;
1018                         chip->vdm_send_state++;
1019                 case 1:
1020                         tmp = policy_send_data(chip);
1021                         if (tmp == tx_success) {
1022                                 chip->vdm_send_state++;
1023                                 chip->timer_state = T_SENDER_RESPONSE;
1024                                 fusb_timer_start(&chip->timer_state_machine,
1025                                                  chip->timer_state);
1026                         } else if (tmp == tx_failed) {
1027                                 dev_warn(chip->dev,
1028                                          "VDM_DISCOVERY_MODES send failed\n");
1029                                 chip->vdm_state = 0xff;
1030                         }
1031
1032                         if (chip->vdm_send_state != 2)
1033                                 break;
1034                 default:
1035                         if (evt & EVENT_TIMER_STATE) {
1036                                 dev_warn(chip->dev,
1037                                          "VDM_DISCOVERY_MODES time out\n");
1038                                 chip->vdm_state = 0xff;
1039                                 chip->work_continue = 1;
1040                         }
1041
1042                         if (!(chip->val_tmp & 1))
1043                                 break;
1044                         chip->val_tmp &= 0xfe;
1045                         chip->val_tmp += 2;
1046                         chip->vdm_send_state = 0;
1047                         chip->work_continue = 1;
1048                         break;
1049                 }
1050         } else {
1051                 chip->val_tmp = 0;
1052                 return 0;
1053         }
1054
1055         return -EINPROGRESS;
1056 }
1057
1058 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1059 {
1060         int tmp;
1061
1062         switch (chip->vdm_send_state) {
1063         case 0:
1064                 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1065                 chip->tx_state = 0;
1066                 chip->vdm_send_state++;
1067                 chip->notify.is_enter_mode = 0;
1068         case 1:
1069                 tmp = policy_send_data(chip);
1070                 if (tmp == tx_success) {
1071                         chip->vdm_send_state++;
1072                         chip->timer_state = T_SENDER_RESPONSE;
1073                         fusb_timer_start(&chip->timer_state_machine,
1074                                          chip->timer_state);
1075                 } else if (tmp == tx_failed) {
1076                         dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1077                         /* disable auto_vdm_machine */
1078                         chip->vdm_state = 0xff;
1079                 }
1080
1081                 if (chip->vdm_send_state != 2)
1082                         break;
1083         default:
1084                 if (evt & EVENT_TIMER_STATE) {
1085                         dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1086                         chip->vdm_state = 0xff;
1087                         chip->work_continue = 1;
1088                 }
1089
1090                 if (!chip->val_tmp)
1091                         break;
1092                 chip->val_tmp = 0;
1093                 chip->vdm_send_state = 0;
1094                 return 0;
1095         }
1096         return -EINPROGRESS;
1097 }
1098
1099 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1100 {
1101         int tmp;
1102
1103         switch (chip->vdm_send_state) {
1104         case 0:
1105                 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1106                 chip->tx_state = 0;
1107                 chip->vdm_send_state++;
1108         case 1:
1109                 tmp = policy_send_data(chip);
1110                 if (tmp == tx_success) {
1111                         chip->vdm_send_state++;
1112                         chip->timer_state = T_SENDER_RESPONSE;
1113                         fusb_timer_start(&chip->timer_state_machine,
1114                                          chip->timer_state);
1115                 } else if (tmp == tx_failed) {
1116                         dev_warn(chip->dev,
1117                                  "VDM_DP_STATUS_UPDATE send failed\n");
1118                         /* disable auto_vdm_machine */
1119                         chip->vdm_state = 0xff;
1120                 }
1121
1122                 if (chip->vdm_send_state != 2)
1123                         break;
1124         default:
1125                 if (evt & EVENT_TIMER_STATE) {
1126                         dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1127                         chip->vdm_state = 0xff;
1128                         chip->work_continue = 1;
1129                 }
1130
1131                 if (!chip->val_tmp)
1132                         break;
1133                 chip->val_tmp = 0;
1134                 chip->vdm_send_state = 0;
1135                 return 0;
1136         }
1137         return -EINPROGRESS;
1138 }
1139
1140 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1141 {
1142         int tmp;
1143
1144         switch (chip->vdm_send_state) {
1145         case 0:
1146                 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1147                 chip->tx_state = 0;
1148                 chip->vdm_send_state++;
1149         case 1:
1150                 tmp = policy_send_data(chip);
1151                 if (tmp == tx_success) {
1152                         chip->vdm_send_state++;
1153                         chip->timer_state = T_SENDER_RESPONSE;
1154                         fusb_timer_start(&chip->timer_state_machine,
1155                                          chip->timer_state);
1156                 } else if (tmp == tx_failed) {
1157                         dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1158                         /* disable auto_vdm_machine */
1159                         chip->vdm_state = 0xff;
1160                 }
1161
1162                 if (chip->vdm_send_state != 2)
1163                         break;
1164         default:
1165                 if (evt & EVENT_TIMER_STATE) {
1166                         dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1167                         chip->vdm_state = 0xff;
1168                         chip->work_continue = 1;
1169                 }
1170
1171                 if (!chip->val_tmp)
1172                         break;
1173                 chip->val_tmp = 0;
1174                 chip->vdm_send_state = 0;
1175                 return 0;
1176         }
1177         return -EINPROGRESS;
1178 }
1179
1180 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1181 {
1182         switch (chip->vdm_state) {
1183         case 0:
1184                 if (vdm_send_discoveryid(chip, evt))
1185                         break;
1186                 chip->vdm_state++;
1187                 /* without break */
1188         case 1:
1189                 if (vdm_send_discoverysvid(chip, evt))
1190                         break;
1191                 chip->vdm_state++;
1192                 /* without break */
1193         case 2:
1194                 if (vdm_send_discoverymodes(chip, evt))
1195                         break;
1196                 chip->vdm_state++;
1197                 /* without break */
1198         case 3:
1199                 if (vdm_send_entermode(chip, evt))
1200                         break;
1201                 chip->vdm_state++;
1202                 /* without break */
1203         case 4:
1204                 if (vdm_send_dpconfig(chip, evt))
1205                         break;
1206                 chip->vdm_state = 6;
1207                 /* without break */
1208         case 5:
1209                 if (vdm_send_getdpstatus(chip, evt))
1210                         break;
1211                 chip->vdm_state++;
1212                 /* without break */
1213         default:
1214                 platform_fusb_notify(chip);
1215                 break;
1216         }
1217 }
1218
1219 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1220 {
1221         platform_fusb_notify(chip);
1222 }
1223
1224 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1225 {
1226         chip->notify.is_cc_connected = 0;
1227         if ((evt & EVENT_CC) && chip->cc_state) {
1228                 if (chip->cc_state & 0x04)
1229                         set_state(chip, attach_wait_sink);
1230                 else
1231                         set_state(chip, attach_wait_source);
1232
1233                 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1234                 chip->debounce_cnt = 0;
1235                 chip->timer_mux = 2;
1236                 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1237         }
1238 }
1239
1240 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1241 {
1242         int cc1, cc2;
1243
1244         if (evt & EVENT_TIMER_MUX) {
1245                 tcpm_get_cc(chip, &cc1, &cc2);
1246
1247                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1248                         chip->debounce_cnt++;
1249                 } else {
1250                         chip->cc1 = cc1;
1251                         chip->cc2 = cc2;
1252                         chip->debounce_cnt = 0;
1253                 }
1254
1255                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1256                         if ((chip->cc1 != chip->cc2) &&
1257                             ((!chip->cc1) || (!chip->cc2))) {
1258                                 set_state(chip, attached_sink);
1259                         } else {
1260                                 set_state_unattached(chip);
1261                         }
1262                         return;
1263                 }
1264
1265                 chip->timer_mux = 2;
1266                 fusb_timer_start(&chip->timer_mux_machine,
1267                                  chip->timer_mux);
1268         }
1269 }
1270
1271 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1272 {
1273         int cc1, cc2;
1274
1275         if (evt & EVENT_TIMER_MUX) {
1276                 tcpm_get_cc(chip, &cc1, &cc2);
1277
1278                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1279                         chip->debounce_cnt++;
1280                 } else {
1281                         chip->cc1 = cc1;
1282                         chip->cc2 = cc2;
1283                         chip->debounce_cnt = 0;
1284                 }
1285
1286                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1287                         if (((!chip->cc1) || (!chip->cc2)) &&
1288                             ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1289                              (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1290                                 set_state(chip, attached_source);
1291                         } else {
1292                                 set_state_unattached(chip);
1293                         }
1294
1295                         return;
1296                 }
1297
1298                 chip->timer_mux = 2;
1299                 fusb_timer_start(&chip->timer_mux_machine,
1300                                  chip->timer_mux);
1301         }
1302 }
1303
1304 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1305 {
1306         tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1307         extcon_set_state(chip->extcon, EXTCON_USB_HOST, 1);
1308         platform_set_vbus_lvl_enable(chip, 1, 0);
1309         tcpm_set_vconn(chip, 1);
1310
1311         chip->notify.is_cc_connected = 1;
1312         if (chip->cc_state & 0x01)
1313                 chip->cc_polarity = 0;
1314         else
1315                 chip->cc_polarity = 1;
1316
1317         chip->notify.power_role = 1;
1318         chip->notify.data_role = 1;
1319         chip->hardrst_count = 0;
1320         set_state(chip, policy_src_startup);
1321         dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1322 }
1323
1324 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1325 {
1326         chip->notify.is_cc_connected = 1;
1327         if (chip->cc_state & 0x01)
1328                 chip->cc_polarity = 0;
1329         else
1330                 chip->cc_polarity = 1;
1331
1332         chip->notify.power_role = 0;
1333         chip->notify.data_role = 0;
1334         chip->hardrst_count = 0;
1335         set_state(chip, policy_snk_startup);
1336         dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1337 }
1338
1339 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1340 {
1341         chip->caps_counter = 0;
1342         chip->notify.is_pd_connected = 0;
1343         chip->msg_id = 0;
1344         chip->vdm_state = 0;
1345         chip->vdm_substate = 0;
1346         chip->vdm_send_state = 0;
1347         chip->val_tmp = 0;
1348
1349         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1350
1351         tcpm_set_msg_header(chip);
1352         tcpm_set_polarity(chip, chip->cc_polarity);
1353         tcpm_set_rx_enable(chip, 1);
1354
1355         set_state(chip, policy_src_send_caps);
1356 }
1357
1358 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1359 {
1360         switch (chip->sub_state) {
1361         case 0:
1362                 chip->caps_counter++;
1363
1364                 if (chip->caps_counter < N_CAPS_COUNT) {
1365                         chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1366                         fusb_timer_start(&chip->timer_state_machine,
1367                                          chip->timer_state);
1368                         chip->sub_state = 1;
1369                 } else {
1370                         set_state(chip, disabled);
1371                 }
1372                 break;
1373         default:
1374                 if (evt & EVENT_TIMER_STATE) {
1375                         set_state(chip, policy_src_send_caps);
1376                 } else if ((evt & EVENT_TIMER_MUX) &&
1377                            (chip->hardrst_count > N_HARDRESET_COUNT)) {
1378                         if (chip->notify.is_pd_connected)
1379                                 set_state(chip, error_recovery);
1380                         else
1381                                 set_state(chip, disabled);
1382                 }
1383                 break;
1384         }
1385 }
1386
1387 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1388 {
1389         u32 tmp;
1390
1391         switch (chip->sub_state) {
1392         case 0:
1393                 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1394                 chip->sub_state = 1;
1395                 chip->tx_state = tx_idle;
1396                 /* without break */
1397         case 1:
1398                 tmp = policy_send_data(chip);
1399
1400                 if (tmp == tx_success) {
1401                         chip->hardrst_count = 0;
1402                         chip->caps_counter = 0;
1403                         chip->timer_state = T_SENDER_RESPONSE;
1404                         fusb_timer_start(&chip->timer_state_machine,
1405                                          chip->timer_state);
1406                         chip->timer_mux = T_DISABLED;
1407                         chip->sub_state++;
1408                 } else if (tmp == tx_failed) {
1409                         set_state(chip, policy_src_discovery);
1410                         break;
1411                 }
1412
1413                 if (!(evt & FLAG_EVENT))
1414                         break;
1415         default:
1416                 if (evt & EVENT_RX) {
1417                         if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1418                             (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1419                                 set_state(chip, policy_src_negotiate_cap);
1420                         } else {
1421                                 set_state(chip, policy_src_send_softrst);
1422                         }
1423                 } else if (evt & EVENT_TIMER_STATE) {
1424                         if (chip->hardrst_count <= N_HARDRESET_COUNT)
1425                                 set_state(chip, policy_src_send_hardrst);
1426                         else
1427                                 set_state(chip, disabled);
1428                 } else if (evt & EVENT_TIMER_MUX) {
1429                         if (chip->notify.is_pd_connected)
1430                                 set_state(chip, disabled);
1431                         else
1432                                 set_state(chip, error_recovery);
1433                 }
1434                 break;
1435         }
1436 }
1437
1438 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1439 {
1440         u32 tmp;
1441
1442         /* base on evb1 */
1443         tmp = (chip->rec_load[0] >> 28) & 0x07;
1444         if (tmp > chip->n_caps_used)
1445                 set_state(chip, policy_src_cap_response);
1446         else
1447                 set_state(chip, policy_src_transition_supply);
1448 }
1449
1450 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1451                                              int evt)
1452 {
1453         u32 tmp;
1454
1455         switch (chip->sub_state) {
1456         case 0:
1457                 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1458                 chip->tx_state = tx_idle;
1459                 chip->sub_state++;
1460                 /* without break */
1461         case 1:
1462                 tmp = policy_send_data(chip);
1463                 if (tmp == tx_success) {
1464                         chip->timer_state = T_SRC_TRANSITION;
1465                         chip->sub_state++;
1466                         fusb_timer_start(&chip->timer_state_machine,
1467                                          chip->timer_state);
1468                 } else if (tmp == tx_failed) {
1469                         set_state(chip, policy_src_send_softrst);
1470                 }
1471                 break;
1472         case 2:
1473                 if (evt & EVENT_TIMER_STATE) {
1474                         chip->notify.is_pd_connected = 1;
1475                         platform_set_vbus_lvl_enable(chip, 1, 0);
1476                         set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1477                         chip->tx_state = tx_idle;
1478                         chip->sub_state++;
1479                         chip->work_continue = 1;
1480                 }
1481                 break;
1482         default:
1483                 tmp = policy_send_data(chip);
1484                 if (tmp == tx_success) {
1485                         dev_info(chip->dev,
1486                                  "PD connected as DFP, supporting 5V\n");
1487                         set_state(chip, policy_src_ready);
1488                 } else if (tmp == tx_failed) {
1489                         set_state(chip, policy_src_send_softrst);
1490                 }
1491                 break;
1492         }
1493 }
1494
1495 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1496 {
1497         u32 tmp;
1498
1499         switch (chip->sub_state) {
1500         case 0:
1501                 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1502                 chip->tx_state = tx_idle;
1503                 chip->sub_state++;
1504                 /* without break */
1505         default:
1506                 tmp = policy_send_data(chip);
1507                 if (tmp == tx_success) {
1508                         if (chip->notify.is_pd_connected) {
1509                                 dev_info(chip->dev,
1510                                          "PD connected as DFP, supporting 5V\n");
1511                                 set_state(chip, policy_src_ready);
1512                         } else {
1513                                 set_state(chip, policy_src_send_hardrst);
1514                         }
1515                 } else if (tmp == tx_failed) {
1516                         set_state(chip, policy_src_send_softrst);
1517                 }
1518                 break;
1519         }
1520 }
1521
1522 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1523                                               int evt)
1524 {
1525         switch (chip->sub_state) {
1526         case 0:
1527                 chip->notify.is_pd_connected = 0;
1528                 platform_set_vbus_lvl_enable(chip, 0, 0);
1529                 if (chip->notify.data_role)
1530                         regmap_update_bits(chip->regmap,
1531                                            FUSB_REG_SWITCHES1,
1532                                            SWITCHES1_DATAROLE,
1533                                            SWITCHES1_DATAROLE);
1534                 else
1535                         regmap_update_bits(chip->regmap,
1536                                            FUSB_REG_SWITCHES1,
1537                                            SWITCHES1_DATAROLE,
1538                                            0);
1539
1540                 chip->timer_state = T_SRC_RECOVER;
1541                 fusb_timer_start(&chip->timer_state_machine,
1542                                  chip->timer_state);
1543                 chip->sub_state++;
1544                 break;
1545         default:
1546                 if (evt & EVENT_TIMER_STATE) {
1547                         platform_set_vbus_lvl_enable(chip, 1, 0);
1548                         chip->timer_mux = T_NO_RESPONSE;
1549                         fusb_timer_start(&chip->timer_mux_machine,
1550                                          chip->timer_mux);
1551                         set_state(chip, policy_src_startup);
1552                         dev_dbg(chip->dev, "reset over-> src startup\n");
1553                 }
1554                 break;
1555         }
1556 }
1557
1558 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1559 {
1560         if (evt & EVENT_RX) {
1561                 if ((PD_HEADER_CNT(chip->rec_head)) &&
1562                     (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1563                         process_vdm_msg(chip);
1564                         chip->work_continue = 1;
1565                         chip->timer_state = T_DISABLED;
1566                 }
1567         }
1568
1569         /* TODO: swap function would be added here later on*/
1570
1571         if (!chip->partner_cap[0])
1572                 set_state(chip, policy_src_get_sink_caps);
1573         else
1574                 auto_vdm_machine(chip, evt);
1575 }
1576
1577 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1578 {
1579         u32 tmp;
1580
1581         switch (chip->sub_state) {
1582         case 0:
1583                 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1584                 chip->tx_state = tx_idle;
1585                 chip->sub_state++;
1586                 /* without break */
1587         case 1:
1588                 tmp = policy_send_data(chip);
1589                 if (tmp == tx_success) {
1590                         chip->timer_state = T_SENDER_RESPONSE;
1591                         chip->sub_state++;
1592                         fusb_timer_start(&chip->timer_state_machine,
1593                                          chip->timer_state);
1594                 } else if (tmp == tx_failed) {
1595                         set_state(chip, policy_src_send_softrst);
1596                 }
1597
1598                 if (!(evt & FLAG_EVENT))
1599                         break;
1600         default:
1601                 if (evt & EVENT_RX) {
1602                         if ((PD_HEADER_CNT(chip->rec_head)) &&
1603                             (PD_HEADER_TYPE(chip->rec_head) ==
1604                              DMT_SINKCAPABILITIES)) {
1605                                 for (tmp = 0;
1606                                      tmp < PD_HEADER_CNT(chip->rec_head);
1607                                      tmp++) {
1608                                         chip->partner_cap[tmp] =
1609                                                 chip->rec_load[tmp];
1610                                 }
1611                                 set_state(chip, policy_src_ready);
1612                         } else {
1613                                 chip->partner_cap[0] = 0xffffffff;
1614                                 set_state(chip, policy_src_ready);
1615                         }
1616                 } else if (evt & EVENT_TIMER_STATE) {
1617                         dev_warn(chip->dev, "Get sink cap time out\n");
1618                         chip->partner_cap[0] = 0xffffffff;
1619                         set_state(chip, policy_src_ready);
1620                 }
1621         }
1622 }
1623
1624 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1625 {
1626         u32 tmp;
1627
1628         switch (chip->sub_state) {
1629         case 0:
1630                 chip->tx_state = tx_idle;
1631                 chip->sub_state++;
1632                 /* without break */
1633         default:
1634                 tmp = policy_send_hardrst(chip, evt);
1635                 if (tmp == tx_success) {
1636                         chip->hardrst_count++;
1637                         set_state(chip, policy_src_transition_default);
1638                 } else if (tmp == tx_failed) {
1639                         /* can't reach here */
1640                         set_state(chip, error_recovery);
1641                 }
1642                 break;
1643         }
1644 }
1645
1646 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1647 {
1648         u32 tmp;
1649
1650         switch (chip->sub_state) {
1651         case 0:
1652                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1653                 chip->tx_state = tx_idle;
1654                 chip->sub_state++;
1655                 /* without break */
1656         case 1:
1657                 tmp = policy_send_data(chip);
1658                 if (tmp == tx_success) {
1659                         chip->timer_state = T_SENDER_RESPONSE;
1660                         chip->sub_state++;
1661                         fusb_timer_start(&chip->timer_state_machine,
1662                                          chip->timer_state);
1663                 } else if (tmp == tx_failed) {
1664                         set_state(chip, policy_src_send_hardrst);
1665                 }
1666
1667                 if (!(evt & FLAG_EVENT))
1668                         break;
1669         default:
1670                 if (evt & EVENT_RX) {
1671                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1672                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1673                                 set_state(chip, policy_src_send_caps);
1674                 } else if (evt & EVENT_TIMER_STATE) {
1675                         set_state(chip, policy_src_send_hardrst);
1676                 }
1677                 break;
1678         }
1679 }
1680
1681 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1682 {
1683         chip->notify.is_pd_connected = 0;
1684         chip->msg_id = 0;
1685         chip->vdm_state = 0;
1686         chip->vdm_substate = 0;
1687         chip->vdm_send_state = 0;
1688         chip->val_tmp = 0;
1689         chip->pos_power = 0;
1690
1691         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1692
1693         tcpm_set_msg_header(chip);
1694         tcpm_set_polarity(chip, chip->cc_polarity);
1695         tcpm_set_rx_enable(chip, 1);
1696         set_state(chip, policy_snk_discovery);
1697 }
1698
1699 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1700 {
1701         set_state(chip, policy_snk_wait_caps);
1702         chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1703         fusb_timer_start(&chip->timer_state_machine,
1704                          chip->timer_state);
1705 }
1706
1707 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1708 {
1709         if (evt & EVENT_RX) {
1710                 if (PD_HEADER_CNT(chip->rec_head) &&
1711                     PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1712                         chip->timer_mux = T_DISABLED;
1713                         set_state(chip, policy_snk_evaluate_caps);
1714                 }
1715         } else if (evt & EVENT_TIMER_STATE) {
1716                 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1717                         set_state(chip, policy_snk_send_hardrst);
1718                 else
1719                         set_state(chip, disabled);
1720         } else if ((evt & EVENT_TIMER_MUX) &&
1721                    (chip->hardrst_count > N_HARDRESET_COUNT)) {
1722                 if (chip->notify.is_pd_connected)
1723                         set_state(chip, error_recovery);
1724                 else
1725                         set_state(chip, disabled);
1726         }
1727 }
1728
1729 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1730 {
1731         u32 tmp;
1732
1733         chip->hardrst_count = 0;
1734         chip->pos_power = 0;
1735
1736         for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1737                 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1738                 case 0:
1739                         /* Fixed Supply */
1740                         if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1741                                 chip->pos_power = tmp + 1;
1742                         break;
1743                 case 1:
1744                         /* Battery */
1745                         if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1746                                 chip->pos_power = tmp + 1;
1747                         break;
1748                 default:
1749                         /* not meet battery caps */
1750                         break;
1751                 }
1752         }
1753
1754         if ((!chip->pos_power) || (chip->pos_power > 7)) {
1755                 chip->pos_power = 0;
1756                 set_state(chip, policy_snk_wait_caps);
1757         } else {
1758                 set_state(chip, policy_snk_select_cap);
1759         }
1760 }
1761
1762 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1763 {
1764         u32 tmp;
1765
1766         switch (chip->sub_state) {
1767         case 0:
1768                 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1769                 chip->sub_state = 1;
1770                 chip->tx_state = tx_idle;
1771                 /* without break */
1772         case 1:
1773                 tmp = policy_send_data(chip);
1774
1775                 if (tmp == tx_success) {
1776                         chip->timer_state = T_SENDER_RESPONSE;
1777                         fusb_timer_start(&chip->timer_state_machine,
1778                                          chip->timer_state);
1779                         chip->sub_state++;
1780                 } else if (tmp == tx_failed) {
1781                         set_state(chip, policy_snk_discovery);
1782                         break;
1783                 }
1784
1785                 if (!(evt & FLAG_EVENT))
1786                         break;
1787         default:
1788                 if (evt & EVENT_RX) {
1789                         if (!PD_HEADER_CNT(chip->rec_head)) {
1790                                 switch (PD_HEADER_TYPE(chip->rec_head)) {
1791                                 case CMT_ACCEPT:
1792                                         set_state(chip,
1793                                                   policy_snk_transition_sink);
1794                                         chip->timer_state = T_PS_TRANSITION;
1795                                         fusb_timer_start(&chip->timer_state_machine,
1796                                                          chip->timer_state);
1797                                         break;
1798                                 case CMT_WAIT:
1799                                 case CMT_REJECT:
1800                                         if (chip->notify.is_pd_connected) {
1801                                                 dev_info(chip->dev,
1802                                                          "PD connected as UFP, fetching 5V\n");
1803                                                 set_state(chip,
1804                                                           policy_snk_ready);
1805                                         } else {
1806                                                 set_state(chip,
1807                                                           policy_snk_wait_caps);
1808                                                 /*
1809                                                  * make sure don't send
1810                                                  * hard reset to prevent
1811                                                  * infinite loop
1812                                                  */
1813                                                 chip->hardrst_count =
1814                                                         N_HARDRESET_COUNT + 1;
1815                                         }
1816                                         break;
1817                                 default:
1818                                         break;
1819                                 }
1820                         }
1821                 } else if (evt & EVENT_TIMER_STATE) {
1822                         set_state(chip, policy_snk_send_hardrst);
1823                 }
1824                 break;
1825         }
1826 }
1827
1828 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
1829 {
1830         if (evt & EVENT_RX) {
1831                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1832                     (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
1833                         chip->notify.is_pd_connected = 1;
1834                         dev_info(chip->dev,
1835                                  "PD connected as UFP, fetching 5V\n");
1836                         set_state(chip, policy_snk_ready);
1837                 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
1838                            (PD_HEADER_TYPE(chip->rec_head) ==
1839                             DMT_SOURCECAPABILITIES)) {
1840                         set_state(chip, policy_snk_evaluate_caps);
1841                 }
1842         } else if (evt & EVENT_TIMER_STATE) {
1843                 set_state(chip, policy_snk_send_hardrst);
1844         }
1845 }
1846
1847 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
1848                                               int evt)
1849 {
1850         switch (chip->sub_state) {
1851         case 0:
1852                 chip->notify.is_pd_connected = 0;
1853                 chip->timer_mux = T_NO_RESPONSE;
1854                 fusb_timer_start(&chip->timer_mux_machine,
1855                                  chip->timer_mux);
1856                 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
1857                 fusb_timer_start(&chip->timer_state_machine,
1858                                  chip->timer_state);
1859                 if (chip->notify.data_role)
1860                         tcpm_set_msg_header(chip);
1861
1862                 chip->sub_state++;
1863         case 1:
1864                 if (!tcpm_check_vbus(chip)) {
1865                         chip->sub_state++;
1866                         chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
1867                         fusb_timer_start(&chip->timer_state_machine,
1868                                          chip->timer_state);
1869                 } else if (evt & EVENT_TIMER_STATE) {
1870                         set_state(chip, policy_snk_startup);
1871                 }
1872                 break;
1873         default:
1874                 if (tcpm_check_vbus(chip)) {
1875                         chip->timer_state = T_DISABLED;
1876                         set_state(chip, policy_snk_startup);
1877                 } else if (evt & EVENT_TIMER_STATE) {
1878                         set_state(chip, policy_snk_startup);
1879                 }
1880                 break;
1881         }
1882 }
1883
1884 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
1885 {
1886         /* TODO: snk_ready_function would be added later on*/
1887         platform_fusb_notify(chip);
1888 }
1889
1890 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
1891 {
1892         u32 tmp;
1893
1894         switch (chip->sub_state) {
1895         case 0:
1896                 chip->tx_state = tx_idle;
1897                 chip->sub_state++;
1898         default:
1899                 tmp = policy_send_hardrst(chip, evt);
1900                 if (tmp == tx_success) {
1901                         chip->hardrst_count++;
1902                         set_state(chip, policy_snk_transition_default);
1903                 } else if (tmp == tx_failed) {
1904                         set_state(chip, error_recovery);
1905                 }
1906                 break;
1907         }
1908 }
1909
1910 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
1911 {
1912         u32 tmp;
1913
1914         switch (chip->sub_state) {
1915         case 0:
1916                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1917                 chip->tx_state = tx_idle;
1918                 chip->sub_state++;
1919         case 1:
1920                 tmp = policy_send_data(chip);
1921                 if (tmp == tx_success) {
1922                         chip->timer_state = T_SENDER_RESPONSE;
1923                         chip->sub_state++;
1924                         fusb_timer_start(&chip->timer_state_machine,
1925                                          chip->timer_state);
1926                 } else if (tmp == tx_failed) {
1927                         /* can't reach here */
1928                         set_state(chip, policy_snk_send_hardrst);
1929                 }
1930
1931                 if (!(evt & FLAG_EVENT))
1932                         break;
1933         default:
1934                 if (evt & EVENT_RX) {
1935                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1936                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1937                                 set_state(chip, policy_snk_wait_caps);
1938                 } else if (evt & EVENT_TIMER_STATE) {
1939                         set_state(chip, policy_snk_send_hardrst);
1940                 }
1941                 break;
1942         }
1943 }
1944
1945 static void state_machine_typec(struct fusb30x_chip *chip)
1946 {
1947         int evt = 0;
1948         int cc1, cc2;
1949
1950         tcpc_alert(chip, &evt);
1951         mux_alert(chip, &evt);
1952         if (!evt)
1953                 goto BACK;
1954
1955         if (chip->notify.is_cc_connected) {
1956                 if (evt & EVENT_CC) {
1957                         if ((chip->cc_state & 0x04) &&
1958                             (chip->conn_state !=
1959                              policy_snk_transition_default)) {
1960                                 if (!tcpm_check_vbus(chip))
1961                                         set_state_unattached(chip);
1962                         } else if (chip->conn_state !=
1963                                    policy_src_transition_default) {
1964                                 tcpm_get_cc(chip, &cc1, &cc2);
1965                                 if (!(chip->cc_state & 0x01))
1966                                         cc1 = cc2;
1967                                 if (cc1 == TYPEC_CC_VOLT_OPEN)
1968                                         set_state_unattached(chip);
1969                         }
1970                 }
1971         }
1972
1973         if (evt & EVENT_RX) {
1974                 tcpm_get_message(chip);
1975                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1976                     (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
1977                         if (chip->notify.power_role)
1978                                 set_state(chip, policy_src_send_softrst);
1979                         else
1980                                 set_state(chip, policy_snk_send_softrst);
1981                 }
1982         }
1983
1984         if (evt & EVENT_TX) {
1985                 if (chip->tx_state == tx_success)
1986                         chip->msg_id++;
1987         }
1988         switch (chip->conn_state) {
1989         case disabled:
1990                 fusb_state_disabled(chip, evt);
1991                 break;
1992         case error_recovery:
1993                 set_state_unattached(chip);
1994                 break;
1995         case unattached:
1996                 fusb_state_unattached(chip, evt);
1997                 break;
1998         case attach_wait_sink:
1999                 fusb_state_attach_wait_sink(chip, evt);
2000                 break;
2001         case attach_wait_source:
2002                 fusb_state_attach_wait_source(chip, evt);
2003                 break;
2004         case attached_source:
2005                 fusb_state_attached_source(chip, evt);
2006                 break;
2007         case attached_sink:
2008                 fusb_state_attached_sink(chip, evt);
2009                 break;
2010
2011         /* POWER DELIVERY */
2012         case policy_src_startup:
2013                 fusb_state_src_startup(chip, evt);
2014                 break;
2015         case policy_src_discovery:
2016                 fusb_state_src_discovery(chip, evt);
2017                 break;
2018         case policy_src_send_caps:
2019                 fusb_state_src_send_caps(chip, evt);
2020                 if (chip->conn_state != policy_src_negotiate_cap)
2021                         break;
2022         case policy_src_negotiate_cap:
2023                 fusb_state_src_negotiate_cap(chip, evt);
2024
2025         case policy_src_transition_supply:
2026                 fusb_state_src_transition_supply(chip, evt);
2027                 break;
2028         case policy_src_cap_response:
2029                 fusb_state_src_cap_response(chip, evt);
2030                 break;
2031         case policy_src_transition_default:
2032                 fusb_state_src_transition_default(chip, evt);
2033                 break;
2034         case policy_src_ready:
2035                 fusb_state_src_ready(chip, evt);
2036                 break;
2037         case policy_src_get_sink_caps:
2038                 fusb_state_src_get_sink_cap(chip, evt);
2039                 break;
2040         case policy_src_send_hardrst:
2041                 fusb_state_src_send_hardreset(chip, evt);
2042                 break;
2043         case policy_src_send_softrst:
2044                 fusb_state_src_send_softreset(chip, evt);
2045                 break;
2046
2047         /* UFP */
2048         case policy_snk_startup:
2049                 fusb_state_snk_startup(chip, evt);
2050                 break;
2051         case policy_snk_discovery:
2052                 fusb_state_snk_discovery(chip, evt);
2053                 break;
2054         case policy_snk_wait_caps:
2055                 fusb_state_snk_wait_caps(chip, evt);
2056                 break;
2057         case policy_snk_evaluate_caps:
2058                 fusb_state_snk_evaluate_caps(chip, evt);
2059                 /* without break */
2060         case policy_snk_select_cap:
2061                 fusb_state_snk_select_cap(chip, evt);
2062                 break;
2063         case policy_snk_transition_sink:
2064                 fusb_state_snk_transition_sink(chip, evt);
2065                 break;
2066         case policy_snk_transition_default:
2067                 fusb_state_snk_transition_default(chip, evt);
2068                 break;
2069         case policy_snk_ready:
2070                 fusb_state_snk_ready(chip, evt);
2071                 break;
2072         case policy_snk_send_hardrst:
2073                 fusb_state_snk_send_hardreset(chip, evt);
2074                 break;
2075         case policy_snk_send_softrst:
2076                 fusb_state_snk_send_softreset(chip, evt);
2077                 break;
2078
2079         default:
2080                 break;
2081         }
2082
2083 BACK:
2084         if (chip->work_continue) {
2085                 queue_work(chip->fusb30x_wq, &chip->work);
2086                 return;
2087         }
2088
2089         if (!platform_get_device_irq_state(chip))
2090                 fusb_irq_enable(chip);
2091         else
2092                 queue_work(chip->fusb30x_wq, &chip->work);
2093 }
2094
2095 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2096 {
2097         struct fusb30x_chip *chip = dev_id;
2098
2099         queue_work(chip->fusb30x_wq, &chip->work);
2100         fusb_irq_disable(chip);
2101         return IRQ_HANDLED;
2102 }
2103
2104 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2105 {
2106         chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2107         if (IS_ERR(chip->gpio_int))
2108                 return PTR_ERR(chip->gpio_int);
2109
2110         /* some board support vbus with other ways */
2111         chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2112                                                      GPIOD_OUT_LOW);
2113         if (IS_ERR(chip->gpio_vbus_5v))
2114                 dev_warn(chip->dev,
2115                          "Could not get named GPIO for VBus5V!\n");
2116         else
2117                 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2118
2119         chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2120                                                         "vbus-other",
2121                                                         GPIOD_OUT_LOW);
2122         if (IS_ERR(chip->gpio_vbus_other))
2123                 dev_warn(chip->dev,
2124                          "Could not get named GPIO for VBusOther!\n");
2125         else
2126                 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2127
2128         return 0;
2129 }
2130
2131 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2132 {
2133         int i;
2134
2135         for (i = 0; i < fusb30x_port_used; i++) {
2136                 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2137                         if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2138                                 fusb30x_port_info[i]->timer_state = 0;
2139                         break;
2140                 }
2141
2142                 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2143                         if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2144                                 fusb30x_port_info[i]->timer_mux = 0;
2145                         break;
2146                 }
2147         }
2148
2149         if (i != fusb30x_port_used)
2150                 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2151                            &fusb30x_port_info[i]->work);
2152
2153         return HRTIMER_NORESTART;
2154 }
2155
2156 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2157 {
2158         hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2159                      HRTIMER_MODE_REL);
2160         chip->timer_state_machine.function = fusb_timer_handler;
2161
2162         hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2163                      HRTIMER_MODE_REL);
2164         chip->timer_mux_machine.function = fusb_timer_handler;
2165
2166         chip->timer_state = T_DISABLED;
2167         chip->timer_mux = T_DISABLED;
2168 }
2169
2170 static void fusb302_work_func(struct work_struct *work)
2171 {
2172         struct fusb30x_chip *chip;
2173
2174         chip = container_of(work, struct fusb30x_chip, work);
2175         state_machine_typec(chip);
2176 }
2177
2178 static int fusb30x_probe(struct i2c_client *client,
2179                          const struct i2c_device_id *id)
2180 {
2181         struct fusb30x_chip *chip;
2182         struct PD_CAP_INFO *pd_cap_info;
2183         int ret;
2184
2185         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2186         if (!chip)
2187                 return -ENOMEM;
2188
2189         if (fusb30x_port_used == 0xff)
2190                 return -1;
2191
2192         chip->port_num = fusb30x_port_used++;
2193         fusb30x_port_info[chip->port_num] = chip;
2194
2195         chip->dev = &client->dev;
2196         chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2197         if (IS_ERR(chip->regmap)) {
2198                 dev_err(&client->dev, "Failed to allocate regmap!\n");
2199                 return PTR_ERR(chip->regmap);
2200         }
2201
2202         ret = fusb_initialize_gpio(chip);
2203         if (ret)
2204                 return ret;
2205
2206         fusb_initialize_timer(chip);
2207
2208         chip->fusb30x_wq = create_workqueue("fusb302_wq");
2209         INIT_WORK(&chip->work, fusb302_work_func);
2210
2211         tcpm_init(chip);
2212         tcpm_set_rx_enable(chip, 0);
2213         chip->conn_state = unattached;
2214         tcpm_set_cc(chip, FUSB_MODE_DRP);
2215
2216         chip->n_caps_used = 1;
2217         chip->source_power_supply[0] = 0x64;
2218         chip->source_max_current[0] = 0x96;
2219
2220         /*
2221          * these two variable should be 1 if support DRP,
2222          * but now we do not support swap,
2223          * it will be blanked in future
2224          */
2225         pd_cap_info = &chip->pd_cap_info;
2226         pd_cap_info->dual_role_power = 0;
2227         pd_cap_info->data_role_swap = 0;
2228
2229         pd_cap_info->externally_powered = 1;
2230         pd_cap_info->usb_suspend_support = 0;
2231         pd_cap_info->usb_communications_cap = 0;
2232         pd_cap_info->supply_type = 0;
2233         pd_cap_info->peak_current = 0;
2234
2235         chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2236         if (IS_ERR(chip->extcon)) {
2237                 dev_err(&client->dev, "allocat extcon failed\n");
2238                 return PTR_ERR(chip->extcon);
2239         }
2240
2241         ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2242         if (ret) {
2243                 dev_err(&client->dev, "failed to register extcon: %d\n",
2244                         ret);
2245                 return ret;
2246         }
2247
2248         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2249                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2250         if (ret) {
2251                 dev_err(&client->dev,
2252                         "failed to set USB property capability: %d\n",
2253                         ret);
2254                 return ret;
2255         }
2256
2257         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2258                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2259         if (ret) {
2260                 dev_err(&client->dev,
2261                         "failed to set USB_HOST property capability: %d\n",
2262                         ret);
2263                 return ret;
2264         }
2265
2266         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2267                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2268         if (ret) {
2269                 dev_err(&client->dev,
2270                         "failed to set DISP_DP property capability: %d\n",
2271                         ret);
2272                 return ret;
2273         }
2274
2275         i2c_set_clientdata(client, chip);
2276
2277         spin_lock_init(&chip->irq_lock);
2278         chip->enable_irq = 1;
2279
2280         chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2281         if (chip->gpio_int_irq < 0) {
2282                 dev_err(&client->dev,
2283                         "Unable to request IRQ for INT_N GPIO! %d\n",
2284                         ret);
2285                 ret = chip->gpio_int_irq;
2286                 goto IRQ_ERR;
2287         }
2288
2289         ret = devm_request_threaded_irq(&client->dev,
2290                                         chip->gpio_int_irq,
2291                                         NULL,
2292                                         cc_interrupt_handler,
2293                                         IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2294                                         client->name,
2295                                         chip);
2296         if (ret) {
2297                 dev_err(&client->dev, "irq request failed\n");
2298                 goto IRQ_ERR;
2299         }
2300
2301         dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2302
2303         return 0;
2304
2305 IRQ_ERR:
2306         destroy_workqueue(chip->fusb30x_wq);
2307         return ret;
2308 }
2309
2310 static int fusb30x_remove(struct i2c_client *client)
2311 {
2312         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2313
2314         destroy_workqueue(chip->fusb30x_wq);
2315         return 0;
2316 }
2317
2318 static const struct of_device_id fusb30x_dt_match[] = {
2319         { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2320         {},
2321 };
2322 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2323
2324 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2325         { FUSB30X_I2C_DRIVER_NAME, 0 },
2326         {}
2327 };
2328 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2329
2330 static struct i2c_driver fusb30x_driver = {
2331         .driver = {
2332                 .name = FUSB30X_I2C_DRIVER_NAME,
2333                 .of_match_table = of_match_ptr(fusb30x_dt_match),
2334         },
2335         .probe = fusb30x_probe,
2336         .remove = fusb30x_remove,
2337         .id_table = fusb30x_i2c_device_id,
2338 };
2339
2340 module_i2c_driver(fusb30x_driver);
2341
2342 MODULE_LICENSE("GPL");
2343 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2344 MODULE_DESCRIPTION("fusb302 typec pd driver");