drivers/mfd/fusb302.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Zain Wang <zain.wang@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/extcon.h>
  14 #include <linux/gpio.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/module.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/regmap.h>
  19 #include <linux/power_supply.h>
  20
  21 #include "fusb302.h"
  22
  23 #define FUSB302_MAX_REG         (FUSB_REG_FIFO + 50)
  24 #define FUSB_MS_TO_NS(x)        ((s64)x * 1000 * 1000)
  25
  26 #define FUSB_MODE_DRP           0
  27 #define FUSB_MODE_UFP           1
  28 #define FUSB_MODE_DFP           2
  29 #define FUSB_MODE_ASS           3
  30
  31 #define TYPEC_CC_VOLT_OPEN      0
  32 #define TYPEC_CC_VOLT_RA        1
  33 #define TYPEC_CC_VOLT_RD        2
  34 #define TYPEC_CC_VOLT_RP        3
  35
  36 #define EVENT_CC                BIT(0)
  37 #define EVENT_RX                BIT(1)
  38 #define EVENT_TX                BIT(2)
  39 #define EVENT_REC_RESET         BIT(3)
  40 #define EVENT_WORK_CONTINUE     BIT(5)
  41 #define EVENT_TIMER_MUX         BIT(6)
  42 #define EVENT_TIMER_STATE       BIT(7)
  43 #define FLAG_EVENT              (EVENT_RX | EVENT_TIMER_MUX | \
  44                                  EVENT_TIMER_STATE)
  45
  46 #define PIN_MAP_A               BIT(0)
  47 #define PIN_MAP_B               BIT(1)
  48 #define PIN_MAP_C               BIT(2)
  49 #define PIN_MAP_D               BIT(3)
  50 #define PIN_MAP_E               BIT(4)
  51 #define PIN_MAP_F               BIT(5)
  52
  53 static u8 fusb30x_port_used;
  54 static struct fusb30x_chip *fusb30x_port_info[256];
  55
  56 static bool is_write_reg(struct device *dev, unsigned int reg)
  57 {
  58         if (reg >= FUSB_REG_FIFO)
  59                 return true;
  60         else
  61                 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
  62                         true : false;
  63 }
  64
  65 static bool is_volatile_reg(struct device *dev, unsigned int reg)
  66 {
  67         if (reg > FUSB_REG_CONTROL4)
  68                 return true;
  69
  70         switch (reg) {
  71         case FUSB_REG_CONTROL0:
  72         case FUSB_REG_CONTROL1:
  73         case FUSB_REG_CONTROL3:
  74         case FUSB_REG_RESET:
  75                 return true;
  76         }
  77         return false;
  78 }
  79
  80 struct regmap_config fusb302_regmap_config = {
  81         .reg_bits = 8,
  82         .val_bits = 8,
  83         .writeable_reg = is_write_reg,
  84         .volatile_reg = is_volatile_reg,
  85         .max_register = FUSB302_MAX_REG,
  86         .cache_type = REGCACHE_RBTREE,
  87 };
  88
  89 static void dump_notify_info(struct fusb30x_chip *chip)
  90 {
  91         dev_dbg(chip->dev, "port        %d\n", chip->port_num);
  92         dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
  93         dev_dbg(chip->dev, "power_role  %d\n", chip->notify.power_role);
  94         dev_dbg(chip->dev, "data_role   %d\n", chip->notify.data_role);
  95         dev_dbg(chip->dev, "cc          %d\n", chip->notify.is_cc_connected);
  96         dev_dbg(chip->dev, "pd          %d\n", chip->notify.is_pd_connected);
  97         dev_dbg(chip->dev, "enter_mode  %d\n", chip->notify.is_enter_mode);
  98         dev_dbg(chip->dev, "pin support %d\n",
  99                 chip->notify.pin_assignment_support);
 100         dev_dbg(chip->dev, "pin def     %d\n", chip->notify.pin_assignment_def);
 101         dev_dbg(chip->dev, "attention   %d\n", chip->notify.attention);
 102 }
 103
 104 static const unsigned int fusb302_cable[] = {
 105         EXTCON_USB,
 106         EXTCON_USB_HOST,
 107         EXTCON_USB_VBUS_EN,
 108         EXTCON_CHG_USB_SDP,
 109         EXTCON_CHG_USB_CDP,
 110         EXTCON_CHG_USB_DCP,
 111         EXTCON_CHG_USB_SLOW,
 112         EXTCON_CHG_USB_FAST,
 113         EXTCON_DISP_DP,
 114         EXTCON_NONE,
 115 };
 116
 117 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
 118                                int max_cur)
 119 {
 120         int i;
 121         int pos_find;
 122         int tmp;
 123
 124         pos_find = 0;
 125         for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
 126                 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
 127                 case 0:
 128                         /* Fixed Supply */
 129                         if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 130                             max_vol &&
 131                             (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
 132                             max_cur) {
 133                                 chip->pos_power = i + 1;
 134                                 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
 135                                 chip->pd_output_vol = tmp * 50;
 136                                 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
 137                                 chip->pd_output_cur = tmp * 10;
 138                                 pos_find = 1;
 139                         }
 140                         break;
 141                 case 1:
 142                         /* Battery */
 143                         if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 144                             max_vol &&
 145                             (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
 146                             max_cur) {
 147                                 chip->pos_power = i + 1;
 148                                 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
 149                                 chip->pd_output_vol = tmp * 50;
 150                                 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
 151                                 chip->pd_output_cur = tmp * 10;
 152                                 pos_find = 1;
 153                         }
 154                         break;
 155                 default:
 156                         /* not meet battery caps */
 157                         break;
 158                 }
 159                 if (pos_find)
 160                         break;
 161         }
 162 }
 163
 164 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
 165 {
 166         struct power_supply *psy = NULL;
 167         union power_supply_propval val;
 168         enum power_supply_property psp;
 169         int max_vol, max_cur;
 170
 171         max_vol = 0;
 172         max_cur = 0;
 173         psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
 174         if (!psy || IS_ERR(psy))
 175                 return -1;
 176
 177         psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
 178         if (power_supply_get_property(psy, psp, &val) == 0)
 179                 max_vol = val.intval / 1000;
 180
 181         psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
 182         if (power_supply_get_property(psy, psp, &val) == 0)
 183                 max_cur = val.intval / 1000;
 184
 185         if (max_vol > 0 && max_cur > 0)
 186                 fusb_set_pos_power(chip, max_vol, max_cur);
 187
 188         return 0;
 189 }
 190
 191 void fusb_irq_disable(struct fusb30x_chip *chip)
 192 {
 193         unsigned long irqflags = 0;
 194
 195         spin_lock_irqsave(&chip->irq_lock, irqflags);
 196         if (chip->enable_irq) {
 197                 disable_irq_nosync(chip->gpio_int_irq);
 198                 chip->enable_irq = 0;
 199         } else {
 200                 dev_warn(chip->dev, "irq have already disabled\n");
 201         }
 202         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 203 }
 204
 205 void fusb_irq_enable(struct fusb30x_chip *chip)
 206 {
 207         unsigned long irqflags = 0;
 208
 209         spin_lock_irqsave(&chip->irq_lock, irqflags);
 210         if (!chip->enable_irq) {
 211                 enable_irq(chip->gpio_int_irq);
 212                 chip->enable_irq = 1;
 213         }
 214         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 215 }
 216
 217 static void platform_fusb_notify(struct fusb30x_chip *chip)
 218 {
 219         bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
 220         union extcon_property_value property;
 221
 222         if (chip->notify.is_cc_connected)
 223                 chip->notify.orientation = chip->cc_polarity + 1;
 224
 225         /* avoid notify repeated */
 226         if (memcmp(&chip->notify, &chip->notify_cmp,
 227                    sizeof(struct notify_info))) {
 228                 dump_notify_info(chip);
 229                 chip->notify.attention = 0;
 230                 memcpy(&chip->notify_cmp, &chip->notify,
 231                        sizeof(struct notify_info));
 232
 233                 plugged = chip->notify.is_cc_connected ||
 234                           chip->notify.is_pd_connected;
 235                 flip = chip->notify.orientation ?
 236                        (chip->notify.orientation - 1) : 0;
 237                 dp = chip->notify.is_enter_mode;
 238
 239                 if (dp) {
 240                         dfp = 1;
 241                         usb_ss = (chip->notify.pin_assignment_def &
 242                                 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
 243                 } else if (chip->notify.data_role) {
 244                         dfp = 1;
 245                         usb_ss = 1;
 246                 } else if (plugged) {
 247                         ufp = 1;
 248                         usb_ss = 1;
 249                 }
 250
 251                 property.intval = flip;
 252                 extcon_set_property(chip->extcon, EXTCON_USB,
 253                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 254                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 255                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 256                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 257                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 258
 259                 property.intval = usb_ss;
 260                 extcon_set_property(chip->extcon, EXTCON_USB,
 261                                     EXTCON_PROP_USB_SS, property);
 262                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 263                                     EXTCON_PROP_USB_SS, property);
 264                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 265                                     EXTCON_PROP_USB_SS, property);
 266                 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
 267                 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
 268                 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
 269                 extcon_sync(chip->extcon, EXTCON_USB);
 270                 extcon_sync(chip->extcon, EXTCON_USB_HOST);
 271                 extcon_sync(chip->extcon, EXTCON_DISP_DP);
 272                 if (chip->notify.power_role == 0 &&
 273                     chip->notify.is_pd_connected &&
 274                     chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
 275                         extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST, true);
 276                         property.intval =
 277                                 (chip->pd_output_cur << 15 |
 278                                  chip->pd_output_vol);
 279                         extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
 280                                             EXTCON_PROP_USB_TYPEC_POLARITY,
 281                                             property);
 282                         extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
 283                 }
 284         }
 285 }
 286
 287 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
 288 {
 289         return !gpiod_get_value(chip->gpio_int);
 290 }
 291
 292 static void fusb_timer_start(struct hrtimer *timer, int ms)
 293 {
 294         ktime_t ktime;
 295
 296         ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
 297         hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
 298 }
 299
 300 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
 301                                          int vbus_other)
 302 {
 303         bool gpio_vbus_value = 0;
 304
 305         gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
 306         if (chip->gpio_vbus_5v) {
 307                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
 308                 /* Only set state here, don't sync notifier to PMIC */
 309                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 310         } else {
 311                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 312                 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
 313                 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
 314         }
 315
 316         if (chip->gpio_vbus_other)
 317                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
 318
 319         if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
 320                 gpiod_set_value(chip->gpio_discharge, 1);
 321                 msleep(20);
 322                 gpiod_set_value(chip->gpio_discharge, 0);
 323         }
 324 }
 325
 326 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
 327 {
 328         dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
 329         if (!state)
 330                 dev_info(chip->dev, "PD disabled\n");
 331         chip->conn_state = state;
 332         chip->sub_state = 0;
 333         chip->val_tmp = 0;
 334         chip->work_continue = 1;
 335 }
 336
 337 static int tcpm_get_message(struct fusb30x_chip *chip)
 338 {
 339         u8 buf[32];
 340         int len;
 341
 342         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
 343         chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
 344
 345         len = PD_HEADER_CNT(chip->rec_head) << 2;
 346         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
 347
 348         memcpy(chip->rec_load, buf, len);
 349
 350         return 0;
 351 }
 352
 353 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
 354 {
 355         tcpm_get_message(chip);
 356 }
 357
 358 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
 359 {
 360         u32 val;
 361         int *CC_MEASURE;
 362         u32 store;
 363
 364         *CC1 = TYPEC_CC_VOLT_OPEN;
 365         *CC2 = TYPEC_CC_VOLT_OPEN;
 366
 367         if (chip->cc_state & 0x01)
 368                 CC_MEASURE = CC1;
 369         else
 370                 CC_MEASURE = CC2;
 371
 372         if (chip->cc_state & 0x04) {
 373                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 374                 /* measure cc1 first */
 375                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 376                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 377                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 378                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 379                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 380                                    SWITCHES0_MEAS_CC1);
 381                 usleep_range(250, 300);
 382
 383                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 384                 val &= STATUS0_BC_LVL;
 385                 if (val)
 386                         *CC1 = val;
 387
 388                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 389                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 390                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 391                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 392                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 393                                    SWITCHES0_MEAS_CC2);
 394                 usleep_range(250, 300);
 395
 396                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 397                 val &= STATUS0_BC_LVL;
 398                 if (val)
 399                         *CC2 = val;
 400                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 401                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 402                                    store);
 403         } else {
 404                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 405                 val = store;
 406                 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 407                                 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
 408                 if (chip->cc_state & 0x01) {
 409                         val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
 410                 } else {
 411                         val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
 412                 }
 413                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
 414
 415                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 416                 usleep_range(250, 300);
 417
 418                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 419                 if (val & STATUS0_COMP) {
 420                         int retry = 3;
 421                         int comp_times = 0;
 422
 423                         while (retry--) {
 424                                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 425                                 usleep_range(250, 300);
 426                                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 427                                 if (val & STATUS0_COMP) {
 428                                         comp_times++;
 429                                         if (comp_times == 3) {
 430                                                 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
 431                                                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 432                                         }
 433                                 }
 434                         }
 435                 } else {
 436                         regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
 437                         regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
 438                         usleep_range(250, 300);
 439
 440                         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 441
 442                         if (val & STATUS0_COMP)
 443                                 *CC_MEASURE = TYPEC_CC_VOLT_RD;
 444                         else
 445                                 *CC_MEASURE = TYPEC_CC_VOLT_RA;
 446                         regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 447                 }
 448         }
 449
 450         return 0;
 451 }
 452
 453 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
 454 {
 455         u8 val = 0, mask;
 456
 457         val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 458                  SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 459
 460         mask = ~val;
 461
 462         switch (mode) {
 463         case FUSB_MODE_DFP:
 464                 if (chip->togdone_pullup)
 465                         val |= SWITCHES0_PU_EN2;
 466                 else
 467                         val |= SWITCHES0_PU_EN1;
 468                 break;
 469         case FUSB_MODE_UFP:
 470                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 471                 break;
 472         case FUSB_MODE_DRP:
 473                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 474                 break;
 475         case FUSB_MODE_ASS:
 476                 break;
 477         }
 478
 479         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
 480         return 0;
 481 }
 482
 483 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
 484 {
 485         u8 val = 0;
 486
 487         if (enable) {
 488                 if (chip->cc_polarity)
 489                         val |= SWITCHES0_MEAS_CC2;
 490                 else
 491                         val |= SWITCHES0_MEAS_CC1;
 492                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 493                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 494                                    val);
 495                 fusb302_flush_rx_fifo(chip);
 496                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 497                                    SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
 498         } else {
 499                 /*
 500                  * bit of a hack here.
 501                  * when this function is called to disable rx (enable=0)
 502                  * using it as an indication of detach (gulp!)
 503                  * to reset our knowledge of where
 504                  * the toggle state machine landed.
 505                  */
 506                 chip->togdone_pullup = 0;
 507
 508 #ifdef  FUSB_HAVE_DRP
 509                 tcpm_set_cc(chip, FUSB_MODE_DRP);
 510                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 511                                    CONTROL2_TOG_RD_ONLY,
 512                                    CONTROL2_TOG_RD_ONLY);
 513 #endif
 514                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 515                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 516                                    0);
 517                 regmap_update_bits(chip->regmap,
 518                                    FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
 519         }
 520
 521         return 0;
 522 }
 523
 524 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
 525 {
 526         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 527                            SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
 528                            (chip->notify.power_role << 7) |
 529                            (chip->notify.data_role << 4));
 530         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 531                            SWITCHES1_SPECREV, 2 << 5);
 532         return 0;
 533 }
 534
 535 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
 536 {
 537         u8 val = 0;
 538
 539 #ifdef FUSB_VCONN_SUPPORT
 540         if (chip->vconn_enabled) {
 541                 if (polarity)
 542                         val |= SWITCHES0_VCONN_CC1;
 543                 else
 544                         val |= SWITCHES0_VCONN_CC2;
 545         }
 546 #endif
 547
 548         if (polarity)
 549                 val |= SWITCHES0_MEAS_CC2;
 550         else
 551                 val |= SWITCHES0_MEAS_CC1;
 552
 553         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 554                            SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
 555                            SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 556                            val);
 557
 558         val = 0;
 559         if (polarity)
 560                 val |= SWITCHES1_TXCC2;
 561         else
 562                 val |= SWITCHES1_TXCC1;
 563         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 564                            SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
 565                            val);
 566
 567         chip->cc_polarity = polarity;
 568
 569         return 0;
 570 }
 571
 572 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
 573 {
 574         u8 val = 0;
 575
 576         if (enable) {
 577                 tcpm_set_polarity(chip, chip->cc_polarity);
 578         } else {
 579                 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
 580                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 581                                    SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
 582                                    val);
 583         }
 584         chip->vconn_enabled = enable;
 585         return 0;
 586 }
 587
 588 static void fusb302_pd_reset(struct fusb30x_chip *chip)
 589 {
 590         regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
 591         regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
 592 }
 593
 594 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
 595 {
 596         u32 control0_reg;
 597
 598         regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
 599
 600         control0_reg &= ~CONTROL0_HOST_CUR;
 601         /*
 602          * according to the host current, the compare value is different
 603         */
 604         switch (rp) {
 605         /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
 606         case TYPEC_RP_USB:
 607                 chip->cc_meas_high = 0x26;
 608                 chip->cc_meas_low = 0x5;
 609                 control0_reg |= CONTROL0_HOST_CUR_USB;
 610                 break;
 611         /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
 612         case TYPEC_RP_1A5:
 613                 chip->cc_meas_high = 0x26;
 614                 chip->cc_meas_low = 0xa;
 615                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 616                 break;
 617         /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
 618         case TYPEC_RP_3A0:
 619                 chip->cc_meas_high = 0x26;
 620                 chip->cc_meas_low = 0x13;
 621                 control0_reg |= CONTROL0_HOST_CUR_3A0;
 622                 break;
 623         default:
 624                 chip->cc_meas_high = 0x26;
 625                 chip->cc_meas_low = 0xa;
 626                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 627                 break;
 628         }
 629
 630         regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
 631 }
 632
 633 static void tcpm_init(struct fusb30x_chip *chip)
 634 {
 635         u8 val;
 636         u32 tmp;
 637
 638         regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
 639         chip->chip_id = (u8)tmp;
 640         platform_set_vbus_lvl_enable(chip, 0, 0);
 641         chip->notify.is_cc_connected = 0;
 642         chip->cc_state = 0;
 643
 644         /* restore default settings */
 645         regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
 646                            RESET_SW_RESET);
 647         fusb302_pd_reset(chip);
 648         /* set auto_retry and number of retries */
 649         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 650                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
 651                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
 652
 653         /* set interrupts */
 654         val = 0xff;
 655         val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
 656                  MASK_M_VBUSOK);
 657         regmap_write(chip->regmap, FUSB_REG_MASK, val);
 658
 659         val = 0xff;
 660         val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
 661                  MASKA_M_TXSENT | MASKA_M_HARDRST);
 662         regmap_write(chip->regmap, FUSB_REG_MASKA, val);
 663
 664         val = 0xff;
 665         val = ~MASKB_M_GCRCSEND;
 666         regmap_write(chip->regmap, FUSB_REG_MASKB, val);
 667
 668 #ifdef  FUSB_HAVE_DRP
 669                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 670                                    CONTROL2_MODE | CONTROL2_TOGGLE,
 671                                    (1 << 1) | CONTROL2_TOGGLE);
 672
 673                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 674                                    CONTROL2_TOG_RD_ONLY,
 675                                    CONTROL2_TOG_RD_ONLY);
 676 #endif
 677
 678         tcpm_select_rp_value(chip, TYPEC_RP_1A5);
 679         /* Interrupts Enable */
 680         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
 681                            ~CONTROL0_INT_MASK);
 682
 683         tcpm_set_polarity(chip, 0);
 684         tcpm_set_vconn(chip, 0);
 685
 686         regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
 687 }
 688
 689 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
 690 {
 691         chip->msg_id = 0;
 692         chip->vdm_state = 0;
 693         if (chip->notify.power_role)
 694                 set_state(chip, policy_src_transition_default);
 695         else
 696                 set_state(chip, policy_snk_transition_default);
 697 }
 698
 699 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
 700 {
 701         int interrupt, interrupta, interruptb;
 702         u32 val;
 703         static int retry;
 704
 705         regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
 706         regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
 707         regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
 708
 709         if (interrupt & INTERRUPT_BC_LVL) {
 710                 if (chip->notify.is_cc_connected)
 711                         *evt |= EVENT_CC;
 712         }
 713
 714         if (interrupt & INTERRUPT_VBUSOK) {
 715                 if (chip->notify.is_cc_connected)
 716                         *evt |= EVENT_CC;
 717         }
 718
 719         if (interrupta & INTERRUPTA_TOGDONE) {
 720                 *evt |= EVENT_CC;
 721                 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
 722                 chip->cc_state = ((u8)val >> 3) & 0x07;
 723
 724                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 725                                    CONTROL2_TOGGLE,
 726                                    0);
 727
 728                 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 729                          SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 730
 731                 if (chip->cc_state & 0x01)
 732                         val |= SWITCHES0_PU_EN1;
 733                 else
 734                         val |= SWITCHES0_PU_EN2;
 735
 736                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 737                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 738                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 739                                    val);
 740         }
 741
 742         if (interrupta & INTERRUPTA_TXSENT) {
 743                 *evt |= EVENT_TX;
 744                 fusb302_flush_rx_fifo(chip);
 745                 chip->tx_state = tx_success;
 746         }
 747
 748         if (interruptb & INTERRUPTB_GCRCSENT)
 749                 *evt |= EVENT_RX;
 750
 751         if (interrupta & INTERRUPTA_HARDRST) {
 752                 fusb302_pd_reset(chip);
 753                 pd_execute_hard_reset(chip);
 754                 *evt |= EVENT_REC_RESET;
 755         }
 756
 757         if (interrupta & INTERRUPTA_RETRYFAIL) {
 758                 *evt |= EVENT_TX;
 759                 chip->tx_state = tx_failed;
 760         }
 761
 762         if (interrupta & INTERRUPTA_HARDSENT) {
 763                 /*
 764                  * The fusb PD should be reset once to sync adapter PD
 765                  * signal after fusb sent hard reset cmd.This is not PD
 766                  * device if reset failed.
 767                  */
 768                 if (!retry) {
 769                         retry = 1;
 770                         fusb302_pd_reset(chip);
 771                         pd_execute_hard_reset(chip);
 772                 } else {
 773                         retry = 0;
 774                         chip->tx_state = tx_success;
 775                         chip->timer_state = T_DISABLED;
 776                         *evt |= EVENT_TX;
 777                 }
 778         }
 779 }
 780
 781 static void mux_alert(struct fusb30x_chip *chip, int *evt)
 782 {
 783         if (!chip->timer_mux) {
 784                 *evt |= EVENT_TIMER_MUX;
 785                 chip->timer_mux = T_DISABLED;
 786         }
 787
 788         if (!chip->timer_state) {
 789                 *evt |= EVENT_TIMER_STATE;
 790                 chip->timer_state = T_DISABLED;
 791         }
 792
 793         if (chip->work_continue) {
 794                 *evt |= EVENT_WORK_CONTINUE;
 795                 chip->work_continue = 0;
 796         }
 797 }
 798
 799 static void set_state_unattached(struct fusb30x_chip *chip)
 800 {
 801         dev_info(chip->dev, "connection has disconnected\n");
 802         tcpm_init(chip);
 803         tcpm_set_rx_enable(chip, 0);
 804         chip->conn_state = unattached;
 805         tcpm_set_cc(chip, FUSB_MODE_DRP);
 806
 807         /* claer notify_info */
 808         memset(&chip->notify, 0, sizeof(struct notify_info));
 809         platform_fusb_notify(chip);
 810
 811         if (chip->gpio_discharge)
 812                 gpiod_set_value(chip->gpio_discharge, 1);
 813         msleep(100);
 814         if (chip->gpio_discharge)
 815                 gpiod_set_value(chip->gpio_discharge, 0);
 816 }
 817
 818 static int tcpm_check_vbus(struct fusb30x_chip *chip)
 819 {
 820         u32 val;
 821
 822         /* Read status register */
 823         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 824
 825         return (val & STATUS0_VBUSOK) ? 1 : 0;
 826 }
 827
 828 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 829 {
 830         int i;
 831         struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
 832
 833         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 834                          ((chip->notify.power_role & 0x1) << 8) |
 835                          (1 << 6) |
 836                          ((chip->notify.data_role & 0x1) << 5);
 837
 838         if (is_DMT) {
 839                 switch (cmd) {
 840                 case DMT_SOURCECAPABILITIES:
 841                         chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
 842
 843                         for (i = 0; i < chip->n_caps_used; i++) {
 844                                 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
 845                                                     (pd_cap_info->dual_role_power << 29) |
 846                                                     (pd_cap_info->usb_suspend_support << 28) |
 847                                                     (pd_cap_info->externally_powered << 27) |
 848                                                     (pd_cap_info->usb_communications_cap << 26) |
 849                                                     (pd_cap_info->data_role_swap << 25) |
 850                                                     (pd_cap_info->peak_current << 20) |
 851                                                     (chip->source_power_supply[i] << 10) |
 852                                                     (chip->source_max_current[i]);
 853                         }
 854                         break;
 855                 case DMT_REQUEST:
 856                         chip->send_head |= ((1 << 12) | (cmd & 0xf));
 857                         /* send request with FVRDO */
 858                         chip->send_load[0] = (chip->pos_power << 28) |
 859                                             (0 << 27) |
 860                                             (1 << 26) |
 861                                             (0 << 25) |
 862                                             (0 << 24);
 863
 864                         switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
 865                         case 0:
 866                                 /* Fixed Supply */
 867                                 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 868                                 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 869                                 break;
 870                         case 1:
 871                                 /* Battery */
 872                                 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 873                                 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 874                                 break;
 875                         default:
 876                                 /* not meet battery caps */
 877                                 break;
 878                         }
 879                         break;
 880                 case DMT_SINKCAPABILITIES:
 881                         break;
 882                 case DMT_VENDERDEFINED:
 883                         break;
 884                 default:
 885                         break;
 886                 }
 887         } else {
 888                 chip->send_head |= (cmd & 0xf);
 889         }
 890 }
 891
 892 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 893 {
 894         chip->send_head = (chip->msg_id & 0x7) << 9;
 895         chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 896
 897         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 898                          ((chip->notify.power_role & 0x1) << 8) |
 899                          (1 << 6) |
 900                          ((chip->notify.data_role & 0x1) << 5) |
 901                          (DMT_VENDERDEFINED & 0xf);
 902
 903         chip->send_load[0] = (1 << 15) |
 904                             (0 << 13) |
 905                             (type << 6) |
 906                             (cmd);
 907
 908         switch (cmd) {
 909         case VDM_DISCOVERY_ID:
 910         case VDM_DISCOVERY_SVIDS:
 911         case VDM_ATTENTION:
 912                 chip->send_load[0] |= (0xff00 << 16);
 913                 chip->send_head |= (1 << 12);
 914                 break;
 915         case VDM_DISCOVERY_MODES:
 916                 chip->send_load[0] |=
 917                         (chip->vdm_svid[chip->val_tmp >> 1] << 16);
 918                 chip->send_head |= (1 << 12);
 919                 break;
 920         case VDM_ENTER_MODE:
 921                 chip->send_head |= (1 << 12);
 922                 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
 923                 break;
 924         case VDM_EXIT_MODE:
 925                 chip->send_head |= (1 << 12);
 926                 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
 927                 break;
 928         case VDM_DP_STATUS_UPDATE:
 929                 chip->send_head |= (2 << 12);
 930                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 931                 chip->send_load[1] = 5;
 932                 break;
 933         case VDM_DP_CONFIG:
 934                 chip->send_head |= (2 << 12);
 935                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 936                 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 937                                     (1 << 2) | 2;
 938                 break;
 939         default:
 940                 break;
 941         }
 942 }
 943
 944 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
 945 {
 946         switch (chip->tx_state) {
 947         case 0:
 948                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 949                                    CONTROL3_SEND_HARDRESET,
 950                                    CONTROL3_SEND_HARDRESET);
 951                 chip->tx_state = tx_busy;
 952                 chip->timer_state = T_BMC_TIMEOUT;
 953                 fusb_timer_start(&chip->timer_state_machine,
 954                                  chip->timer_state);
 955                 break;
 956         default:
 957                 if (evt & EVENT_TIMER_STATE)
 958                         chip->tx_state = tx_success;
 959                 break;
 960         }
 961         return chip->tx_state;
 962 }
 963
 964 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
 965 {
 966         u8 senddata[40];
 967         int pos = 0;
 968         u8 len;
 969
 970         switch (chip->tx_state) {
 971         case 0:
 972                 senddata[pos++] = FUSB_TKN_SYNC1;
 973                 senddata[pos++] = FUSB_TKN_SYNC1;
 974                 senddata[pos++] = FUSB_TKN_SYNC1;
 975                 senddata[pos++] = FUSB_TKN_SYNC2;
 976
 977                 len = PD_HEADER_CNT(chip->send_head) << 2;
 978                 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
 979
 980                 senddata[pos++] = chip->send_head & 0xff;
 981                 senddata[pos++] = (chip->send_head >> 8) & 0xff;
 982
 983                 memcpy(&senddata[pos], chip->send_load, len);
 984                 pos += len;
 985
 986                 senddata[pos++] = FUSB_TKN_JAMCRC;
 987                 senddata[pos++] = FUSB_TKN_EOP;
 988                 senddata[pos++] = FUSB_TKN_TXOFF;
 989                 senddata[pos++] = FUSB_TKN_TXON;
 990
 991                 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
 992                 chip->tx_state = tx_busy;
 993                 break;
 994
 995         default:
 996                 /* wait Tx result */
 997                 break;
 998         }
 999
1000         return chip->tx_state;
1001 }
1002
1003 static void process_vdm_msg(struct fusb30x_chip *chip)
1004 {
1005         u32 vdm_header = chip->rec_load[0];
1006         int i;
1007         u32 tmp;
1008
1009         /* can't procee unstructed vdm msg */
1010         if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
1011                 return;
1012
1013         switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1014         case VDM_TYPE_INIT:
1015                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1016                 case VDM_ATTENTION:
1017                         dev_info(chip->dev, "attention, dp_status %x\n",
1018                                  chip->rec_load[1]);
1019                         chip->notify.attention = 1;
1020                         chip->vdm_state = 6;
1021                         break;
1022                 default:
1023                         dev_warn(chip->dev, "rec unknown init vdm msg\n");
1024                         break;
1025                 }
1026                 break;
1027         case VDM_TYPE_ACK:
1028                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1029                 case VDM_DISCOVERY_ID:
1030                         chip->vdm_id = chip->rec_load[1];
1031                         break;
1032                 case VDM_DISCOVERY_SVIDS:
1033                         for (i = 0; i < 6; i++) {
1034                                 tmp = (chip->rec_load[i + 1] >> 16) &
1035                                       0x0000ffff;
1036                                 if (tmp) {
1037                                         chip->vdm_svid[i * 2] = tmp;
1038                                         chip->vdm_svid_num++;
1039                                 } else {
1040                                         break;
1041                                 }
1042
1043                                 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1044                                 if (tmp) {
1045                                         chip->vdm_svid[i * 2 + 1] = tmp;
1046                                         chip->vdm_svid_num++;
1047                                 } else {
1048                                         break;
1049                                 }
1050                         }
1051                         break;
1052                 case VDM_DISCOVERY_MODES:
1053                         /* indicate there are some vdo modes */
1054                         if (PD_HEADER_CNT(chip->rec_head) > 1) {
1055                                 /*
1056                                  * store mode config,
1057                                  * enter first mode default
1058                                  */
1059                                 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1060                                         chip->val_tmp |= 1;
1061                                         break;
1062                                 }
1063                                 chip->notify.pin_assignment_support = 0;
1064                                 chip->notify.pin_assignment_def = 0;
1065                                 chip->notify.pin_assignment_support =
1066                                         (chip->rec_load[1] >> 8) & 0x3f;
1067                                 tmp = chip->notify.pin_assignment_support;
1068                                 for (i = 0; i < 6; i++) {
1069                                         if (!(tmp & 0x20))
1070                                                 tmp = tmp << 1;
1071                                         else
1072                                                 break;
1073                                 }
1074                                 chip->notify.pin_assignment_def = 0x20 >> i;
1075                                 chip->val_tmp |= 1;
1076                         }
1077                         break;
1078                 case VDM_ENTER_MODE:
1079                         chip->val_tmp = 1;
1080                         break;
1081                 case VDM_DP_STATUS_UPDATE:
1082                         dev_dbg(chip->dev, "dp_status 0x%x\n",
1083                                 chip->rec_load[1]);
1084                         chip->val_tmp = 1;
1085                         break;
1086                 case VDM_DP_CONFIG:
1087                         chip->val_tmp = 1;
1088                         dev_info(chip->dev,
1089                                  "DP config successful, pin_assignment 0x%x\n",
1090                                  chip->notify.pin_assignment_def);
1091                         chip->notify.is_enter_mode = 1;
1092                         break;
1093                 default:
1094                         break;
1095                 }
1096                 break;
1097         case VDM_TYPE_NACK:
1098                         dev_warn(chip->dev, "REC NACK for 0x%x\n",
1099                                  GET_VDMHEAD_CMD(vdm_header));
1100                         /* disable vdm */
1101                         chip->vdm_state = 0xff;
1102                 break;
1103         }
1104 }
1105
1106 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1107 {
1108         int tmp;
1109
1110         switch (chip->vdm_send_state) {
1111         case 0:
1112                 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1113                 chip->vdm_id = 0;
1114                 chip->tx_state = 0;
1115                 chip->vdm_send_state++;
1116         case 1:
1117                 tmp = policy_send_data(chip);
1118                 if (tmp == tx_success) {
1119                         chip->vdm_send_state++;
1120                         chip->timer_state = T_SENDER_RESPONSE;
1121                         fusb_timer_start(&chip->timer_state_machine,
1122                                          chip->timer_state);
1123                 } else if (tmp == tx_failed) {
1124                         dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1125                         /* disable auto_vdm_machine */
1126                         chip->vdm_state = 0xff;
1127                 }
1128
1129                 if (chip->vdm_send_state != 2)
1130                         break;
1131         default:
1132                 if (evt & EVENT_TIMER_STATE) {
1133                         dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1134                         chip->vdm_state = 0xff;
1135                         chip->work_continue = 1;
1136                 }
1137
1138                 if (!chip->vdm_id)
1139                         break;
1140                 chip->vdm_send_state = 0;
1141                 return 0;
1142         }
1143         return -EINPROGRESS;
1144 }
1145
1146 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1147 {
1148         int tmp;
1149
1150         switch (chip->vdm_send_state) {
1151         case 0:
1152                 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1153                 memset(chip->vdm_svid, 0, 12);
1154                 chip->vdm_svid_num = 0;
1155                 chip->tx_state = 0;
1156                 chip->vdm_send_state++;
1157         case 1:
1158                 tmp = policy_send_data(chip);
1159                 if (tmp == tx_success) {
1160                         chip->vdm_send_state++;
1161                         chip->timer_state = T_SENDER_RESPONSE;
1162                         fusb_timer_start(&chip->timer_state_machine,
1163                                          chip->timer_state);
1164                 } else if (tmp == tx_failed) {
1165                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1166                         /* disable auto_vdm_machine */
1167                         chip->vdm_state = 0xff;
1168                 }
1169
1170                 if (chip->vdm_send_state != 2)
1171                         break;
1172         default:
1173                 if (evt & EVENT_TIMER_STATE) {
1174                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1175                         chip->vdm_state = 0xff;
1176                         chip->work_continue = 1;
1177                 }
1178
1179                 if (!chip->vdm_svid_num)
1180                         break;
1181                 chip->vdm_send_state = 0;
1182                 return 0;
1183         }
1184         return -EINPROGRESS;
1185 }
1186
1187 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1188 {
1189         int tmp;
1190
1191         if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1192                 switch (chip->vdm_send_state) {
1193                 case 0:
1194                         set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1195                                      VDM_TYPE_INIT, 0);
1196                         chip->tx_state = 0;
1197                         chip->vdm_send_state++;
1198                 case 1:
1199                         tmp = policy_send_data(chip);
1200                         if (tmp == tx_success) {
1201                                 chip->vdm_send_state++;
1202                                 chip->timer_state = T_SENDER_RESPONSE;
1203                                 fusb_timer_start(&chip->timer_state_machine,
1204                                                  chip->timer_state);
1205                         } else if (tmp == tx_failed) {
1206                                 dev_warn(chip->dev,
1207                                          "VDM_DISCOVERY_MODES send failed\n");
1208                                 chip->vdm_state = 0xff;
1209                         }
1210
1211                         if (chip->vdm_send_state != 2)
1212                                 break;
1213                 default:
1214                         if (evt & EVENT_TIMER_STATE) {
1215                                 dev_warn(chip->dev,
1216                                          "VDM_DISCOVERY_MODES time out\n");
1217                                 chip->vdm_state = 0xff;
1218                                 chip->work_continue = 1;
1219                         }
1220
1221                         if (!(chip->val_tmp & 1))
1222                                 break;
1223                         chip->val_tmp &= 0xfe;
1224                         chip->val_tmp += 2;
1225                         chip->vdm_send_state = 0;
1226                         chip->work_continue = 1;
1227                         break;
1228                 }
1229         } else {
1230                 chip->val_tmp = 0;
1231                 return 0;
1232         }
1233
1234         return -EINPROGRESS;
1235 }
1236
1237 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1238 {
1239         int tmp;
1240
1241         switch (chip->vdm_send_state) {
1242         case 0:
1243                 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1244                 chip->tx_state = 0;
1245                 chip->vdm_send_state++;
1246                 chip->notify.is_enter_mode = 0;
1247         case 1:
1248                 tmp = policy_send_data(chip);
1249                 if (tmp == tx_success) {
1250                         chip->vdm_send_state++;
1251                         chip->timer_state = T_SENDER_RESPONSE;
1252                         fusb_timer_start(&chip->timer_state_machine,
1253                                          chip->timer_state);
1254                 } else if (tmp == tx_failed) {
1255                         dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1256                         /* disable auto_vdm_machine */
1257                         chip->vdm_state = 0xff;
1258                 }
1259
1260                 if (chip->vdm_send_state != 2)
1261                         break;
1262         default:
1263                 if (evt & EVENT_TIMER_STATE) {
1264                         dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1265                         chip->vdm_state = 0xff;
1266                         chip->work_continue = 1;
1267                 }
1268
1269                 if (!chip->val_tmp)
1270                         break;
1271                 chip->val_tmp = 0;
1272                 chip->vdm_send_state = 0;
1273                 return 0;
1274         }
1275         return -EINPROGRESS;
1276 }
1277
1278 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1279 {
1280         int tmp;
1281
1282         switch (chip->vdm_send_state) {
1283         case 0:
1284                 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1285                 chip->tx_state = 0;
1286                 chip->vdm_send_state++;
1287         case 1:
1288                 tmp = policy_send_data(chip);
1289                 if (tmp == tx_success) {
1290                         chip->vdm_send_state++;
1291                         chip->timer_state = T_SENDER_RESPONSE;
1292                         fusb_timer_start(&chip->timer_state_machine,
1293                                          chip->timer_state);
1294                 } else if (tmp == tx_failed) {
1295                         dev_warn(chip->dev,
1296                                  "VDM_DP_STATUS_UPDATE send failed\n");
1297                         /* disable auto_vdm_machine */
1298                         chip->vdm_state = 0xff;
1299                 }
1300
1301                 if (chip->vdm_send_state != 2)
1302                         break;
1303         default:
1304                 if (evt & EVENT_TIMER_STATE) {
1305                         dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1306                         chip->vdm_state = 0xff;
1307                         chip->work_continue = 1;
1308                 }
1309
1310                 if (!chip->val_tmp)
1311                         break;
1312                 chip->val_tmp = 0;
1313                 chip->vdm_send_state = 0;
1314                 return 0;
1315         }
1316         return -EINPROGRESS;
1317 }
1318
1319 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1320 {
1321         int tmp;
1322
1323         switch (chip->vdm_send_state) {
1324         case 0:
1325                 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1326                 chip->tx_state = 0;
1327                 chip->vdm_send_state++;
1328         case 1:
1329                 tmp = policy_send_data(chip);
1330                 if (tmp == tx_success) {
1331                         chip->vdm_send_state++;
1332                         chip->timer_state = T_SENDER_RESPONSE;
1333                         fusb_timer_start(&chip->timer_state_machine,
1334                                          chip->timer_state);
1335                 } else if (tmp == tx_failed) {
1336                         dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1337                         /* disable auto_vdm_machine */
1338                         chip->vdm_state = 0xff;
1339                 }
1340
1341                 if (chip->vdm_send_state != 2)
1342                         break;
1343         default:
1344                 if (evt & EVENT_TIMER_STATE) {
1345                         dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1346                         chip->vdm_state = 0xff;
1347                         chip->work_continue = 1;
1348                 }
1349
1350                 if (!chip->val_tmp)
1351                         break;
1352                 chip->val_tmp = 0;
1353                 chip->vdm_send_state = 0;
1354                 return 0;
1355         }
1356         return -EINPROGRESS;
1357 }
1358
1359 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1360 {
1361         switch (chip->vdm_state) {
1362         case 0:
1363                 if (vdm_send_discoveryid(chip, evt))
1364                         break;
1365                 chip->vdm_state++;
1366                 /* without break */
1367         case 1:
1368                 if (vdm_send_discoverysvid(chip, evt))
1369                         break;
1370                 chip->vdm_state++;
1371                 /* without break */
1372         case 2:
1373                 if (vdm_send_discoverymodes(chip, evt))
1374                         break;
1375                 chip->vdm_state++;
1376                 /* without break */
1377         case 3:
1378                 if (vdm_send_entermode(chip, evt))
1379                         break;
1380                 chip->vdm_state++;
1381                 /* without break */
1382         case 4:
1383                 if (vdm_send_dpconfig(chip, evt))
1384                         break;
1385                 chip->vdm_state = 6;
1386                 /* without break */
1387         case 5:
1388                 if (vdm_send_getdpstatus(chip, evt))
1389                         break;
1390                 chip->vdm_state++;
1391                 /* without break */
1392         default:
1393                 platform_fusb_notify(chip);
1394                 break;
1395         }
1396 }
1397
1398 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1399 {
1400         platform_fusb_notify(chip);
1401 }
1402
1403 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1404 {
1405         chip->notify.is_cc_connected = 0;
1406         if ((evt & EVENT_CC) && chip->cc_state) {
1407                 if (chip->cc_state & 0x04)
1408                         set_state(chip, attach_wait_sink);
1409                 else
1410                         set_state(chip, attach_wait_source);
1411
1412                 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1413                 chip->debounce_cnt = 0;
1414                 chip->timer_mux = 2;
1415                 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1416         }
1417 }
1418
1419 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1420 {
1421         int cc1, cc2;
1422
1423         if (evt & EVENT_TIMER_MUX) {
1424                 tcpm_get_cc(chip, &cc1, &cc2);
1425
1426                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1427                         chip->debounce_cnt++;
1428                 } else {
1429                         chip->cc1 = cc1;
1430                         chip->cc2 = cc2;
1431                         chip->debounce_cnt = 0;
1432                 }
1433
1434                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1435                         if ((chip->cc1 != chip->cc2) &&
1436                             ((!chip->cc1) || (!chip->cc2))) {
1437                                 set_state(chip, attached_sink);
1438                         } else {
1439                                 set_state_unattached(chip);
1440                         }
1441                         return;
1442                 }
1443
1444                 chip->timer_mux = 2;
1445                 fusb_timer_start(&chip->timer_mux_machine,
1446                                  chip->timer_mux);
1447         }
1448 }
1449
1450 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1451 {
1452         int cc1, cc2;
1453
1454         if (evt & EVENT_TIMER_MUX) {
1455                 tcpm_get_cc(chip, &cc1, &cc2);
1456
1457                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1458                         if (chip->debounce_cnt++ == 0)
1459                                 platform_set_vbus_lvl_enable(chip, 1, 0);
1460                 } else {
1461                         chip->cc1 = cc1;
1462                         chip->cc2 = cc2;
1463                         chip->debounce_cnt = 0;
1464                 }
1465
1466                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1467                         if (((!chip->cc1) || (!chip->cc2)) &&
1468                             ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1469                              (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1470                                 set_state(chip, attached_source);
1471                         } else {
1472                                 set_state_unattached(chip);
1473                         }
1474
1475                         return;
1476                 }
1477
1478                 chip->timer_mux = 2;
1479                 fusb_timer_start(&chip->timer_mux_machine,
1480                                  chip->timer_mux);
1481         }
1482 }
1483
1484 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1485 {
1486         tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1487         tcpm_set_vconn(chip, 1);
1488
1489         chip->notify.is_cc_connected = 1;
1490         if (chip->cc_state & 0x01)
1491                 chip->cc_polarity = 0;
1492         else
1493                 chip->cc_polarity = 1;
1494
1495         chip->notify.power_role = 1;
1496         chip->notify.data_role = 1;
1497         chip->hardrst_count = 0;
1498         set_state(chip, policy_src_startup);
1499         dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1500 }
1501
1502 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1503 {
1504         chip->notify.is_cc_connected = 1;
1505         if (chip->cc_state & 0x01)
1506                 chip->cc_polarity = 0;
1507         else
1508                 chip->cc_polarity = 1;
1509
1510         chip->notify.power_role = 0;
1511         chip->notify.data_role = 0;
1512         chip->hardrst_count = 0;
1513         set_state(chip, policy_snk_startup);
1514         dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1515 }
1516
1517 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1518 {
1519         chip->caps_counter = 0;
1520         chip->notify.is_pd_connected = 0;
1521         chip->msg_id = 0;
1522         chip->vdm_state = 0;
1523         chip->vdm_substate = 0;
1524         chip->vdm_send_state = 0;
1525         chip->val_tmp = 0;
1526
1527         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1528
1529         tcpm_set_msg_header(chip);
1530         tcpm_set_polarity(chip, chip->cc_polarity);
1531         tcpm_set_rx_enable(chip, 1);
1532
1533         set_state(chip, policy_src_send_caps);
1534 }
1535
1536 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1537 {
1538         switch (chip->sub_state) {
1539         case 0:
1540                 chip->caps_counter++;
1541
1542                 if (chip->caps_counter < N_CAPS_COUNT) {
1543                         chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1544                         fusb_timer_start(&chip->timer_state_machine,
1545                                          chip->timer_state);
1546                         chip->sub_state = 1;
1547                 } else {
1548                         set_state(chip, disabled);
1549                 }
1550                 break;
1551         default:
1552                 if (evt & EVENT_TIMER_STATE) {
1553                         set_state(chip, policy_src_send_caps);
1554                 } else if ((evt & EVENT_TIMER_MUX) &&
1555                            (chip->hardrst_count > N_HARDRESET_COUNT)) {
1556                         if (chip->notify.is_pd_connected)
1557                                 set_state(chip, error_recovery);
1558                         else
1559                                 set_state(chip, disabled);
1560                 }
1561                 break;
1562         }
1563 }
1564
1565 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1566 {
1567         u32 tmp;
1568
1569         switch (chip->sub_state) {
1570         case 0:
1571                 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1572                 chip->sub_state = 1;
1573                 chip->tx_state = tx_idle;
1574                 /* without break */
1575         case 1:
1576                 tmp = policy_send_data(chip);
1577
1578                 if (tmp == tx_success) {
1579                         chip->hardrst_count = 0;
1580                         chip->caps_counter = 0;
1581                         chip->timer_state = T_SENDER_RESPONSE;
1582                         fusb_timer_start(&chip->timer_state_machine,
1583                                          chip->timer_state);
1584                         chip->timer_mux = T_DISABLED;
1585                         chip->sub_state++;
1586                 } else if (tmp == tx_failed) {
1587                         set_state(chip, policy_src_discovery);
1588                         break;
1589                 }
1590
1591                 if (!(evt & FLAG_EVENT))
1592                         break;
1593         default:
1594                 if (evt & EVENT_RX) {
1595                         if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1596                             (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1597                                 set_state(chip, policy_src_negotiate_cap);
1598                         } else {
1599                                 set_state(chip, policy_src_send_softrst);
1600                         }
1601                 } else if (evt & EVENT_TIMER_STATE) {
1602                         if (chip->hardrst_count <= N_HARDRESET_COUNT)
1603                                 set_state(chip, policy_src_send_hardrst);
1604                         else
1605                                 set_state(chip, disabled);
1606                 } else if (evt & EVENT_TIMER_MUX) {
1607                         if (chip->notify.is_pd_connected)
1608                                 set_state(chip, disabled);
1609                         else
1610                                 set_state(chip, error_recovery);
1611                 }
1612                 break;
1613         }
1614 }
1615
1616 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1617 {
1618         u32 tmp;
1619
1620         /* base on evb1 */
1621         tmp = (chip->rec_load[0] >> 28) & 0x07;
1622         if (tmp > chip->n_caps_used)
1623                 set_state(chip, policy_src_cap_response);
1624         else
1625                 set_state(chip, policy_src_transition_supply);
1626 }
1627
1628 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1629                                              int evt)
1630 {
1631         u32 tmp;
1632
1633         switch (chip->sub_state) {
1634         case 0:
1635                 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1636                 chip->tx_state = tx_idle;
1637                 chip->sub_state++;
1638                 /* without break */
1639         case 1:
1640                 tmp = policy_send_data(chip);
1641                 if (tmp == tx_success) {
1642                         chip->timer_state = T_SRC_TRANSITION;
1643                         chip->sub_state++;
1644                         fusb_timer_start(&chip->timer_state_machine,
1645                                          chip->timer_state);
1646                 } else if (tmp == tx_failed) {
1647                         set_state(chip, policy_src_send_softrst);
1648                 }
1649                 break;
1650         case 2:
1651                 if (evt & EVENT_TIMER_STATE) {
1652                         chip->notify.is_pd_connected = 1;
1653                         platform_set_vbus_lvl_enable(chip, 1, 0);
1654                         set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1655                         chip->tx_state = tx_idle;
1656                         chip->sub_state++;
1657                         chip->work_continue = 1;
1658                 }
1659                 break;
1660         default:
1661                 tmp = policy_send_data(chip);
1662                 if (tmp == tx_success) {
1663                         dev_info(chip->dev,
1664                                  "PD connected as DFP, supporting 5V\n");
1665                         set_state(chip, policy_src_ready);
1666                 } else if (tmp == tx_failed) {
1667                         set_state(chip, policy_src_send_softrst);
1668                 }
1669                 break;
1670         }
1671 }
1672
1673 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1674 {
1675         u32 tmp;
1676
1677         switch (chip->sub_state) {
1678         case 0:
1679                 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1680                 chip->tx_state = tx_idle;
1681                 chip->sub_state++;
1682                 /* without break */
1683         default:
1684                 tmp = policy_send_data(chip);
1685                 if (tmp == tx_success) {
1686                         if (chip->notify.is_pd_connected) {
1687                                 dev_info(chip->dev,
1688                                          "PD connected as DFP, supporting 5V\n");
1689                                 set_state(chip, policy_src_ready);
1690                         } else {
1691                                 set_state(chip, policy_src_send_hardrst);
1692                         }
1693                 } else if (tmp == tx_failed) {
1694                         set_state(chip, policy_src_send_softrst);
1695                 }
1696                 break;
1697         }
1698 }
1699
1700 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1701                                               int evt)
1702 {
1703         switch (chip->sub_state) {
1704         case 0:
1705                 chip->notify.is_pd_connected = 0;
1706                 platform_set_vbus_lvl_enable(chip, 0, 0);
1707                 if (chip->notify.data_role)
1708                         regmap_update_bits(chip->regmap,
1709                                            FUSB_REG_SWITCHES1,
1710                                            SWITCHES1_DATAROLE,
1711                                            SWITCHES1_DATAROLE);
1712                 else
1713                         regmap_update_bits(chip->regmap,
1714                                            FUSB_REG_SWITCHES1,
1715                                            SWITCHES1_DATAROLE,
1716                                            0);
1717
1718                 chip->timer_state = T_SRC_RECOVER;
1719                 fusb_timer_start(&chip->timer_state_machine,
1720                                  chip->timer_state);
1721                 chip->sub_state++;
1722                 break;
1723         default:
1724                 if (evt & EVENT_TIMER_STATE) {
1725                         platform_set_vbus_lvl_enable(chip, 1, 0);
1726                         chip->timer_mux = T_NO_RESPONSE;
1727                         fusb_timer_start(&chip->timer_mux_machine,
1728                                          chip->timer_mux);
1729                         set_state(chip, policy_src_startup);
1730                         dev_dbg(chip->dev, "reset over-> src startup\n");
1731                 }
1732                 break;
1733         }
1734 }
1735
1736 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1737 {
1738         if (evt & EVENT_RX) {
1739                 if ((PD_HEADER_CNT(chip->rec_head)) &&
1740                     (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1741                         process_vdm_msg(chip);
1742                         chip->work_continue = 1;
1743                         chip->timer_state = T_DISABLED;
1744                 }
1745         }
1746
1747         /* TODO: swap function would be added here later on*/
1748
1749         if (!chip->partner_cap[0])
1750                 set_state(chip, policy_src_get_sink_caps);
1751         else
1752                 auto_vdm_machine(chip, evt);
1753 }
1754
1755 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1756 {
1757         u32 tmp;
1758
1759         switch (chip->sub_state) {
1760         case 0:
1761                 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1762                 chip->tx_state = tx_idle;
1763                 chip->sub_state++;
1764                 /* without break */
1765         case 1:
1766                 tmp = policy_send_data(chip);
1767                 if (tmp == tx_success) {
1768                         chip->timer_state = T_SENDER_RESPONSE;
1769                         chip->sub_state++;
1770                         fusb_timer_start(&chip->timer_state_machine,
1771                                          chip->timer_state);
1772                 } else if (tmp == tx_failed) {
1773                         set_state(chip, policy_src_send_softrst);
1774                 }
1775
1776                 if (!(evt & FLAG_EVENT))
1777                         break;
1778         default:
1779                 if (evt & EVENT_RX) {
1780                         if ((PD_HEADER_CNT(chip->rec_head)) &&
1781                             (PD_HEADER_TYPE(chip->rec_head) ==
1782                              DMT_SINKCAPABILITIES)) {
1783                                 for (tmp = 0;
1784                                      tmp < PD_HEADER_CNT(chip->rec_head);
1785                                      tmp++) {
1786                                         chip->partner_cap[tmp] =
1787                                                 chip->rec_load[tmp];
1788                                 }
1789                                 set_state(chip, policy_src_ready);
1790                         } else {
1791                                 chip->partner_cap[0] = 0xffffffff;
1792                                 set_state(chip, policy_src_ready);
1793                         }
1794                 } else if (evt & EVENT_TIMER_STATE) {
1795                         dev_warn(chip->dev, "Get sink cap time out\n");
1796                         chip->partner_cap[0] = 0xffffffff;
1797                         set_state(chip, policy_src_ready);
1798                 }
1799         }
1800 }
1801
1802 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1803 {
1804         u32 tmp;
1805
1806         switch (chip->sub_state) {
1807         case 0:
1808                 chip->tx_state = tx_idle;
1809                 chip->sub_state++;
1810                 /* without break */
1811         default:
1812                 tmp = policy_send_hardrst(chip, evt);
1813                 if (tmp == tx_success) {
1814                         chip->hardrst_count++;
1815                         set_state(chip, policy_src_transition_default);
1816                 } else if (tmp == tx_failed) {
1817                         /* can't reach here */
1818                         set_state(chip, error_recovery);
1819                 }
1820                 break;
1821         }
1822 }
1823
1824 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1825 {
1826         u32 tmp;
1827
1828         switch (chip->sub_state) {
1829         case 0:
1830                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1831                 chip->tx_state = tx_idle;
1832                 chip->sub_state++;
1833                 /* without break */
1834         case 1:
1835                 tmp = policy_send_data(chip);
1836                 if (tmp == tx_success) {
1837                         chip->timer_state = T_SENDER_RESPONSE;
1838                         chip->sub_state++;
1839                         fusb_timer_start(&chip->timer_state_machine,
1840                                          chip->timer_state);
1841                 } else if (tmp == tx_failed) {
1842                         set_state(chip, policy_src_send_hardrst);
1843                 }
1844
1845                 if (!(evt & FLAG_EVENT))
1846                         break;
1847         default:
1848                 if (evt & EVENT_RX) {
1849                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1850                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1851                                 set_state(chip, policy_src_send_caps);
1852                 } else if (evt & EVENT_TIMER_STATE) {
1853                         set_state(chip, policy_src_send_hardrst);
1854                 }
1855                 break;
1856         }
1857 }
1858
1859 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1860 {
1861         chip->notify.is_pd_connected = 0;
1862         chip->msg_id = 0;
1863         chip->vdm_state = 0;
1864         chip->vdm_substate = 0;
1865         chip->vdm_send_state = 0;
1866         chip->val_tmp = 0;
1867         chip->pos_power = 0;
1868
1869         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1870
1871         tcpm_set_msg_header(chip);
1872         tcpm_set_polarity(chip, chip->cc_polarity);
1873         tcpm_set_rx_enable(chip, 1);
1874         set_state(chip, policy_snk_discovery);
1875 }
1876
1877 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1878 {
1879         set_state(chip, policy_snk_wait_caps);
1880         chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1881         fusb_timer_start(&chip->timer_state_machine,
1882                          chip->timer_state);
1883 }
1884
1885 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1886 {
1887         if (evt & EVENT_RX) {
1888                 if (PD_HEADER_CNT(chip->rec_head) &&
1889                     PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1890                         chip->timer_mux = T_DISABLED;
1891                         set_state(chip, policy_snk_evaluate_caps);
1892                 }
1893         } else if (evt & EVENT_TIMER_STATE) {
1894                 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1895                         set_state(chip, policy_snk_send_hardrst);
1896                 else
1897                         set_state(chip, disabled);
1898         } else if ((evt & EVENT_TIMER_MUX) &&
1899                    (chip->hardrst_count > N_HARDRESET_COUNT)) {
1900                 if (chip->notify.is_pd_connected)
1901                         set_state(chip, error_recovery);
1902                 else
1903                         set_state(chip, disabled);
1904         }
1905 }
1906
1907 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1908 {
1909         u32 tmp;
1910
1911         chip->hardrst_count = 0;
1912         chip->pos_power = 0;
1913
1914         for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1915                 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1916                 case 0:
1917                         /* Fixed Supply */
1918                         if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1919                                 chip->pos_power = tmp + 1;
1920                         break;
1921                 case 1:
1922                         /* Battery */
1923                         if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1924                                 chip->pos_power = tmp + 1;
1925                         break;
1926                 default:
1927                         /* not meet battery caps */
1928                         break;
1929                 }
1930         }
1931         fusb302_set_pos_power_by_charge_ic(chip);
1932
1933         if ((!chip->pos_power) || (chip->pos_power > 7)) {
1934                 chip->pos_power = 0;
1935                 set_state(chip, policy_snk_wait_caps);
1936         } else {
1937                 set_state(chip, policy_snk_select_cap);
1938         }
1939 }
1940
1941 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1942 {
1943         u32 tmp;
1944
1945         switch (chip->sub_state) {
1946         case 0:
1947                 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1948                 chip->sub_state = 1;
1949                 chip->tx_state = tx_idle;
1950                 /* without break */
1951         case 1:
1952                 tmp = policy_send_data(chip);
1953
1954                 if (tmp == tx_success) {
1955                         chip->timer_state = T_SENDER_RESPONSE;
1956                         fusb_timer_start(&chip->timer_state_machine,
1957                                          chip->timer_state);
1958                         chip->sub_state++;
1959                 } else if (tmp == tx_failed) {
1960                         set_state(chip, policy_snk_discovery);
1961                         break;
1962                 }
1963
1964                 if (!(evt & FLAG_EVENT))
1965                         break;
1966         default:
1967                 if (evt & EVENT_RX) {
1968                         if (!PD_HEADER_CNT(chip->rec_head)) {
1969                                 switch (PD_HEADER_TYPE(chip->rec_head)) {
1970                                 case CMT_ACCEPT:
1971                                         set_state(chip,
1972                                                   policy_snk_transition_sink);
1973                                         chip->timer_state = T_PS_TRANSITION;
1974                                         fusb_timer_start(&chip->timer_state_machine,
1975                                                          chip->timer_state);
1976                                         break;
1977                                 case CMT_WAIT:
1978                                 case CMT_REJECT:
1979                                         if (chip->notify.is_pd_connected) {
1980                                                 dev_info(chip->dev,
1981                                                          "PD connected as UFP, fetching 5V\n");
1982                                                 set_state(chip,
1983                                                           policy_snk_ready);
1984                                         } else {
1985                                                 set_state(chip,
1986                                                           policy_snk_wait_caps);
1987                                                 /*
1988                                                  * make sure don't send
1989                                                  * hard reset to prevent
1990                                                  * infinite loop
1991                                                  */
1992                                                 chip->hardrst_count =
1993                                                         N_HARDRESET_COUNT + 1;
1994                                         }
1995                                         break;
1996                                 default:
1997                                         break;
1998                                 }
1999                         }
2000                 } else if (evt & EVENT_TIMER_STATE) {
2001                         set_state(chip, policy_snk_send_hardrst);
2002                 }
2003                 break;
2004         }
2005 }
2006
2007 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
2008 {
2009         if (evt & EVENT_RX) {
2010                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2011                     (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
2012                         chip->notify.is_pd_connected = 1;
2013                         dev_info(chip->dev,
2014                                  "PD connected as UFP, fetching 5V\n");
2015                         set_state(chip, policy_snk_ready);
2016                 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2017                            (PD_HEADER_TYPE(chip->rec_head) ==
2018                             DMT_SOURCECAPABILITIES)) {
2019                         set_state(chip, policy_snk_evaluate_caps);
2020                 }
2021         } else if (evt & EVENT_TIMER_STATE) {
2022                 set_state(chip, policy_snk_send_hardrst);
2023         }
2024 }
2025
2026 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2027                                               int evt)
2028 {
2029         switch (chip->sub_state) {
2030         case 0:
2031                 chip->notify.is_pd_connected = 0;
2032                 chip->timer_mux = T_NO_RESPONSE;
2033                 fusb_timer_start(&chip->timer_mux_machine,
2034                                  chip->timer_mux);
2035                 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2036                 fusb_timer_start(&chip->timer_state_machine,
2037                                  chip->timer_state);
2038                 if (chip->notify.data_role)
2039                         tcpm_set_msg_header(chip);
2040
2041                 chip->sub_state++;
2042         case 1:
2043                 if (!tcpm_check_vbus(chip)) {
2044                         chip->sub_state++;
2045                         chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2046                         fusb_timer_start(&chip->timer_state_machine,
2047                                          chip->timer_state);
2048                 } else if (evt & EVENT_TIMER_STATE) {
2049                         set_state(chip, policy_snk_startup);
2050                 }
2051                 break;
2052         default:
2053                 if (tcpm_check_vbus(chip)) {
2054                         chip->timer_state = T_DISABLED;
2055                         set_state(chip, policy_snk_startup);
2056                 } else if (evt & EVENT_TIMER_STATE) {
2057                         set_state(chip, policy_snk_startup);
2058                 }
2059                 break;
2060         }
2061 }
2062
2063 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2064 {
2065         /* TODO: snk_ready_function would be added later on*/
2066         platform_fusb_notify(chip);
2067 }
2068
2069 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2070 {
2071         u32 tmp;
2072
2073         switch (chip->sub_state) {
2074         case 0:
2075                 chip->tx_state = tx_idle;
2076                 chip->sub_state++;
2077         default:
2078                 tmp = policy_send_hardrst(chip, evt);
2079                 if (tmp == tx_success) {
2080                         chip->hardrst_count++;
2081                         set_state(chip, policy_snk_transition_default);
2082                 } else if (tmp == tx_failed) {
2083                         set_state(chip, error_recovery);
2084                 }
2085                 break;
2086         }
2087 }
2088
2089 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2090 {
2091         u32 tmp;
2092
2093         switch (chip->sub_state) {
2094         case 0:
2095                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2096                 chip->tx_state = tx_idle;
2097                 chip->sub_state++;
2098         case 1:
2099                 tmp = policy_send_data(chip);
2100                 if (tmp == tx_success) {
2101                         chip->timer_state = T_SENDER_RESPONSE;
2102                         chip->sub_state++;
2103                         fusb_timer_start(&chip->timer_state_machine,
2104                                          chip->timer_state);
2105                 } else if (tmp == tx_failed) {
2106                         /* can't reach here */
2107                         set_state(chip, policy_snk_send_hardrst);
2108                 }
2109
2110                 if (!(evt & FLAG_EVENT))
2111                         break;
2112         default:
2113                 if (evt & EVENT_RX) {
2114                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
2115                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2116                                 set_state(chip, policy_snk_wait_caps);
2117                 } else if (evt & EVENT_TIMER_STATE) {
2118                         set_state(chip, policy_snk_send_hardrst);
2119                 }
2120                 break;
2121         }
2122 }
2123
2124 static void state_machine_typec(struct fusb30x_chip *chip)
2125 {
2126         int evt = 0;
2127         int cc1, cc2;
2128
2129         tcpc_alert(chip, &evt);
2130         mux_alert(chip, &evt);
2131         if (!evt)
2132                 goto BACK;
2133
2134         if (chip->notify.is_cc_connected) {
2135                 if (evt & EVENT_CC) {
2136                         if ((chip->cc_state & 0x04) &&
2137                             (chip->conn_state !=
2138                              policy_snk_transition_default)) {
2139                                 if (!tcpm_check_vbus(chip))
2140                                         set_state_unattached(chip);
2141                         } else if (chip->conn_state !=
2142                                    policy_src_transition_default) {
2143                                 tcpm_get_cc(chip, &cc1, &cc2);
2144                                 if (!(chip->cc_state & 0x01))
2145                                         cc1 = cc2;
2146                                 if (cc1 == TYPEC_CC_VOLT_OPEN)
2147                                         set_state_unattached(chip);
2148                         }
2149                 }
2150         }
2151
2152         if (evt & EVENT_RX) {
2153                 tcpm_get_message(chip);
2154                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2155                     (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2156                         if (chip->notify.power_role)
2157                                 set_state(chip, policy_src_send_softrst);
2158                         else
2159                                 set_state(chip, policy_snk_send_softrst);
2160                 }
2161         }
2162
2163         if (evt & EVENT_TX) {
2164                 if (chip->tx_state == tx_success)
2165                         chip->msg_id++;
2166         }
2167         switch (chip->conn_state) {
2168         case disabled:
2169                 fusb_state_disabled(chip, evt);
2170                 break;
2171         case error_recovery:
2172                 set_state_unattached(chip);
2173                 break;
2174         case unattached:
2175                 fusb_state_unattached(chip, evt);
2176                 break;
2177         case attach_wait_sink:
2178                 fusb_state_attach_wait_sink(chip, evt);
2179                 break;
2180         case attach_wait_source:
2181                 fusb_state_attach_wait_source(chip, evt);
2182                 break;
2183         case attached_source:
2184                 fusb_state_attached_source(chip, evt);
2185                 break;
2186         case attached_sink:
2187                 fusb_state_attached_sink(chip, evt);
2188                 break;
2189
2190         /* POWER DELIVERY */
2191         case policy_src_startup:
2192                 fusb_state_src_startup(chip, evt);
2193                 break;
2194         case policy_src_discovery:
2195                 fusb_state_src_discovery(chip, evt);
2196                 break;
2197         case policy_src_send_caps:
2198                 fusb_state_src_send_caps(chip, evt);
2199                 if (chip->conn_state != policy_src_negotiate_cap)
2200                         break;
2201         case policy_src_negotiate_cap:
2202                 fusb_state_src_negotiate_cap(chip, evt);
2203
2204         case policy_src_transition_supply:
2205                 fusb_state_src_transition_supply(chip, evt);
2206                 break;
2207         case policy_src_cap_response:
2208                 fusb_state_src_cap_response(chip, evt);
2209                 break;
2210         case policy_src_transition_default:
2211                 fusb_state_src_transition_default(chip, evt);
2212                 break;
2213         case policy_src_ready:
2214                 fusb_state_src_ready(chip, evt);
2215                 break;
2216         case policy_src_get_sink_caps:
2217                 fusb_state_src_get_sink_cap(chip, evt);
2218                 break;
2219         case policy_src_send_hardrst:
2220                 fusb_state_src_send_hardreset(chip, evt);
2221                 break;
2222         case policy_src_send_softrst:
2223                 fusb_state_src_send_softreset(chip, evt);
2224                 break;
2225
2226         /* UFP */
2227         case policy_snk_startup:
2228                 fusb_state_snk_startup(chip, evt);
2229                 break;
2230         case policy_snk_discovery:
2231                 fusb_state_snk_discovery(chip, evt);
2232                 break;
2233         case policy_snk_wait_caps:
2234                 fusb_state_snk_wait_caps(chip, evt);
2235                 break;
2236         case policy_snk_evaluate_caps:
2237                 fusb_state_snk_evaluate_caps(chip, evt);
2238                 /* without break */
2239         case policy_snk_select_cap:
2240                 fusb_state_snk_select_cap(chip, evt);
2241                 break;
2242         case policy_snk_transition_sink:
2243                 fusb_state_snk_transition_sink(chip, evt);
2244                 break;
2245         case policy_snk_transition_default:
2246                 fusb_state_snk_transition_default(chip, evt);
2247                 break;
2248         case policy_snk_ready:
2249                 fusb_state_snk_ready(chip, evt);
2250                 break;
2251         case policy_snk_send_hardrst:
2252                 fusb_state_snk_send_hardreset(chip, evt);
2253                 break;
2254         case policy_snk_send_softrst:
2255                 fusb_state_snk_send_softreset(chip, evt);
2256                 break;
2257
2258         default:
2259                 break;
2260         }
2261
2262 BACK:
2263         if (chip->work_continue) {
2264                 queue_work(chip->fusb30x_wq, &chip->work);
2265                 return;
2266         }
2267
2268         if (!platform_get_device_irq_state(chip))
2269                 fusb_irq_enable(chip);
2270         else
2271                 queue_work(chip->fusb30x_wq, &chip->work);
2272 }
2273
2274 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2275 {
2276         struct fusb30x_chip *chip = dev_id;
2277
2278         queue_work(chip->fusb30x_wq, &chip->work);
2279         fusb_irq_disable(chip);
2280         return IRQ_HANDLED;
2281 }
2282
2283 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2284 {
2285         chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2286         if (IS_ERR(chip->gpio_int))
2287                 return PTR_ERR(chip->gpio_int);
2288
2289         /* some board support vbus with other ways */
2290         chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2291                                                      GPIOD_OUT_LOW);
2292         if (IS_ERR(chip->gpio_vbus_5v))
2293                 dev_warn(chip->dev,
2294                          "Could not get named GPIO for VBus5V!\n");
2295         else
2296                 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2297
2298         chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2299                                                         "vbus-other",
2300                                                         GPIOD_OUT_LOW);
2301         if (IS_ERR(chip->gpio_vbus_other))
2302                 dev_warn(chip->dev,
2303                          "Could not get named GPIO for VBusOther!\n");
2304         else
2305                 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2306
2307         chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2308                                                        GPIOD_OUT_LOW);
2309         if (IS_ERR(chip->gpio_discharge)) {
2310                 dev_warn(chip->dev,
2311                          "Could not get named GPIO for discharge!\n");
2312                 chip->gpio_discharge = NULL;
2313         }
2314
2315         return 0;
2316 }
2317
2318 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2319 {
2320         int i;
2321
2322         for (i = 0; i < fusb30x_port_used; i++) {
2323                 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2324                         if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2325                                 fusb30x_port_info[i]->timer_state = 0;
2326                         break;
2327                 }
2328
2329                 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2330                         if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2331                                 fusb30x_port_info[i]->timer_mux = 0;
2332                         break;
2333                 }
2334         }
2335
2336         if (i != fusb30x_port_used)
2337                 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2338                            &fusb30x_port_info[i]->work);
2339
2340         return HRTIMER_NORESTART;
2341 }
2342
2343 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2344 {
2345         hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2346                      HRTIMER_MODE_REL);
2347         chip->timer_state_machine.function = fusb_timer_handler;
2348
2349         hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2350                      HRTIMER_MODE_REL);
2351         chip->timer_mux_machine.function = fusb_timer_handler;
2352
2353         chip->timer_state = T_DISABLED;
2354         chip->timer_mux = T_DISABLED;
2355 }
2356
2357 static void fusb302_work_func(struct work_struct *work)
2358 {
2359         struct fusb30x_chip *chip;
2360
2361         chip = container_of(work, struct fusb30x_chip, work);
2362         state_machine_typec(chip);
2363 }
2364
2365 static int fusb30x_probe(struct i2c_client *client,
2366                          const struct i2c_device_id *id)
2367 {
2368         struct fusb30x_chip *chip;
2369         struct PD_CAP_INFO *pd_cap_info;
2370         int ret;
2371
2372         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2373         if (!chip)
2374                 return -ENOMEM;
2375
2376         if (fusb30x_port_used == 0xff)
2377                 return -1;
2378
2379         chip->port_num = fusb30x_port_used++;
2380         fusb30x_port_info[chip->port_num] = chip;
2381
2382         chip->dev = &client->dev;
2383         chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2384         if (IS_ERR(chip->regmap)) {
2385                 dev_err(&client->dev, "Failed to allocate regmap!\n");
2386                 return PTR_ERR(chip->regmap);
2387         }
2388
2389         ret = fusb_initialize_gpio(chip);
2390         if (ret)
2391                 return ret;
2392
2393         fusb_initialize_timer(chip);
2394
2395         chip->fusb30x_wq = create_workqueue("fusb302_wq");
2396         INIT_WORK(&chip->work, fusb302_work_func);
2397
2398         tcpm_init(chip);
2399         tcpm_set_rx_enable(chip, 0);
2400         chip->conn_state = unattached;
2401         tcpm_set_cc(chip, FUSB_MODE_DRP);
2402
2403         chip->n_caps_used = 1;
2404         chip->source_power_supply[0] = 0x64;
2405         chip->source_max_current[0] = 0x96;
2406
2407         /*
2408          * these two variable should be 1 if support DRP,
2409          * but now we do not support swap,
2410          * it will be blanked in future
2411          */
2412         pd_cap_info = &chip->pd_cap_info;
2413         pd_cap_info->dual_role_power = 0;
2414         pd_cap_info->data_role_swap = 0;
2415
2416         pd_cap_info->externally_powered = 1;
2417         pd_cap_info->usb_suspend_support = 0;
2418         pd_cap_info->usb_communications_cap = 0;
2419         pd_cap_info->supply_type = 0;
2420         pd_cap_info->peak_current = 0;
2421
2422         chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2423         if (IS_ERR(chip->extcon)) {
2424                 dev_err(&client->dev, "allocat extcon failed\n");
2425                 return PTR_ERR(chip->extcon);
2426         }
2427
2428         ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2429         if (ret) {
2430                 dev_err(&client->dev, "failed to register extcon: %d\n",
2431                         ret);
2432                 return ret;
2433         }
2434
2435         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2436                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2437         if (ret) {
2438                 dev_err(&client->dev,
2439                         "failed to set USB property capability: %d\n",
2440                         ret);
2441                 return ret;
2442         }
2443
2444         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2445                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2446         if (ret) {
2447                 dev_err(&client->dev,
2448                         "failed to set USB_HOST property capability: %d\n",
2449                         ret);
2450                 return ret;
2451         }
2452
2453         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2454                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2455         if (ret) {
2456                 dev_err(&client->dev,
2457                         "failed to set DISP_DP property capability: %d\n",
2458                         ret);
2459                 return ret;
2460         }
2461
2462         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2463                                              EXTCON_PROP_USB_SS);
2464         if (ret) {
2465                 dev_err(&client->dev,
2466                         "failed to set USB USB_SS property capability: %d\n",
2467                         ret);
2468                 return ret;
2469         }
2470
2471         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2472                                              EXTCON_PROP_USB_SS);
2473         if (ret) {
2474                 dev_err(&client->dev,
2475                         "failed to set USB_HOST USB_SS property capability: %d\n",
2476                         ret);
2477                 return ret;
2478         }
2479
2480         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2481                                              EXTCON_PROP_USB_SS);
2482         if (ret) {
2483                 dev_err(&client->dev,
2484                         "failed to set DISP_DP USB_SS property capability: %d\n",
2485                         ret);
2486                 return ret;
2487         }
2488
2489         ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2490                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2491         if (ret) {
2492                 dev_err(&client->dev,
2493                         "failed to set USB_PD property capability: %d\n", ret);
2494                 return ret;
2495         }
2496
2497         i2c_set_clientdata(client, chip);
2498
2499         spin_lock_init(&chip->irq_lock);
2500         chip->enable_irq = 1;
2501
2502         chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2503         if (chip->gpio_int_irq < 0) {
2504                 dev_err(&client->dev,
2505                         "Unable to request IRQ for INT_N GPIO! %d\n",
2506                         ret);
2507                 ret = chip->gpio_int_irq;
2508                 goto IRQ_ERR;
2509         }
2510
2511         ret = devm_request_threaded_irq(&client->dev,
2512                                         chip->gpio_int_irq,
2513                                         NULL,
2514                                         cc_interrupt_handler,
2515                                         IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2516                                         client->name,
2517                                         chip);
2518         if (ret) {
2519                 dev_err(&client->dev, "irq request failed\n");
2520                 goto IRQ_ERR;
2521         }
2522
2523         dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2524
2525         return 0;
2526
2527 IRQ_ERR:
2528         destroy_workqueue(chip->fusb30x_wq);
2529         return ret;
2530 }
2531
2532 static int fusb30x_remove(struct i2c_client *client)
2533 {
2534         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2535
2536         destroy_workqueue(chip->fusb30x_wq);
2537         return 0;
2538 }
2539
2540 static void fusb30x_shutdown(struct i2c_client *client)
2541 {
2542         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2543
2544         if (chip->gpio_vbus_5v)
2545                 gpiod_set_value(chip->gpio_vbus_5v, 0);
2546         if (chip->gpio_discharge) {
2547                 gpiod_set_value(chip->gpio_discharge, 1);
2548                 msleep(100);
2549                 gpiod_set_value(chip->gpio_discharge, 0);
2550         }
2551 }
2552
2553 static const struct of_device_id fusb30x_dt_match[] = {
2554         { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2555         {},
2556 };
2557 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2558
2559 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2560         { FUSB30X_I2C_DRIVER_NAME, 0 },
2561         {}
2562 };
2563 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2564
2565 static struct i2c_driver fusb30x_driver = {
2566         .driver = {
2567                 .name = FUSB30X_I2C_DRIVER_NAME,
2568                 .of_match_table = of_match_ptr(fusb30x_dt_match),
2569         },
2570         .probe = fusb30x_probe,
2571         .remove = fusb30x_remove,
2572         .shutdown = fusb30x_shutdown,
2573         .id_table = fusb30x_i2c_device_id,
2574 };
2575
2576 module_i2c_driver(fusb30x_driver);
2577
2578 MODULE_LICENSE("GPL");
2579 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2580 MODULE_DESCRIPTION("fusb302 typec pd driver");