2 * System Control and Power Interface (SCPI) Message Protocol driver
4 * Copyright (C) 2014 ARM Ltd.
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/err.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/printk.h>
26 #include <linux/mailbox_client.h>
27 #include <linux/scpi_protocol.h>
28 #include <linux/slab.h>
29 #include <linux/rockchip-mailbox.h>
30 #include <linux/rockchip/common.h>
34 #define CMD_ID_SHIFT 0
35 #define CMD_ID_MASK 0xff
36 #define CMD_SENDER_ID_SHIFT 8
37 #define CMD_SENDER_ID_MASK 0xff
38 #define CMD_DATA_SIZE_SHIFT 20
39 #define CMD_DATA_SIZE_MASK 0x1ff
40 #define PACK_SCPI_CMD(cmd, sender, txsz) \
41 ((((cmd) & CMD_ID_MASK) << CMD_ID_SHIFT) | \
42 (((sender) & CMD_SENDER_ID_MASK) << CMD_SENDER_ID_SHIFT) | \
43 (((txsz) & CMD_DATA_SIZE_MASK) << CMD_DATA_SIZE_SHIFT))
44 #define SCPI_CMD_DEFAULT_TIMEOUT_MS 1000
46 #define MAX_DVFS_DOMAINS 3
47 #define MAX_DVFS_OPPS 8
48 #define DVFS_LATENCY(hdr) ((hdr) >> 16)
49 #define DVFS_OPP_COUNT(hdr) (((hdr) >> 8) & 0xff)
51 static int max_chan_num = 0;
52 static DECLARE_BITMAP(bm_mbox_chans, 4);
53 static DEFINE_MUTEX(scpi_mtx);
55 struct scpi_data_buf {
57 struct rockchip_mbox_msg *data;
58 struct completion complete;
62 static int high_priority_cmds[] = {
63 SCPI_CMD_GET_CSS_PWR_STATE,
64 SCPI_CMD_CFG_PWR_STATE_STAT,
65 SCPI_CMD_GET_PWR_STATE_STAT,
70 SCPI_CMD_SET_CLOCK_INDEX,
71 SCPI_CMD_SET_CLOCK_VALUE,
72 SCPI_CMD_GET_CLOCK_VALUE,
75 SCPI_CMD_SENSOR_CFG_PERIODIC,
76 SCPI_CMD_SENSOR_CFG_BOUNDS,
79 static struct scpi_opp *scpi_opps[MAX_DVFS_DOMAINS];
81 static struct device *the_scpi_device;
83 static int scpi_linux_errmap[SCPI_ERR_MAX] = {
84 0, -EINVAL, -ENOEXEC, -EMSGSIZE,
85 -EINVAL, -EACCES, -ERANGE, -ETIMEDOUT,
86 -ENOMEM, -EINVAL, -EOPNOTSUPP, -EIO,
89 static inline int scpi_to_linux_errno(int errno)
91 if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX)
92 return scpi_linux_errmap[errno];
96 static bool __maybe_unused high_priority_chan_supported(int cmd)
100 for (idx = 0; idx < ARRAY_SIZE(high_priority_cmds); idx++)
101 if (cmd == high_priority_cmds[idx])
106 static int scpi_alloc_mbox_chan(void)
110 mutex_lock(&scpi_mtx);
112 index = find_first_zero_bit(bm_mbox_chans, max_chan_num);
113 if (index >= max_chan_num) {
114 pr_err("alloc mailbox channel failed\n");
115 mutex_unlock(&scpi_mtx);
119 set_bit(index, bm_mbox_chans);
121 mutex_unlock(&scpi_mtx);
125 static void scpi_free_mbox_chan(int chan)
129 mutex_lock(&scpi_mtx);
131 if (index < max_chan_num && index >= 0)
132 clear_bit(index, bm_mbox_chans);
134 mutex_unlock(&scpi_mtx);
137 static void scpi_rx_callback(struct mbox_client *cl, void *msg)
139 struct rockchip_mbox_msg *data = (struct rockchip_mbox_msg *)msg;
140 struct scpi_data_buf *scpi_buf = data->cl_data;
142 complete(&scpi_buf->complete);
145 static int send_scpi_cmd(struct scpi_data_buf *scpi_buf, int index)
147 struct mbox_chan *chan;
148 struct mbox_client cl;
149 struct rockchip_mbox_msg *data = scpi_buf->data;
152 int timeout = msecs_to_jiffies(scpi_buf->timeout_ms);
154 if (!the_scpi_device) {
155 pr_err("Scpi initializes unsuccessfully\n");
159 cl.dev = the_scpi_device;
160 cl.rx_callback = scpi_rx_callback;
163 cl.knows_txdone = false;
165 chan = mbox_request_channel(&cl, index);
167 scpi_free_mbox_chan(index);
168 return PTR_ERR(chan);
171 init_completion(&scpi_buf->complete);
172 if (mbox_send_message(chan, (void *)data) < 0) {
173 status = SCPI_ERR_TIMEOUT;
177 ret = wait_for_completion_timeout(&scpi_buf->complete, timeout);
179 status = SCPI_ERR_TIMEOUT;
182 status = *(u32 *)(data->rx_buf); /* read first word */
185 mbox_free_channel(chan);
186 scpi_free_mbox_chan(index);
188 return scpi_to_linux_errno(status);
191 #define SCPI_SETUP_DBUF(scpi_buf, mbox_buf, _client_id,\
192 _cmd, _tx_buf, _rx_buf) \
194 struct rockchip_mbox_msg *pdata = &mbox_buf; \
196 pdata->tx_buf = &_tx_buf; \
197 pdata->tx_size = sizeof(_tx_buf); \
198 pdata->rx_buf = &_rx_buf; \
199 pdata->rx_size = sizeof(_rx_buf); \
200 scpi_buf.client_id = _client_id; \
201 scpi_buf.data = pdata; \
202 scpi_buf.timeout_ms = SCPI_CMD_DEFAULT_TIMEOUT_MS; \
205 static int scpi_execute_cmd(struct scpi_data_buf *scpi_buf)
207 struct rockchip_mbox_msg *data;
210 if (!scpi_buf || !scpi_buf->data)
213 index = scpi_alloc_mbox_chan();
217 data = scpi_buf->data;
218 data->cmd = PACK_SCPI_CMD(data->cmd, scpi_buf->client_id,
220 data->cl_data = scpi_buf;
222 return send_scpi_cmd(scpi_buf, index);
225 unsigned long scpi_clk_get_val(u16 clk_id)
227 struct scpi_data_buf sdata;
228 struct rockchip_mbox_msg mdata;
234 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
235 SCPI_CMD_GET_CLOCK_VALUE, clk_id, buf);
236 if (scpi_execute_cmd(&sdata))
241 EXPORT_SYMBOL_GPL(scpi_clk_get_val);
243 int scpi_clk_set_val(u16 clk_id, unsigned long rate)
245 struct scpi_data_buf sdata;
246 struct rockchip_mbox_msg mdata;
253 buf.clk_rate = (u32)rate;
256 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
257 SCPI_CMD_SET_CLOCK_VALUE, buf, stat);
258 return scpi_execute_cmd(&sdata);
260 EXPORT_SYMBOL_GPL(scpi_clk_set_val);
262 struct scpi_opp *scpi_dvfs_get_opps(u8 domain)
264 struct scpi_data_buf sdata;
265 struct rockchip_mbox_msg mdata;
269 struct scpi_opp_entry opp[MAX_DVFS_OPPS];
271 struct scpi_opp *opps;
275 if (domain >= MAX_DVFS_DOMAINS)
276 return ERR_PTR(-EINVAL);
278 if (scpi_opps[domain]) /* data already populated */
279 return scpi_opps[domain];
281 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
282 SCPI_CMD_GET_DVFS_INFO, domain, buf);
283 ret = scpi_execute_cmd(&sdata);
287 opps = kmalloc(sizeof(*opps), GFP_KERNEL);
289 return ERR_PTR(-ENOMEM);
291 count = DVFS_OPP_COUNT(buf.header);
292 opps_sz = count * sizeof(*(opps->opp));
295 opps->latency = DVFS_LATENCY(buf.header);
296 opps->opp = kmalloc(opps_sz, GFP_KERNEL);
299 return ERR_PTR(-ENOMEM);
302 memcpy(opps->opp, &buf.opp[0], opps_sz);
303 scpi_opps[domain] = opps;
307 EXPORT_SYMBOL_GPL(scpi_dvfs_get_opps);
309 int scpi_dvfs_get_idx(u8 domain)
311 struct scpi_data_buf sdata;
312 struct rockchip_mbox_msg mdata;
319 if (domain >= MAX_DVFS_DOMAINS)
322 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
323 SCPI_CMD_GET_DVFS, domain, buf);
324 ret = scpi_execute_cmd(&sdata);
330 EXPORT_SYMBOL_GPL(scpi_dvfs_get_idx);
332 int scpi_dvfs_set_idx(u8 domain, u8 idx)
334 struct scpi_data_buf sdata;
335 struct rockchip_mbox_msg mdata;
343 buf.dvfs_domain = domain;
345 if (domain >= MAX_DVFS_DOMAINS)
348 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
349 SCPI_CMD_SET_DVFS, buf, stat);
350 return scpi_execute_cmd(&sdata);
352 EXPORT_SYMBOL_GPL(scpi_dvfs_set_idx);
354 int scpi_get_sensor(char *name)
356 struct scpi_data_buf sdata;
357 struct rockchip_mbox_msg mdata;
372 /* This should be handled by a generic macro */
374 struct rockchip_mbox_msg *pdata = &mdata;
376 pdata->cmd = SCPI_CMD_SENSOR_CAPABILITIES;
378 pdata->rx_buf = &cap_buf;
379 pdata->rx_size = sizeof(cap_buf);
380 sdata.client_id = SCPI_CL_THERMAL;
384 ret = scpi_execute_cmd(&sdata);
389 for (sensor_id = 0; sensor_id < cap_buf.sensors; sensor_id++) {
390 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
391 SCPI_CMD_SENSOR_INFO, sensor_id, info_buf);
392 ret = scpi_execute_cmd(&sdata);
396 if (!strcmp(name, info_buf.name)) {
404 EXPORT_SYMBOL_GPL(scpi_get_sensor);
406 int scpi_get_sensor_value(u16 sensor, u32 *val)
408 struct scpi_data_buf sdata;
409 struct rockchip_mbox_msg mdata;
416 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL, SCPI_CMD_SENSOR_VALUE,
419 ret = scpi_execute_cmd(&sdata);
425 EXPORT_SYMBOL_GPL(scpi_get_sensor_value);
427 static int scpi_get_version(u32 old, u32 *ver)
429 struct scpi_data_buf sdata;
430 struct rockchip_mbox_msg mdata;
437 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS, SCPI_SYS_GET_VERSION,
440 ret = scpi_execute_cmd(&sdata);
447 int scpi_sys_set_mcu_state_suspend(void)
449 struct scpi_data_buf sdata;
450 struct rockchip_mbox_msg mdata;
459 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
460 SCPI_SYS_SET_MCU_STATE_SUSPEND, tx_buf, rx_buf);
461 return scpi_execute_cmd(&sdata);
463 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_suspend);
465 int scpi_sys_set_mcu_state_resume(void)
467 struct scpi_data_buf sdata;
468 struct rockchip_mbox_msg mdata;
478 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
479 SCPI_SYS_SET_MCU_STATE_RESUME, tx_buf, rx_buf);
480 return scpi_execute_cmd(&sdata);
482 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_resume);
484 int scpi_ddr_init(u32 dram_speed_bin, u32 freq, u32 lcdc_type)
486 struct scpi_data_buf sdata;
487 struct rockchip_mbox_msg mdata;
497 tx_buf.dram_speed_bin = (u32)dram_speed_bin;
498 tx_buf.freq = (u32)freq;
499 tx_buf.lcdc_type = (u32)lcdc_type;
501 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
502 SCPI_DDR_INIT, tx_buf, rx_buf);
503 return scpi_execute_cmd(&sdata);
505 EXPORT_SYMBOL_GPL(scpi_ddr_init);
507 int scpi_ddr_set_clk_rate(u32 rate, u32 lcdc_type)
509 struct scpi_data_buf sdata;
510 struct rockchip_mbox_msg mdata;
519 tx_buf.clk_rate = (u32)rate;
520 tx_buf.lcdc_type = (u32)lcdc_type;
521 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
522 SCPI_DDR_SET_FREQ, tx_buf, rx_buf);
523 return scpi_execute_cmd(&sdata);
525 EXPORT_SYMBOL_GPL(scpi_ddr_set_clk_rate);
527 int scpi_ddr_round_rate(u32 m_hz)
529 struct scpi_data_buf sdata;
530 struct rockchip_mbox_msg mdata;
539 tx_buf.clk_rate = (u32)m_hz;
541 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
542 SCPI_DDR_ROUND_RATE, tx_buf, rx_buf);
543 if (scpi_execute_cmd(&sdata))
546 return rx_buf.round_rate;
548 EXPORT_SYMBOL_GPL(scpi_ddr_round_rate);
550 int scpi_ddr_set_auto_self_refresh(u32 en)
552 struct scpi_data_buf sdata;
553 struct rockchip_mbox_msg mdata;
561 tx_buf.enable = (u32)en;
563 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
564 SCPI_DDR_AUTO_SELF_REFRESH, tx_buf, rx_buf);
565 return scpi_execute_cmd(&sdata);
567 EXPORT_SYMBOL_GPL(scpi_ddr_set_auto_self_refresh);
569 int scpi_ddr_bandwidth_get(struct ddr_bw_info *ddr_bw_ch0,
570 struct ddr_bw_info *ddr_bw_ch1)
572 struct scpi_data_buf sdata;
573 struct rockchip_mbox_msg mdata;
579 struct ddr_bw_info ddr_bw_ch0;
580 struct ddr_bw_info ddr_bw_ch1;
585 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
586 SCPI_DDR_BANDWIDTH_GET, tx_buf, rx_buf);
587 if (scpi_execute_cmd(&sdata))
590 memcpy(ddr_bw_ch0, &(rx_buf.ddr_bw_ch0), sizeof(rx_buf.ddr_bw_ch0));
591 memcpy(ddr_bw_ch1, &(rx_buf.ddr_bw_ch1), sizeof(rx_buf.ddr_bw_ch1));
595 EXPORT_SYMBOL_GPL(scpi_ddr_bandwidth_get);
597 int scpi_ddr_get_clk_rate(void)
599 struct scpi_data_buf sdata;
600 struct rockchip_mbox_msg mdata;
610 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
611 SCPI_DDR_GET_FREQ, tx_buf, rx_buf);
612 if (scpi_execute_cmd(&sdata))
615 return rx_buf.clk_rate;
617 EXPORT_SYMBOL_GPL(scpi_ddr_get_clk_rate);
619 int scpi_thermal_get_temperature(void)
622 struct scpi_data_buf sdata;
623 struct rockchip_mbox_msg mdata;
634 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
635 SCPI_THERMAL_GET_TSADC_DATA, tx_buf, rx_buf);
637 ret = scpi_execute_cmd(&sdata);
639 pr_err("get temperature from MCU failed, ret=%d\n", ret);
643 return rx_buf.tsadc_data;
645 EXPORT_SYMBOL_GPL(scpi_thermal_get_temperature);
647 int scpi_thermal_set_clk_cycle(u32 cycle)
649 struct scpi_data_buf sdata;
650 struct rockchip_mbox_msg mdata;
659 tx_buf.clk_cycle = cycle;
660 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
661 SCPI_THERMAL_SET_TSADC_CYCLE, tx_buf, rx_buf);
663 return scpi_execute_cmd(&sdata);
665 EXPORT_SYMBOL_GPL(scpi_thermal_set_clk_cycle);
667 static struct of_device_id mobx_scpi_of_match[] = {
668 { .compatible = "rockchip,mbox-scpi"},
671 MODULE_DEVICE_TABLE(of, mobx_scpi_of_match);
673 static int mobx_scpi_probe(struct platform_device *pdev)
678 int check_version = 0; /*0: not check version, 1: check version*/
681 the_scpi_device = &pdev->dev;
683 while ((retry--) && (check_version != 0)) {
684 ret = scpi_get_version(SCPI_VERSION, &ver);
685 if ((ret == 0) && (ver == SCPI_VERSION))
689 if ((retry <= 0) && (check_version != 0)) {
690 dev_err(&pdev->dev, "Failed to get scpi version\n");
695 /* try to get mboxes chan nums from DT */
696 if (of_property_read_u32((&pdev->dev)->of_node, "chan-nums", &val)) {
697 dev_err(&pdev->dev, "parse mboxes chan-nums failed\n");
705 "Scpi initialize, version: 0x%x, chan nums: %d\n", ver, val);
708 the_scpi_device = NULL;
712 static struct platform_driver mbox_scpi_driver = {
713 .probe = mobx_scpi_probe,
716 .of_match_table = of_match_ptr(mobx_scpi_of_match),
720 static int __init rockchip_mbox_scpi_init(void)
722 return platform_driver_register(&mbox_scpi_driver);
724 subsys_initcall(rockchip_mbox_scpi_init);