ARM64: DTS: Add rk3399-firefly uart4 device, node as /dev/ttyS1
[firefly-linux-kernel-4.4.55.git] / drivers / mailbox / scpi_protocol.c
1 /*
2  * System Control and Power Interface (SCPI) Message Protocol driver
3  *
4  * Copyright (C) 2014 ARM Ltd.
5  * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms and conditions of the GNU General Public License,
9  * version 2, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program. If not, see <http://www.gnu.org/licenses/>.
18  */
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/err.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/printk.h>
26 #include <linux/mailbox_client.h>
27 #include <linux/slab.h>
28 #include <soc/rockchip/scpi.h>
29 #include <soc/rockchip/rk3368-mailbox.h>
30
31 #define SCPI_VERSION            0x01000002      /* version: 1.0.0.2 */
32
33 #define CMD_ID_SHIFT            0
34 #define CMD_ID_MASK             0xff
35 #define CMD_SENDER_ID_SHIFT     8
36 #define CMD_SENDER_ID_MASK      0xff
37 #define CMD_DATA_SIZE_SHIFT     20
38 #define CMD_DATA_SIZE_MASK      0x1ff
39 #define PACK_SCPI_CMD(cmd, sender, txsz)                                \
40         ((((cmd) & CMD_ID_MASK) << CMD_ID_SHIFT) |                      \
41         (((sender) & CMD_SENDER_ID_MASK) << CMD_SENDER_ID_SHIFT) |      \
42         (((txsz) & CMD_DATA_SIZE_MASK) << CMD_DATA_SIZE_SHIFT))
43 #define SCPI_CMD_DEFAULT_TIMEOUT_MS  1000
44
45 #define MAX_DVFS_DOMAINS        3
46 #define MAX_DVFS_OPPS           8
47 #define DVFS_LATENCY(hdr)       ((hdr) >> 16)
48 #define DVFS_OPP_COUNT(hdr)     (((hdr) >> 8) & 0xff)
49
50 static int max_chan_num = 0;
51 static DECLARE_BITMAP(bm_mbox_chans, 4);
52 static DEFINE_MUTEX(scpi_mtx);
53
54 enum scpi_error_codes {
55         SCPI_SUCCESS = 0, /* Success */
56         SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */
57         SCPI_ERR_ALIGN = 2, /* Invalid alignment */
58         SCPI_ERR_SIZE = 3, /* Invalid size */
59         SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */
60         SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */
61         SCPI_ERR_RANGE = 6, /* Value out of range */
62         SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */
63         SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */
64         SCPI_ERR_PWRSTATE = 9, /* Invalid power state */
65         SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */
66         SCPI_ERR_DEVICE = 11, /* Device error */
67         SCPI_ERR_MAX
68 };
69
70 enum scpi_client_id {
71         SCPI_CL_NONE,
72         SCPI_CL_CLOCKS,
73         SCPI_CL_DVFS,
74         SCPI_CL_POWER,
75         SCPI_CL_THERMAL,
76         SCPI_CL_DDR,
77         SCPI_CL_SYS,
78         SCPI_MAX,
79 };
80
81 enum scpi_ddr_cmd {
82         SCPI_DDR_INIT,
83         SCPI_DDR_SET_FREQ,
84         SCPI_DDR_ROUND_RATE,
85         SCPI_DDR_AUTO_SELF_REFRESH,
86         SCPI_DDR_BANDWIDTH_GET,
87         SCPI_DDR_GET_FREQ,
88         SCPI_DDR_SEND_TIMING,
89         SCPI_DDR_DCLK_MODE,
90 };
91
92 enum scpi_sys_cmd {
93         SCPI_SYS_GET_VERSION,
94         SCPI_SYS_REFRESH_MCU_FREQ,
95         SCPI_SYS_SET_MCU_STATE_SUSPEND,
96         SCPI_SYS_SET_MCU_STATE_RESUME,
97         SCPI_SYS_SET_JTAGMUX_ON_OFF,
98 };
99
100 enum scpi_std_cmd {
101         SCPI_CMD_INVALID                = 0x00,
102         SCPI_CMD_SCPI_READY             = 0x01,
103         SCPI_CMD_SCPI_CAPABILITIES      = 0x02,
104         SCPI_CMD_EVENT                  = 0x03,
105         SCPI_CMD_SET_CSS_PWR_STATE      = 0x04,
106         SCPI_CMD_GET_CSS_PWR_STATE      = 0x05,
107         SCPI_CMD_CFG_PWR_STATE_STAT     = 0x06,
108         SCPI_CMD_GET_PWR_STATE_STAT     = 0x07,
109         SCPI_CMD_SYS_PWR_STATE          = 0x08,
110         SCPI_CMD_L2_READY               = 0x09,
111         SCPI_CMD_SET_AP_TIMER           = 0x0a,
112         SCPI_CMD_CANCEL_AP_TIME         = 0x0b,
113         SCPI_CMD_DVFS_CAPABILITIES      = 0x0c,
114         SCPI_CMD_GET_DVFS_INFO          = 0x0d,
115         SCPI_CMD_SET_DVFS               = 0x0e,
116         SCPI_CMD_GET_DVFS               = 0x0f,
117         SCPI_CMD_GET_DVFS_STAT          = 0x10,
118         SCPI_CMD_SET_RTC                = 0x11,
119         SCPI_CMD_GET_RTC                = 0x12,
120         SCPI_CMD_CLOCK_CAPABILITIES     = 0x13,
121         SCPI_CMD_SET_CLOCK_INDEX        = 0x14,
122         SCPI_CMD_SET_CLOCK_VALUE        = 0x15,
123         SCPI_CMD_GET_CLOCK_VALUE        = 0x16,
124         SCPI_CMD_PSU_CAPABILITIES       = 0x17,
125         SCPI_CMD_SET_PSU                = 0x18,
126         SCPI_CMD_GET_PSU                = 0x19,
127         SCPI_CMD_SENSOR_CAPABILITIES    = 0x1a,
128         SCPI_CMD_SENSOR_INFO            = 0x1b,
129         SCPI_CMD_SENSOR_VALUE           = 0x1c,
130         SCPI_CMD_SENSOR_CFG_PERIODIC    = 0x1d,
131         SCPI_CMD_SENSOR_CFG_BOUNDS      = 0x1e,
132         SCPI_CMD_SENSOR_ASYNC_VALUE     = 0x1f,
133         SCPI_CMD_COUNT
134 };
135
136 enum scpi_thermal_cmd {
137         SCPI_THERMAL_GET_TSADC_DATA,
138         SCPI_THERMAL_SET_TSADC_CYCLE,
139         SCPI_THERMAL_COUNT
140 };
141
142 static int high_priority_cmds[] = {
143         SCPI_CMD_GET_CSS_PWR_STATE,
144         SCPI_CMD_CFG_PWR_STATE_STAT,
145         SCPI_CMD_GET_PWR_STATE_STAT,
146         SCPI_CMD_SET_DVFS,
147         SCPI_CMD_GET_DVFS,
148         SCPI_CMD_SET_RTC,
149         SCPI_CMD_GET_RTC,
150         SCPI_CMD_SET_CLOCK_INDEX,
151         SCPI_CMD_SET_CLOCK_VALUE,
152         SCPI_CMD_GET_CLOCK_VALUE,
153         SCPI_CMD_SET_PSU,
154         SCPI_CMD_GET_PSU,
155         SCPI_CMD_SENSOR_CFG_PERIODIC,
156         SCPI_CMD_SENSOR_CFG_BOUNDS,
157 };
158
159 struct scpi_data_buf {
160         int client_id;
161         struct rk3368_mbox_msg *data;
162         struct completion complete;
163         int timeout_ms;
164 };
165
166 struct scpi_mcu_ver {
167         u32  scpi_ver;
168         char mcu_ver[16];
169 };
170
171 static struct scpi_opp *scpi_opps[MAX_DVFS_DOMAINS];
172
173 static struct device *the_scpi_device;
174
175 static int scpi_linux_errmap[SCPI_ERR_MAX] = {
176         0, -EINVAL, -ENOEXEC, -EMSGSIZE,
177         -EINVAL, -EACCES, -ERANGE, -ETIMEDOUT,
178         -ENOMEM, -EINVAL, -EOPNOTSUPP, -EIO,
179 };
180
181 static inline int scpi_to_linux_errno(int errno)
182 {
183         if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX)
184                 return scpi_linux_errmap[errno];
185         return -EIO;
186 }
187
188 static bool __maybe_unused high_priority_chan_supported(int cmd)
189 {
190         int idx;
191
192         for (idx = 0; idx < ARRAY_SIZE(high_priority_cmds); idx++)
193                 if (cmd == high_priority_cmds[idx])
194                         return true;
195         return false;
196 }
197
198 static int scpi_alloc_mbox_chan(void)
199 {
200         int index;
201
202         mutex_lock(&scpi_mtx);
203
204         index = find_first_zero_bit(bm_mbox_chans, max_chan_num);
205         if (index >= max_chan_num) {
206                 pr_err("alloc mailbox channel failed\n");
207                 mutex_unlock(&scpi_mtx);
208                 return -EBUSY;
209         }
210
211         set_bit(index, bm_mbox_chans);
212
213         mutex_unlock(&scpi_mtx);
214         return index;
215 }
216
217 static void scpi_free_mbox_chan(int chan)
218 {
219         int index = chan;
220
221         mutex_lock(&scpi_mtx);
222
223         if (index < max_chan_num && index >= 0)
224                 clear_bit(index, bm_mbox_chans);
225
226         mutex_unlock(&scpi_mtx);
227 }
228
229 static void scpi_rx_callback(struct mbox_client *cl, void *msg)
230 {
231         struct rk3368_mbox_msg *data = (struct rk3368_mbox_msg *)msg;
232         struct scpi_data_buf *scpi_buf = data->cl_data;
233
234         complete(&scpi_buf->complete);
235 }
236
237 static int send_scpi_cmd(struct scpi_data_buf *scpi_buf, int index)
238 {
239         struct mbox_chan *chan;
240         struct mbox_client cl;
241         struct rk3368_mbox_msg *data = scpi_buf->data;
242         u32 status;
243         int ret;
244         int timeout = msecs_to_jiffies(scpi_buf->timeout_ms);
245
246         if (!the_scpi_device) {
247                 pr_err("Scpi initializes unsuccessfully\n");
248                 return -EIO;
249         }
250
251         cl.dev = the_scpi_device;
252         cl.rx_callback = scpi_rx_callback;
253         cl.tx_done = NULL;
254         cl.tx_prepare = NULL;
255         cl.tx_block = false;
256         cl.knows_txdone = false;
257
258         chan = mbox_request_channel(&cl, index);
259         if (IS_ERR(chan)) {
260                 scpi_free_mbox_chan(index);
261                 return PTR_ERR(chan);
262         }
263
264         init_completion(&scpi_buf->complete);
265         if (mbox_send_message(chan, (void *)data) < 0) {
266                 status = SCPI_ERR_TIMEOUT;
267                 goto free_channel;
268         }
269
270         ret = wait_for_completion_timeout(&scpi_buf->complete, timeout);
271         if (ret == 0) {
272                 status = SCPI_ERR_TIMEOUT;
273                 goto free_channel;
274         }
275         status = *(u32 *)(data->rx_buf); /* read first word */
276
277 free_channel:
278         mbox_free_channel(chan);
279         scpi_free_mbox_chan(index);
280
281         return scpi_to_linux_errno(status);
282 }
283
284 #define SCPI_SETUP_DBUF(scpi_buf, mbox_buf, _client_id,\
285                         _cmd, _tx_buf, _rx_buf) \
286 do {                                            \
287         struct rk3368_mbox_msg *pdata = &mbox_buf;      \
288         pdata->cmd = _cmd;                      \
289         pdata->tx_buf = &_tx_buf;               \
290         pdata->tx_size = sizeof(_tx_buf);       \
291         pdata->rx_buf = &_rx_buf;               \
292         pdata->rx_size = sizeof(_rx_buf);       \
293         scpi_buf.client_id = _client_id;        \
294         scpi_buf.data = pdata;                  \
295         scpi_buf.timeout_ms = SCPI_CMD_DEFAULT_TIMEOUT_MS; \
296 } while (0)
297
298 #define SCPI_SETUP_DBUF_BY_SIZE(scpi_buf, mbox_buf, _client_id,         \
299                                 _cmd, _tx_buf, _tx_size, _rx_buf)       \
300 do {                                                                    \
301         struct rk3368_mbox_msg *pdata = &mbox_buf;                      \
302         pdata->cmd = _cmd;                                              \
303         pdata->tx_buf = _tx_buf;                                        \
304         pdata->tx_size = _tx_size;                                      \
305         pdata->rx_buf = &_rx_buf;                                       \
306         pdata->rx_size = sizeof(_rx_buf);                               \
307         scpi_buf.client_id = _client_id;                                \
308         scpi_buf.data = pdata;                                          \
309         scpi_buf.timeout_ms = SCPI_CMD_DEFAULT_TIMEOUT_MS;              \
310 } while (0)
311
312 static int scpi_execute_cmd(struct scpi_data_buf *scpi_buf)
313 {
314         struct rk3368_mbox_msg *data;
315         int index;
316
317         if (!scpi_buf || !scpi_buf->data)
318                 return -EINVAL;
319
320         index = scpi_alloc_mbox_chan();
321         if (index < 0)
322                 return -EBUSY;
323
324         data = scpi_buf->data;
325         data->cmd = PACK_SCPI_CMD(data->cmd, scpi_buf->client_id,
326                                   data->tx_size);
327         data->cl_data = scpi_buf;
328
329         return send_scpi_cmd(scpi_buf, index);
330 }
331
332 unsigned long scpi_clk_get_val(u16 clk_id)
333 {
334         struct scpi_data_buf sdata;
335         struct rk3368_mbox_msg mdata;
336         struct __packed {
337                 u32 status;
338                 u32 clk_rate;
339         } buf;
340
341         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
342                         SCPI_CMD_GET_CLOCK_VALUE, clk_id, buf);
343         if (scpi_execute_cmd(&sdata))
344                 return 0;
345
346         return buf.clk_rate;
347 }
348 EXPORT_SYMBOL_GPL(scpi_clk_get_val);
349
350 int scpi_clk_set_val(u16 clk_id, unsigned long rate)
351 {
352         struct scpi_data_buf sdata;
353         struct rk3368_mbox_msg mdata;
354         int stat;
355         struct __packed {
356                 u32 clk_rate;
357                 u16 clk_id;
358         } buf;
359
360         buf.clk_rate = (u32)rate;
361         buf.clk_id = clk_id;
362
363         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
364                         SCPI_CMD_SET_CLOCK_VALUE, buf, stat);
365         return scpi_execute_cmd(&sdata);
366 }
367 EXPORT_SYMBOL_GPL(scpi_clk_set_val);
368
369 struct scpi_opp *scpi_dvfs_get_opps(u8 domain)
370 {
371         struct scpi_data_buf sdata;
372         struct rk3368_mbox_msg mdata;
373         struct __packed {
374                 u32 status;
375                 u32 header;
376                 struct scpi_opp_entry opp[MAX_DVFS_OPPS];
377         } buf;
378         struct scpi_opp *opps;
379         size_t opps_sz;
380         int count, ret;
381
382         if (domain >= MAX_DVFS_DOMAINS)
383                 return ERR_PTR(-EINVAL);
384
385         if (scpi_opps[domain])  /* data already populated */
386                 return scpi_opps[domain];
387
388         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
389                         SCPI_CMD_GET_DVFS_INFO, domain, buf);
390         ret = scpi_execute_cmd(&sdata);
391         if (ret)
392                 return ERR_PTR(ret);
393
394         opps = kmalloc(sizeof(*opps), GFP_KERNEL);
395         if (!opps)
396                 return ERR_PTR(-ENOMEM);
397
398         count = DVFS_OPP_COUNT(buf.header);
399         opps_sz = count * sizeof(*(opps->opp));
400
401         opps->count = count;
402         opps->latency = DVFS_LATENCY(buf.header);
403         opps->opp = kmalloc(opps_sz, GFP_KERNEL);
404         if (!opps->opp) {
405                 kfree(opps);
406                 return ERR_PTR(-ENOMEM);
407         }
408
409         memcpy(opps->opp, &buf.opp[0], opps_sz);
410         scpi_opps[domain] = opps;
411
412         return opps;
413 }
414 EXPORT_SYMBOL_GPL(scpi_dvfs_get_opps);
415
416 int scpi_dvfs_get_idx(u8 domain)
417 {
418         struct scpi_data_buf sdata;
419         struct rk3368_mbox_msg mdata;
420         struct __packed {
421                 u32 status;
422                 u8 dvfs_idx;
423         } buf;
424         int ret;
425
426         if (domain >= MAX_DVFS_DOMAINS)
427                 return -EINVAL;
428
429         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
430                         SCPI_CMD_GET_DVFS, domain, buf);
431         ret = scpi_execute_cmd(&sdata);
432
433         if (!ret)
434                 ret = buf.dvfs_idx;
435         return ret;
436 }
437 EXPORT_SYMBOL_GPL(scpi_dvfs_get_idx);
438
439 int scpi_dvfs_set_idx(u8 domain, u8 idx)
440 {
441         struct scpi_data_buf sdata;
442         struct rk3368_mbox_msg mdata;
443         struct __packed {
444                 u8 dvfs_domain;
445                 u8 dvfs_idx;
446         } buf;
447         int stat;
448
449         buf.dvfs_idx = idx;
450         buf.dvfs_domain = domain;
451
452         if (domain >= MAX_DVFS_DOMAINS)
453                 return -EINVAL;
454
455         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
456                         SCPI_CMD_SET_DVFS, buf, stat);
457         return scpi_execute_cmd(&sdata);
458 }
459 EXPORT_SYMBOL_GPL(scpi_dvfs_set_idx);
460
461 int scpi_get_sensor(char *name)
462 {
463         struct scpi_data_buf sdata;
464         struct rk3368_mbox_msg mdata;
465         struct __packed {
466                 u32 status;
467                 u16 sensors;
468         } cap_buf;
469         struct __packed {
470                 u32 status;
471                 u16 sensor;
472                 u8 class;
473                 u8 trigger;
474                 char name[20];
475         } info_buf;
476         int ret;
477         u16 sensor_id;
478
479         /* This should be handled by a generic macro */
480         do {
481                 struct rk3368_mbox_msg *pdata = &mdata;
482
483                 pdata->cmd = SCPI_CMD_SENSOR_CAPABILITIES;
484                 pdata->tx_size = 0;
485                 pdata->rx_buf = &cap_buf;
486                 pdata->rx_size = sizeof(cap_buf);
487                 sdata.client_id = SCPI_CL_THERMAL;
488                 sdata.data = pdata;
489         } while (0);
490
491         ret = scpi_execute_cmd(&sdata);
492         if (ret)
493                 goto out;
494
495         ret = -ENODEV;
496         for (sensor_id = 0; sensor_id < cap_buf.sensors; sensor_id++) {
497                 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
498                                 SCPI_CMD_SENSOR_INFO, sensor_id, info_buf);
499                 ret = scpi_execute_cmd(&sdata);
500                 if (ret)
501                         break;
502
503                 if (!strcmp(name, info_buf.name)) {
504                         ret = sensor_id;
505                         break;
506                 }
507         }
508 out:
509         return ret;
510 }
511 EXPORT_SYMBOL_GPL(scpi_get_sensor);
512
513 int scpi_get_sensor_value(u16 sensor, u32 *val)
514 {
515         struct scpi_data_buf sdata;
516         struct rk3368_mbox_msg mdata;
517         struct __packed {
518                 u32 status;
519                 u32 val;
520         } buf;
521         int ret;
522
523         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL, SCPI_CMD_SENSOR_VALUE,
524                         sensor, buf);
525
526         ret = scpi_execute_cmd(&sdata);
527         if (ret)
528                 *val = buf.val;
529
530         return ret;
531 }
532 EXPORT_SYMBOL_GPL(scpi_get_sensor_value);
533
534 static int scpi_get_version(u32 old, struct scpi_mcu_ver *ver)
535 {
536         int ret;
537         struct scpi_data_buf sdata;
538         struct rk3368_mbox_msg mdata;
539         struct __packed {
540                 u32 status;
541                 struct scpi_mcu_ver version;
542         } buf;
543
544         memset(&buf, 0, sizeof(buf));
545         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS, SCPI_SYS_GET_VERSION,
546                         old, buf);
547
548         ret = scpi_execute_cmd(&sdata);
549         if (ret) {
550                 pr_err("get scpi version from MCU failed, ret=%d\n", ret);
551                 goto OUT;
552         }
553
554         memcpy(ver, &(buf.version), sizeof(*ver));
555
556 OUT:
557         return ret;
558 }
559
560 int scpi_sys_set_mcu_state_suspend(void)
561 {
562         struct scpi_data_buf sdata;
563         struct rk3368_mbox_msg mdata;
564         struct __packed1 {
565                 u32 status;
566         } tx_buf;
567         struct __packed2 {
568                 u32 status;
569         } rx_buf;
570
571         tx_buf.status = 0;
572         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
573                         SCPI_SYS_SET_MCU_STATE_SUSPEND, tx_buf, rx_buf);
574         return scpi_execute_cmd(&sdata);
575 }
576 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_suspend);
577
578 int scpi_sys_set_mcu_state_resume(void)
579 {
580         struct scpi_data_buf sdata;
581         struct rk3368_mbox_msg mdata;
582         struct __packed1 {
583                 u32 status;
584         } tx_buf;
585         struct __packed2 {
586                 u32 status;
587         } rx_buf;
588
589         tx_buf.status = 0;
590
591         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
592                         SCPI_SYS_SET_MCU_STATE_RESUME, tx_buf, rx_buf);
593         return scpi_execute_cmd(&sdata);
594 }
595 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_resume);
596
597 int scpi_sys_set_jtagmux_on_off(u32 en)
598 {
599         int ret;
600         struct scpi_data_buf sdata;
601         struct rk3368_mbox_msg mdata;
602         struct __packed1 {
603                 u32 enable;
604         } tx_buf;
605
606         struct __packed2 {
607                 u32 status;
608         } rx_buf;
609
610         tx_buf.enable = en;
611         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
612                         SCPI_SYS_SET_JTAGMUX_ON_OFF, tx_buf, rx_buf);
613
614         ret = scpi_execute_cmd(&sdata);
615         if (ret)
616                 pr_err("set jtagmux on-off failed, ret=%d\n", ret);
617         else
618                 ret = rx_buf.status;
619
620         return ret;
621 }
622 EXPORT_SYMBOL_GPL(scpi_sys_set_jtagmux_on_off);
623
624 int scpi_ddr_dclk_mode(u32 dclk_mode)
625 {
626         struct scpi_data_buf sdata;
627         struct rk3368_mbox_msg mdata;
628         struct __packed1 {
629                 u32 dclk_mode;
630         } tx_buf;
631         struct __packed2 {
632                 u32 status;
633         } rx_buf;
634
635         tx_buf.dclk_mode = (u32)dclk_mode;
636         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
637                         SCPI_DDR_DCLK_MODE, tx_buf, rx_buf);
638         return scpi_execute_cmd(&sdata);
639 }
640 EXPORT_SYMBOL_GPL(scpi_ddr_dclk_mode);
641
642 int scpi_ddr_init(u32 dram_speed_bin, u32 freq, u32 lcdc_type, u32 addr_mcu_el3)
643 {
644         struct scpi_data_buf sdata;
645         struct rk3368_mbox_msg mdata;
646         struct __packed1 {
647                 u32 dram_speed_bin;
648                 u32 freq;
649                 u32 lcdc_type;
650                 u32 addr_mcu_el3;
651         } tx_buf;
652         struct __packed2 {
653                 u32 status;
654         } rx_buf;
655
656         tx_buf.dram_speed_bin = (u32)dram_speed_bin;
657         tx_buf.freq = (u32)freq;
658         tx_buf.lcdc_type = (u32)lcdc_type;
659         tx_buf.addr_mcu_el3 = addr_mcu_el3;
660         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
661                         SCPI_DDR_INIT, tx_buf, rx_buf);
662         return scpi_execute_cmd(&sdata);
663 }
664 EXPORT_SYMBOL_GPL(scpi_ddr_init);
665
666 int scpi_ddr_set_clk_rate(u32 rate, u32 lcdc_type)
667 {
668         int ret;
669
670         struct scpi_data_buf sdata;
671         struct rk3368_mbox_msg mdata;
672         struct __packed1 {
673                 u32 clk_rate;
674                 u32 lcdc_type;
675         } tx_buf;
676         struct __packed2 {
677                 u32 status;
678                 u32 freq;
679         } rx_buf;
680
681         tx_buf.clk_rate = (u32)rate;
682         tx_buf.lcdc_type = (u32)lcdc_type;
683         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
684                         SCPI_DDR_SET_FREQ, tx_buf, rx_buf);
685         ret = scpi_execute_cmd(&sdata);
686
687         if ((!ret) && (!rx_buf.status))
688                 ret = rx_buf.freq;
689         else
690                 ret = 0;
691
692         return ret;
693 }
694 EXPORT_SYMBOL_GPL(scpi_ddr_set_clk_rate);
695
696 int scpi_ddr_send_timing(u32 *p, u32 size)
697 {
698         struct scpi_data_buf sdata;
699         struct rk3368_mbox_msg mdata;
700         struct __packed2 {
701                 u32 status;
702         } rx_buf;
703         SCPI_SETUP_DBUF_BY_SIZE(sdata, mdata, SCPI_CL_DDR,
704                                 SCPI_DDR_SEND_TIMING, p, size, rx_buf);
705         return scpi_execute_cmd(&sdata);
706 }
707 EXPORT_SYMBOL_GPL(scpi_ddr_send_timing);
708
709 int scpi_ddr_round_rate(u32 m_hz)
710 {
711         struct scpi_data_buf sdata;
712         struct rk3368_mbox_msg mdata;
713         struct __packed1 {
714                 u32 clk_rate;
715         } tx_buf;
716         struct __packed2 {
717                 u32 status;
718                 u32 round_rate;
719         } rx_buf;
720
721         tx_buf.clk_rate = (u32)m_hz;
722
723         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
724                         SCPI_DDR_ROUND_RATE, tx_buf, rx_buf);
725         if (scpi_execute_cmd(&sdata))
726                 return 0;
727
728         return rx_buf.round_rate;
729 }
730 EXPORT_SYMBOL_GPL(scpi_ddr_round_rate);
731
732 int scpi_ddr_set_auto_self_refresh(u32 en)
733 {
734         struct scpi_data_buf sdata;
735         struct rk3368_mbox_msg mdata;
736         struct __packed1 {
737                 u32 enable;
738         } tx_buf;
739         struct __packed2 {
740                 u32 status;
741         } rx_buf;
742
743         tx_buf.enable = (u32)en;
744
745         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
746                         SCPI_DDR_AUTO_SELF_REFRESH, tx_buf, rx_buf);
747         return scpi_execute_cmd(&sdata);
748 }
749 EXPORT_SYMBOL_GPL(scpi_ddr_set_auto_self_refresh);
750
751 int scpi_ddr_bandwidth_get(struct ddr_bw_info *ddr_bw_ch0,
752                            struct ddr_bw_info *ddr_bw_ch1)
753 {
754         struct scpi_data_buf sdata;
755         struct rk3368_mbox_msg mdata;
756         struct __packed1 {
757                 u32 status;
758         } tx_buf;
759         struct __packed2 {
760                 u32 status;
761                 struct ddr_bw_info ddr_bw_ch0;
762                 struct ddr_bw_info ddr_bw_ch1;
763         } rx_buf;
764
765         tx_buf.status = 0;
766
767         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
768                         SCPI_DDR_BANDWIDTH_GET, tx_buf, rx_buf);
769         if (scpi_execute_cmd(&sdata))
770                 return 0;
771
772         memcpy(ddr_bw_ch0, &(rx_buf.ddr_bw_ch0), sizeof(rx_buf.ddr_bw_ch0));
773         memcpy(ddr_bw_ch1, &(rx_buf.ddr_bw_ch1), sizeof(rx_buf.ddr_bw_ch1));
774
775         return 0;
776 }
777 EXPORT_SYMBOL_GPL(scpi_ddr_bandwidth_get);
778
779 int scpi_ddr_get_clk_rate(void)
780 {
781         struct scpi_data_buf sdata;
782         struct rk3368_mbox_msg mdata;
783         struct __packed1 {
784                 u32 status;
785         } tx_buf;
786         struct __packed2 {
787                 u32 status;
788                 u32 clk_rate;
789         } rx_buf;
790
791         tx_buf.status = 0;
792         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
793                         SCPI_DDR_GET_FREQ, tx_buf, rx_buf);
794         if (scpi_execute_cmd(&sdata))
795                 return 0;
796
797         return rx_buf.clk_rate;
798 }
799 EXPORT_SYMBOL_GPL(scpi_ddr_get_clk_rate);
800
801 int scpi_thermal_get_temperature(void)
802 {
803         int ret;
804         struct scpi_data_buf sdata;
805         struct rk3368_mbox_msg mdata;
806         struct __packed1 {
807                 u32 status;
808         } tx_buf;
809
810         struct __packed2 {
811                 u32 status;
812                 u32 tsadc_data;
813         } rx_buf;
814
815         tx_buf.status = 0;
816         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
817                         SCPI_THERMAL_GET_TSADC_DATA, tx_buf, rx_buf);
818
819         ret = scpi_execute_cmd(&sdata);
820         if (ret) {
821                 pr_err("get temperature from MCU failed, ret=%d\n", ret);
822                 return ret;
823         }
824
825         return rx_buf.tsadc_data;
826 }
827 EXPORT_SYMBOL_GPL(scpi_thermal_get_temperature);
828
829 int scpi_thermal_set_clk_cycle(u32 cycle)
830 {
831         struct scpi_data_buf sdata;
832         struct rk3368_mbox_msg mdata;
833         struct __packed1 {
834                 u32 clk_cycle;
835         } tx_buf;
836
837         struct __packed2 {
838                 u32 status;
839         } rx_buf;
840
841         tx_buf.clk_cycle = cycle;
842         SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
843                         SCPI_THERMAL_SET_TSADC_CYCLE, tx_buf, rx_buf);
844
845         return scpi_execute_cmd(&sdata);
846 }
847 EXPORT_SYMBOL_GPL(scpi_thermal_set_clk_cycle);
848
849 static struct of_device_id mobx_scpi_of_match[] = {
850         { .compatible = "rockchip,rk3368-scpi-legacy"},
851         { },
852 };
853 MODULE_DEVICE_TABLE(of, mobx_scpi_of_match);
854
855 static int mobx_scpi_probe(struct platform_device *pdev)
856 {
857         int ret = 0;
858         int retry = 3;
859         int val = 0;
860         struct scpi_mcu_ver mcu_ver;
861         int check_version = 1; /*0: not check version, 1: check version*/
862
863         the_scpi_device = &pdev->dev;
864
865         /* try to get mboxes chan nums from DT */
866         if (of_property_read_u32((&pdev->dev)->of_node, "chan-nums", &val)) {
867                 dev_err(&pdev->dev, "parse mboxes chan-nums failed\n");
868                 ret = -EINVAL;
869                 goto exit;
870         }
871
872         max_chan_num = val;
873
874         /* try to check up with SCPI version from MCU */
875         while ((retry--) && (check_version != 0)) {
876                 memset(&mcu_ver, 0, sizeof(mcu_ver));
877
878                 ret = scpi_get_version(SCPI_VERSION, &mcu_ver);
879                 if ((ret == 0) && (mcu_ver.scpi_ver == SCPI_VERSION))
880                         break;
881         }
882
883         if ((retry <= 0) && (check_version != 0)) {
884                 dev_err(&pdev->dev,
885                         "Scpi verison not match:kernel ver:0x%x, MCU ver:0x%x, ret=%d\n",
886                         SCPI_VERSION, mcu_ver.scpi_ver, ret);
887                 ret = -EIO;
888                 goto exit;
889         }
890
891         dev_info(&pdev->dev, "Scpi initialize, version: 0x%x, chan nums: %d\n",
892                  SCPI_VERSION, val);
893
894         if (check_version)
895                 dev_info(&pdev->dev, "MCU version: %s\n", mcu_ver.mcu_ver);
896
897         return 0;
898 exit:
899         the_scpi_device = NULL;
900         return ret;
901 }
902
903 static struct platform_driver mbox_scpi_driver = {
904         .probe  = mobx_scpi_probe,
905         .driver = {
906                 .name = "mbox-scpi",
907                 .of_match_table = of_match_ptr(mobx_scpi_of_match),
908         },
909 };
910
911 static int __init rockchip_mbox_scpi_init(void)
912 {
913         return platform_driver_register(&mbox_scpi_driver);
914 }
915 subsys_initcall(rockchip_mbox_scpi_init);