2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
50 model = "Rockchip RK3399 VR Board";
51 compatible = "rockchip,vr", "rockchip,rk3399";
54 compatible = "pwm-regulator";
55 pwms = <&pwm2 0 25000 0>;
57 rockchip,pwm_voltage = <900000>;
58 regulator-name = "vdd_log";
59 regulator-min-microvolt = <800000>;
60 regulator-max-microvolt = <1400000>;
65 compatible = "regulator-fixed";
66 regulator-name = "vcc_sys";
69 regulator-min-microvolt = <4000000>;
70 regulator-max-microvolt = <4000000>;
72 vcc3v3_sys: vcc3v3-sys {
73 compatible = "regulator-fixed";
74 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 vcc5v0_host: vcc5v0-host-regulator {
82 compatible = "regulator-fixed";
84 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&host_vbus_drv>;
87 regulator-name = "vcc5v0_host";
90 backlight: backlight {
91 compatible = "pwm-backlight";
92 pwms = <&pwm0 0 25000 0>;
96 16 17 18 19 20 21 22 23
97 24 25 26 27 28 29 30 31
98 32 33 34 35 36 37 38 39
99 40 41 42 43 44 45 46 47
100 48 49 50 51 52 53 54 55
101 56 57 58 59 60 61 62 63
102 64 65 66 67 68 69 70 71
103 72 73 74 75 76 77 78 79
104 80 81 82 83 84 85 86 87
105 88 89 90 91 92 93 94 95
106 96 97 98 99 100 101 102 103
107 104 105 106 107 108 109 110 111
108 112 113 114 115 116 117 118 119
109 120 121 122 123 124 125 126 127
110 128 129 130 131 132 133 134 135
111 136 137 138 139 140 141 142 143
112 144 145 146 147 148 149 150 151
113 152 153 154 155 156 157 158 159
114 160 161 162 163 164 165 166 167
115 168 169 170 171 172 173 174 175
116 176 177 178 179 180 181 182 183
117 184 185 186 187 188 189 190 191
118 192 193 194 195 196 197 198 199
119 200 201 202 203 204 205 206 207
120 208 209 210 211 212 213 214 215
121 216 217 218 219 220 221 222 223
122 224 225 226 227 228 229 230 231
123 232 233 234 235 236 237 238 239
124 240 241 242 243 244 245 246 247
125 248 249 250 251 252 253 254 255>;
126 default-brightness-level = <100>;
129 vcc_phy: vcc-phy-regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "vcc_phy";
137 compatible = "rockchip,rk3399-io-voltage-domain";
138 rockchip,grf = <&grf>;
140 bt656-supply = <&vcc1v8_dvp>;
141 audio-supply = <&vcca1v8_codec>;
142 sdmmc-supply = <&vcc_sd>;
143 gpio1830-supply = <&vcc_3v0>;
147 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
148 rockchip,grf = <&pmugrf>;
150 pmu1830-supply = <&vcc_1v8>;
154 compatible = "simple-audio-card";
155 simple-audio-card,format = "i2s";
156 simple-audio-card,name = "rockchip,es8316-codec";
157 simple-audio-card,mclk-fs = <256>;
158 simple-audio-card,widgets =
159 "Microphone", "Mic Jack",
160 "Headphone", "Headphone Jack";
161 simple-audio-card,routing =
162 "Mic Jack", "MICBIAS1",
164 "Headphone Jack", "HPOL",
165 "Headphone Jack", "HPOR";
166 simple-audio-card,cpu {
169 simple-audio-card,codec {
170 sound-dai = <&es8316>;
175 compatible = "simple-audio-card";
176 simple-audio-card,name = "rockchip,spdif";
177 simple-audio-card,cpu {
178 sound-dai = <&spdif>;
180 simple-audio-card,codec {
181 sound-dai = <&spdif_out>;
185 spdif_out: spdif-out {
186 compatible = "linux,spdif-dit";
187 #sound-dai-cells = <0>;
190 sdio_pwrseq: sdio-pwrseq {
191 compatible = "mmc-pwrseq-simple";
193 clock-names = "ext_clock";
194 pinctrl-names = "default";
195 pinctrl-0 = <&wifi_enable_h>;
198 * On the module itself this is one of these (depending
199 * on the actual card populated):
200 * - SDIO_RESET_L_WL_REG_ON
201 * - PDN (power down when low)
203 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
207 compatible = "wlan-platdata";
208 rockchip,grf = <&grf>;
209 wifi_chip_type = "ap6330";
211 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
216 compatible = "bluetooth-platdata";
218 clock-names = "ext_clock";
219 //wifi-bt-power-toggle;
220 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
221 pinctrl-names = "default", "rts_gpio";
222 pinctrl-0 = <&uart0_rts>;
223 pinctrl-1 = <&uart0_gpios>;
224 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
225 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
226 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
227 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
232 compatible = "rockchip,uboot-charge";
233 rockchip,uboot-charge-on = <0>;
234 rockchip,android-charge-on = <1>;
237 rk_vr_key: rockchip-vr-key {
238 compatible = "rockchip,key";
241 io-channels = <&saradc 1>;
245 label = "volume down";
246 rockchip,adc_value = <170>;
252 rockchip,adc_value = <340>;
258 rockchip,adc_value = <420>;
264 rockchip,adc_value = <520>;
268 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
277 rockchip,adc_value = <620>;
283 rockchip,adc_value = <700>;
289 rockchip,adc_value = <780>;
294 compatible = "rockchip_headset";
295 headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&hp_det>;
298 io-channels = <&saradc 2>;
304 opp-hz = /bits/ 64 <408000000>;
305 opp-microvolt = <800000>;
306 clock-latency-ns = <40000>;
309 opp-hz = /bits/ 64 <600000000>;
310 opp-microvolt = <800000>;
313 opp-hz = /bits/ 64 <816000000>;
314 opp-microvolt = <800000>;
317 opp-hz = /bits/ 64 <1008000000>;
318 opp-microvolt = <850000>;
321 opp-hz = /bits/ 64 <1200000000>;
322 opp-microvolt = <925000>;
325 opp-hz = /bits/ 64 <1416000000>;
326 opp-microvolt = <1075000>;
329 opp-hz = /bits/ 64 <1512000000>;
330 opp-microvolt = <1100000>;
337 opp-hz = /bits/ 64 <408000000>;
338 opp-microvolt = <800000>;
339 clock-latency-ns = <40000>;
342 opp-hz = /bits/ 64 <600000000>;
343 opp-microvolt = <800000>;
346 opp-hz = /bits/ 64 <816000000>;
347 opp-microvolt = <825000>;
350 opp-hz = /bits/ 64 <1008000000>;
351 opp-microvolt = <850000>;
354 opp-hz = /bits/ 64 <1200000000>;
355 opp-microvolt = <900000>;
358 opp-hz = /bits/ 64 <1416000000>;
359 opp-microvolt = <1000000>;
362 opp-hz = /bits/ 64 <1608000000>;
363 opp-microvolt = <1050000>;
366 opp-hz = /bits/ 64 <1800000000>;
367 opp-microvolt = <1150000>;
370 opp-hz = /bits/ 64 <1992000000>;
371 opp-microvolt = <1225000>;
380 518 335 /* 1008MHz */
381 617 428 /* 1200MHz */
382 728 573 /* 1416MHz */
383 827 724 /* 1608MHz */
384 925 900 /* 1800MHz */
385 1024 1108 /* 1992MHz */
416 518 335 /* 1008MHz */
417 617 428 /* 1200MHz */
418 728 573 /* 1416MHz */
419 827 724 /* 1608MHz */
420 925 900 /* 1800MHz */
421 1024 1108 /* 1992MHz */
448 compatible = "operating-points-v2";
451 opp-hz = /bits/ 64 <200000000>;
452 opp-microvolt = <825000>;
456 opp-hz = /bits/ 64 <300000000>;
457 opp-microvolt = <850000>;
460 opp-hz = /bits/ 64 <400000000>;
461 opp-microvolt = <875000>;
464 opp-hz = /bits/ 64 <500000000>;
465 opp-microvolt = <950000>;
468 opp-hz = /bits/ 64 <600000000>;
469 opp-microvolt = <1025000>;
472 opp-hz = /bits/ 64 <800000000>;
473 opp-microvolt = <1125000>;
478 clock-frequency = <150000000>;
479 clock-freq-min-max = <400000 150000000>;
487 vqmmc-supply = <&vcc_sd>;
488 pinctrl-names = "default";
489 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
494 clock-frequency = <50000000>;
495 clock-freq-min-max = <200000 50000000>;
501 keep-power-in-suspend;
502 mmc-pwrseq = <&sdio_pwrseq>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
520 keep-power-in-suspend;
521 mmc-hs400-enhanced-strobe;
527 rockchip,i2s-broken-burst-len;
528 rockchip,playback-channels = <8>;
529 rockchip,capture-channels = <8>;
530 #sound-dai-cells = <0>;
534 #sound-dai-cells = <0>;
539 #sound-dai-cells = <0>;
544 i2c-scl-rising-time-ns = <219>;
545 i2c-scl-falling-time-ns = <15>;
546 clock-frequency = <400000>;
548 vdd_cpu_b: syr827@40 {
549 compatible = "silergy,syr827";
551 vin-supply = <&vcc_sys>;
552 regulator-compatible = "fan53555-reg";
553 pinctrl-0 = <&vsel1_gpio>;
554 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
555 regulator-name = "vdd_cpu_b";
556 regulator-min-microvolt = <712500>;
557 regulator-max-microvolt = <1500000>;
558 regulator-ramp-delay = <1000>;
559 fcs,suspend-voltage-selector = <1>;
561 regulator-initial-state = <3>;
562 regulator-state-mem {
563 regulator-off-in-suspend;
568 compatible = "silergy,syr828";
570 vin-supply = <&vcc_sys>;
571 regulator-compatible = "fan53555-reg";
572 pinctrl-0 = <&vsel2_gpio>;
573 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
574 regulator-name = "vdd_gpu";
575 regulator-min-microvolt = <712500>;
576 regulator-max-microvolt = <1500000>;
577 regulator-ramp-delay = <1000>;
578 fcs,suspend-voltage-selector = <1>;
580 regulator-initial-state = <3>;
581 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
582 regulator-state-mem {
583 regulator-off-in-suspend;
588 compatible = "rockchip,rk818";
591 clock-output-names = "xin32k", "wifibt_32kin";
592 interrupt-parent = <&gpio1>;
593 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pmic_int_l>;
596 rockchip,system-power-controller;
601 vcc1-supply = <&vcc_sys>;
602 vcc2-supply = <&vcc_sys>;
603 vcc3-supply = <&vcc_sys>;
604 vcc4-supply = <&vcc_sys>;
605 vcc6-supply = <&vcc_sys>;
606 vcc7-supply = <&vcc3v3_sys>;
607 vcc8-supply = <&vcc_sys>;
608 vcc9-supply = <&vcc3v3_sys>;
611 vdd_cpu_l: DCDC_REG1 {
612 regulator-name = "vdd_cpu_l";
615 regulator-min-microvolt = <750000>;
616 regulator-max-microvolt = <1350000>;
617 regulator-ramp-delay = <6001>;
618 regulator-state-mem {
619 regulator-off-in-suspend;
623 vdd_center: DCDC_REG2 {
624 regulator-name = "vdd_center";
627 regulator-min-microvolt = <800000>;
628 regulator-max-microvolt = <1350000>;
629 regulator-ramp-delay = <6001>;
630 regulator-state-mem {
631 regulator-off-in-suspend;
636 regulator-name = "vcc_ddr";
639 regulator-state-mem {
640 regulator-on-in-suspend;
645 regulator-name = "vcc_1v8";
648 regulator-min-microvolt = <1800000>;
649 regulator-max-microvolt = <1800000>;
650 regulator-state-mem {
651 regulator-on-in-suspend;
652 regulator-suspend-microvolt = <1800000>;
656 vcca3v0_codec: LDO_REG1 {
659 regulator-min-microvolt = <3000000>;
660 regulator-max-microvolt = <3000000>;
661 regulator-name = "vcca3v0_codec";
662 regulator-state-mem {
663 regulator-off-in-suspend;
667 vcc3v0_tp: LDO_REG2 {
670 regulator-min-microvolt = <3000000>;
671 regulator-max-microvolt = <3000000>;
672 regulator-name = "vcc3v0_tp";
673 regulator-state-mem {
674 regulator-off-in-suspend;
678 vcca1v8_codec: LDO_REG3 {
681 regulator-min-microvolt = <1800000>;
682 regulator-max-microvolt = <1800000>;
683 regulator-name = "vcca1v8_codec";
684 regulator-state-mem {
685 regulator-off-in-suspend;
689 vcc_power_on: LDO_REG4 {
692 regulator-min-microvolt = <3300000>;
693 regulator-max-microvolt = <3300000>;
694 regulator-name = "vcc_power_on";
695 regulator-state-mem {
696 regulator-on-in-suspend;
697 regulator-suspend-microvolt = <3300000>;
704 regulator-min-microvolt = <3000000>;
705 regulator-max-microvolt = <3000000>;
706 regulator-name = "vcc_3v0";
707 regulator-state-mem {
708 regulator-on-in-suspend;
709 regulator-suspend-microvolt = <3000000>;
716 regulator-min-microvolt = <1500000>;
717 regulator-max-microvolt = <1500000>;
718 regulator-name = "vcc_1v5";
719 regulator-state-mem {
720 regulator-on-in-suspend;
721 regulator-suspend-microvolt = <1500000>;
725 vcc1v8_dvp: LDO_REG7 {
728 regulator-min-microvolt = <1800000>;
729 regulator-max-microvolt = <1800000>;
730 regulator-name = "vcc1v8_dvp";
731 regulator-state-mem {
732 regulator-on-in-suspend;
733 regulator-suspend-microvolt = <1800000>;
737 vcc3v3_s3: LDO_REG8 {
740 regulator-min-microvolt = <3300000>;
741 regulator-max-microvolt = <3300000>;
742 regulator-name = "vcc3v3_s3";
743 regulator-state-mem {
744 regulator-on-in-suspend;
745 regulator-suspend-microvolt = <3300000>;
752 regulator-min-microvolt = <1800000>;
753 regulator-max-microvolt = <3300000>;
754 regulator-name = "vcc_sd";
755 regulator-state-mem {
756 regulator-on-in-suspend;
757 regulator-suspend-microvolt = <3300000>;
761 vcc3v3_s0: SWITCH_REG {
764 regulator-name = "vcc3v3_s0";
765 regulator-state-mem {
766 regulator-on-in-suspend;
772 compatible = "rk818-battery";
774 3400 3599 3671 3701 3728 3746 3762
775 3772 3781 3792 3816 3836 3866 3910
776 3942 3971 4002 4050 4088 4132 4183>;
777 design_capacity = <4000>;
778 design_qmax = <4100>;
780 max_input_current = <2000>;
781 max_chrg_current = <1800>;
782 max_chrg_voltage = <4200>;
783 sleep_enter_current = <300>;
784 sleep_exit_current = <300>;
785 power_off_thresd = <3400>;
786 zero_algorithm_vol = <3850>;
787 fb_temperature = <115>;
789 max_soc_offset = <60>;
800 i2c-scl-rising-time-ns = <164>;
801 i2c-scl-falling-time-ns = <15>;
804 #sound-dai-cells = <0>;
805 compatible = "everest,es8316";
807 clocks = <&cru SCLK_I2S_8CH_OUT>;
808 clock-names = "mclk";
809 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
815 i2c-scl-rising-time-ns = <345>;
816 i2c-scl-falling-time-ns = <11>;
817 clock-frequency = <400000>;
821 compatible = "ak8963";
822 pinctrl-names = "default";
823 pinctrl-0 = <&ak8963_irq_gpio>;
825 type = <SENSOR_TYPE_COMPASS>;
826 irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
828 poll_delay_ms = <30>;
833 compatible = "fairchild,fusb302";
835 pinctrl-names = "default";
836 pinctrl-0 = <&fusb0_int>;
837 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
846 compatible = "gslX680";
848 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
849 reset-gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
858 max-freq = <50000000>;
859 pinctrl-names = "default", "sleep";
860 pinctrl-1 = <&spi1_gpio>;
863 compatible = "inv-spi,mpu6500";
864 pinctrl-names = "default";
865 pinctrl-0 = <&mpu6500_irq_gpio>;
866 irq-gpio = <&gpio1 4 IRQ_TYPE_EDGE_RISING>;
868 spi-max-frequency = <1000000>;
871 mpu-int_config = <0x00>;
872 mpu-level_shifter = <0>;
873 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
877 support-hw-poweroff = <1>;
883 temperature = <70000>; /* millicelsius */
887 temperature = <85000>; /* millicelsius */
891 temperature = <100000>; /* millicelsius */
895 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
896 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
897 rockchip,hw-tshut-temp = <110000>;
909 u2phy0_otg: otg-port {
913 u2phy0_host: host-port {
914 phy-supply = <&vcc5v0_host>;
922 u2phy1_otg: otg-port {
926 u2phy1_host: host-port {
927 phy-supply = <&vcc5v0_host>;
933 pinctrl-names = "default";
934 pinctrl-0 = <&uart0_xfer &uart0_cts>;
989 rockchip,pwm_id= <3>;
990 rockchip,pwm_voltage = <900000>;
998 assigned-clocks = <&cru PLL_VPLL>;
999 assigned-clock-rates = <245000000>;
1000 #include <dt-bindings/display/screen-timing/lcd-ls055r1sx04-mipi.dtsi>
1004 rockchip,uboot-logo-on = <1>;
1005 rockchip,disp-mode = <NO_DUAL>;
1010 power_ctr: power_ctr {
1012 rockchip,power_type = <GPIO>;
1013 gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
1014 rockchip,delay = <10>;
1017 rockchip,power_type = <GPIO>;
1018 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
1019 rockchip,delay = <10>;
1037 cpu-supply = <&vdd_cpu_l>;
1041 cpu-supply = <&vdd_cpu_l>;
1045 cpu-supply = <&vdd_cpu_l>;
1049 cpu-supply = <&vdd_cpu_l>;
1053 cpu-supply = <&vdd_cpu_b>;
1057 cpu-supply = <&vdd_cpu_b>;
1062 mali-supply = <&vdd_gpu>;
1067 wifi_enable_h: wifi-enable-h {
1068 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1072 wireless-bluetooth {
1073 uart0_gpios: uart0-gpios {
1074 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1079 pmic_int_l: pmic-int-l {
1081 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1084 pmic_dvs2: pmic-dvs2 {
1086 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1089 vsel1_gpio: vsel1-gpio {
1091 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1094 vsel2_gpio: vsel2-gpio {
1096 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1101 mpu6500_irq_gpio: mpu6500-irq-gpio {
1102 rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_none>;
1107 host_vbus_drv: host-vbus-drv {
1109 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1114 ak8963_irq_gpio: ak8963-irq-gpio {
1115 rockchip,pins = <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
1120 spi1_gpio: spi1-gpio {
1122 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
1123 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
1124 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
1125 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
1130 fusb0_int: fusb0-int {
1131 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1137 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;