arch/arm64/boot/dts/rockchip/rk3399-box.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/pwm/pwm.h>
  43 #include <dt-bindings/input/input.h>
  44 #include "rk3399.dtsi"
  45 #include "rk3399-android.dtsi"
  46
  47 / {
  48         compatible = "rockchip,rk3399-box","rockchip,rk3399";
  49
  50         vcc1v8_s0: vcc1v8-s0 {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "vcc1v8_s0";
  53                 regulator-min-microvolt = <1800000>;
  54                 regulator-max-microvolt = <1800000>;
  55                 regulator-always-on;
  56         };
  57
  58         vcc_sys: vcc-sys {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vcc_sys";
  61                 regulator-min-microvolt = <5000000>;
  62                 regulator-max-microvolt = <5000000>;
  63                 regulator-always-on;
  64         };
  65
  66         vcc_phy: vcc-phy-regulator {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "vcc_phy";
  69                 regulator-always-on;
  70                 regulator-boot-on;
  71         };
  72
  73         vcc3v3_sys: vcc3v3-sys {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vcc3v3_sys";
  76                 regulator-min-microvolt = <3300000>;
  77                 regulator-max-microvolt = <3300000>;
  78                 regulator-always-on;
  79                 vin-supply = <&vcc_sys>;
  80         };
  81
  82         vcc5v0_host: vcc5v0-host-regulator {
  83                 compatible = "regulator-fixed";
  84                 enable-active-high;
  85                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&host_vbus_drv>;
  88                 regulator-name = "vcc5v0_host";
  89         };
  90
  91         vdd_log: vdd-log {
  92                 compatible = "pwm-regulator";
  93                 pwms = <&pwm2 0 25000 0>;
  94                 regulator-name = "vdd_log";
  95                 regulator-min-microvolt = <800000>;
  96                 regulator-max-microvolt = <1400000>;
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99
 100                 /* for rockchip boot on */
 101                 rockchip,pwm_id= <2>;
 102                 rockchip,pwm_voltage = <900000>;
 103
 104                 vin-supply = <&vcc_sys>;
 105         };
 106
 107         clkin_gmac: external-gmac-clock {
 108                 compatible = "fixed-clock";
 109                 clock-frequency = <125000000>;
 110                 clock-output-names = "clkin_gmac";
 111                 #clock-cells = <0>;
 112         };
 113
 114         io-domains {
 115                 compatible = "rockchip,rk3399-io-voltage-domain";
 116                 rockchip,grf = <&grf>;
 117
 118                 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
 119                 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
 120                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 121                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 122         };
 123
 124         pmu-io-domains {
 125                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 126                 rockchip,grf = <&pmugrf>;
 127
 128                 pmu1830-supply = <&vcc_1v8>;
 129         };
 130
 131         spdif-sound {
 132                 status = "okay";
 133                 compatible = "simple-audio-card";
 134                 simple-audio-card,name = "ROCKCHIP,SPDIF";
 135                 simple-audio-card,cpu {
 136                         sound-dai = <&spdif>;
 137                 };
 138                 simple-audio-card,codec {
 139                         sound-dai = <&spdif_out>;
 140                 };
 141         };
 142
 143         spdif_out: spdif-out {
 144                 status = "okay";
 145                 compatible = "linux,spdif-dit";
 146                 #sound-dai-cells = <0>;
 147         };
 148
 149         hdmi_sound: hdmi-sound {
 150                 status = "okay";
 151                 compatible = "simple-audio-card";
 152                 simple-audio-card,format = "i2s";
 153                 simple-audio-card,mclk-fs = <256>;
 154                 simple-audio-card,name = "rockchip,hdmi";
 155                 simple-audio-card,cpu {
 156                         sound-dai = <&i2s2>;
 157                 };
 158                 simple-audio-card,codec {
 159                         sound-dai = <&dw_hdmi_audio>;
 160                 };
 161         };
 162
 163         dw_hdmi_audio: dw-hdmi-audio {
 164                 status = "okay";
 165                 compatible = "rockchip,dw-hdmi-audio";
 166                 #sound-dai-cells = <0>;
 167         };
 168
 169         sdio_pwrseq: sdio-pwrseq {
 170                 compatible = "mmc-pwrseq-simple";
 171                 clocks = <&rk808 1>;
 172                 clock-names = "ext_clock";
 173                 pinctrl-names = "default";
 174                 pinctrl-0 = <&wifi_enable_h>;
 175
 176                 /*
 177                  * On the module itself this is one of these (depending
 178                  * on the actual card populated):
 179                  * - SDIO_RESET_L_WL_REG_ON
 180                  * - PDN (power down when low)
 181                  */
 182                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 183         };
 184
 185         wireless-wlan {
 186                 compatible = "wlan-platdata";
 187                 rockchip,grf = <&grf>;
 188                 wifi_chip_type = "ap6354";
 189                 sdio_vref = <1800>;
 190                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
 191                 status = "okay";
 192         };
 193
 194         wireless-bluetooth {
 195                 compatible = "bluetooth-platdata";
 196                 /* wifi-bt-power-toggle; */
 197                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 198                 pinctrl-names = "default", "rts_gpio";
 199                 pinctrl-0 = <&uart0_rts>;
 200                 pinctrl-1 = <&uart0_gpios>;
 201                 /* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
 202                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 203                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 204                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 205                 status = "okay";
 206         };
 207 };
 208
 209 &sdmmc {
 210         clock-frequency = <100000000>;
 211         clock-freq-min-max = <400000 100000000>;
 212         supports-sd;
 213         bus-width = <4>;
 214         cap-mmc-highspeed;
 215         cap-sd-highspeed;
 216         disable-wp;
 217         num-slots = <1>;
 218         sd-uhs-sdr104;
 219         vqmmc-supply = <&vcc_sd>;
 220         pinctrl-names = "default";
 221         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 222         status = "okay";
 223 };
 224
 225 &sdio0 {
 226         clock-frequency = <100000000>;
 227         clock-freq-min-max = <200000 100000000>;
 228         supports-sdio;
 229         bus-width = <4>;
 230         disable-wp;
 231         cap-sd-highspeed;
 232         cap-sdio-irq;
 233         keep-power-in-suspend;
 234         mmc-pwrseq = <&sdio_pwrseq>;
 235         non-removable;
 236         num-slots = <1>;
 237         pinctrl-names = "default";
 238         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 239         sd-uhs-sdr104;
 240         status = "okay";
 241 };
 242
 243 &emmc_phy {
 244         freq-sel = <200000000>;
 245         dr-sel = <50>;
 246         opdelay = <4>;
 247         status = "okay";
 248 };
 249
 250 &sdhci {
 251         bus-width = <8>;
 252         mmc-hs400-1_8v;
 253         supports-emmc;
 254         non-removable;
 255         mmc-hs400-enhanced-strobe;
 256         status = "okay";
 257 };
 258
 259 &i2s0 {
 260         status = "okay";
 261         rockchip,i2s-broken-burst-len;
 262         rockchip,playback-channels = <8>;
 263         rockchip,capture-channels = <8>;
 264         #sound-dai-cells = <0>;
 265 };
 266
 267 &i2s2 {
 268         #sound-dai-cells = <0>;
 269 };
 270
 271 &spdif {
 272         pinctrl-0 = <&spdif_bus_1>;
 273         status = "okay";
 274         #sound-dai-cells = <0>;
 275 };
 276
 277 &cluster0_opp {
 278         opp@408000000 {
 279                 opp-hz = /bits/ 64 <408000000>;
 280                 opp-microvolt = <800000>;
 281                 clock-latency-ns = <40000>;
 282         };
 283         opp@600000000 {
 284                 opp-hz = /bits/ 64 <600000000>;
 285                 opp-microvolt = <800000>;
 286         };
 287         opp@816000000 {
 288                 opp-hz = /bits/ 64 <816000000>;
 289                 opp-microvolt = <800000>;
 290         };
 291         opp@1008000000 {
 292                 opp-hz = /bits/ 64 <1008000000>;
 293                 opp-microvolt = <875000>;
 294         };
 295         opp@1200000000 {
 296                 opp-hz = /bits/ 64 <1200000000>;
 297                 opp-microvolt = <925000>;
 298         };
 299         opp@1416000000 {
 300                 opp-hz = /bits/ 64 <1416000000>;
 301                 opp-microvolt = <1050000>;
 302         };
 303         opp@1512000000 {
 304                 opp-hz = /bits/ 64 <1512000000>;
 305                 opp-microvolt = <1075000>;
 306         };
 307 };
 308
 309 &cluster1_opp {
 310         opp@408000000 {
 311                 opp-hz = /bits/ 64 <408000000>;
 312                 opp-microvolt = <800000>;
 313                 clock-latency-ns = <40000>;
 314         };
 315         opp@600000000 {
 316                 opp-hz = /bits/ 64 <600000000>;
 317                 opp-microvolt = <800000>;
 318         };
 319         opp@816000000 {
 320                 opp-hz = /bits/ 64 <816000000>;
 321                 opp-microvolt = <825000>;
 322         };
 323         opp@1008000000 {
 324                 opp-hz = /bits/ 64 <1008000000>;
 325                 opp-microvolt = <875000>;
 326         };
 327         opp@1200000000 {
 328                 opp-hz = /bits/ 64 <1200000000>;
 329                 opp-microvolt = <950000>;
 330         };
 331         opp@1416000000 {
 332                 opp-hz = /bits/ 64 <1416000000>;
 333                 opp-microvolt = <1025000>;
 334         };
 335         opp@1608000000 {
 336                 opp-hz = /bits/ 64 <1608000000>;
 337                 opp-microvolt = <1100000>;
 338         };
 339         opp@1800000000 {
 340                 opp-hz = /bits/ 64 <1800000000>;
 341                 opp-microvolt = <1175000>;
 342         };
 343         opp@1992000000 {
 344                 opp-hz = /bits/ 64 <1992000000>;
 345                 opp-microvolt = <1250000>;
 346         };
 347 };
 348
 349 &CPU_COST_A72 {
 350         busy-cost-data = <
 351                 210   129       /*  408MHz */
 352                 308   184       /*  600MHz */
 353                 419   246       /*  816MHz */
 354                 518   335       /* 1008MHz */
 355                 617   428       /* 1200MHz */
 356                 728   573       /* 1416MHz */
 357                 827   724       /* 1608MHz */
 358                 925   900       /* 1800MHz */
 359                 1024  1108      /* 1992MHz */
 360         >;
 361         idle-cost-data = <
 362               15
 363               15
 364                0
 365         >;
 366 };
 367
 368 &CPU_COST_A53 {
 369         busy-cost-data = <
 370                 108    46       /*  408M */
 371                 159    67       /*  600M */
 372                 216    90       /*  816M */
 373                 267    120      /* 1008M */
 374                 318    153      /* 1200M */
 375                 375    198      /* 1416M */
 376                 401    222      /* 1512M */
 377         >;
 378         idle-cost-data = <
 379               6
 380               6
 381               0
 382         >;
 383 };
 384
 385 &CLUSTER_COST_A72 {
 386         busy-cost-data = <
 387                 210   129       /*  408MHz */
 388                 308   184       /*  600MHz */
 389                 419   246       /*  816MHz */
 390                 518   335       /* 1008MHz */
 391                 617   428       /* 1200MHz */
 392                 728   573       /* 1416MHz */
 393                 827   724       /* 1608MHz */
 394                 925   900       /* 1800MHz */
 395                 1024  1108      /* 1992MHz */
 396         >;
 397         idle-cost-data = <
 398                  65
 399                  65
 400                  65
 401         >;
 402 };
 403
 404 &CLUSTER_COST_A53 {
 405         busy-cost-data = <
 406                 108    46       /*  408M */
 407                 159    67       /*  600M */
 408                 216    90       /*  816M */
 409                 267    120      /* 1008M */
 410                 318    153      /* 1200M */
 411                 375    198      /* 1416M */
 412                 401    222      /* 1512M */
 413         >;
 414         idle-cost-data = <
 415                 56
 416                 56
 417                 56
 418         >;
 419 };
 420
 421 &gpu_opp_table {
 422         opp@200000000 {
 423                 opp-hz = /bits/ 64 <200000000>;
 424                 opp-microvolt = <800000>;
 425         };
 426         opp@300000000 {
 427                 opp-hz = /bits/ 64 <300000000>;
 428                 opp-microvolt = <800000>;
 429         };
 430         opp@400000000 {
 431                 opp-hz = /bits/ 64 <400000000>;
 432                 opp-microvolt = <800000>;
 433         };
 434         opp@500000000 {
 435                 opp-hz = /bits/ 64 <500000000>;
 436                 opp-microvolt = <850000>;
 437         };
 438         opp@600000000 {
 439                 opp-hz = /bits/ 64 <600000000>;
 440                 opp-microvolt = <900000>;
 441         };
 442         opp@700000000 {
 443                 opp-hz = /bits/ 64 <700000000>;
 444                 opp-microvolt = <950000>;
 445         };
 446         opp@800000000 {
 447                 opp-hz = /bits/ 64 <800000000>;
 448                 opp-microvolt = <975000>;
 449         };
 450 };
 451
 452 &i2c0 {
 453         status = "okay";
 454         i2c-scl-rising-time-ns = <168>;
 455         i2c-scl-falling-time-ns = <4>;
 456         clock-frequency = <400000>;
 457
 458         vdd_cpu_b: syr827@40 {
 459                 compatible = "silergy,syr827";
 460                 reg = <0x40>;
 461                 regulator-compatible = "fan53555-reg";
 462                 regulator-name = "vdd_cpu_b";
 463                 regulator-min-microvolt = <712500>;
 464                 regulator-max-microvolt = <1500000>;
 465                 regulator-ramp-delay = <1000>;
 466                 fcs,suspend-voltage-selector = <0>;
 467                 regulator-always-on;
 468                 regulator-boot-on;
 469                 vin-supply = <&vcc_sys>;
 470                 regulator-state-mem {
 471                         regulator-off-in-suspend;
 472                 };
 473         };
 474
 475         vdd_gpu: syr828@41 {
 476                 compatible = "silergy,syr828";
 477                 reg = <0x41>;
 478                 regulator-compatible = "fan53555-reg";
 479                 regulator-name = "vdd_gpu";
 480                 regulator-min-microvolt = <712500>;
 481                 regulator-max-microvolt = <1500000>;
 482                 regulator-ramp-delay = <1000>;
 483                 fcs,suspend-voltage-selector = <1>;
 484                 regulator-always-on;
 485                 regulator-boot-on;
 486                 vin-supply = <&vcc_sys>;
 487                 regulator-state-mem {
 488                         regulator-off-in-suspend;
 489                 };
 490         };
 491
 492         rk808: pmic@1b {
 493                 compatible = "rockchip,rk808";
 494                 reg = <0x1b>;
 495                 interrupt-parent = <&gpio1>;
 496                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 497                 pinctrl-names = "default";
 498                 pinctrl-0 = <&pmic_int_l>;
 499                 rockchip,system-power-controller;
 500                 wakeup-source;
 501                 #clock-cells = <1>;
 502                 clock-output-names = "xin32k", "rk808-clkout2";
 503
 504                 vcc1-supply = <&vcc_sys>;
 505                 vcc2-supply = <&vcc_sys>;
 506                 vcc3-supply = <&vcc_sys>;
 507                 vcc4-supply = <&vcc_sys>;
 508                 vcc6-supply = <&vcc_sys>;
 509                 vcc7-supply = <&vcc_sys>;
 510                 vcc8-supply = <&vcc3v3_sys>;
 511                 vcc9-supply = <&vcc_sys>;
 512                 vcc10-supply = <&vcc_sys>;
 513                 vcc11-supply = <&vcc_sys>;
 514                 vcc12-supply = <&vcc3v3_sys>;
 515                 vddio-supply = <&vcc_1v8>;
 516
 517                 regulators {
 518                         vdd_center: DCDC_REG1 {
 519                                 regulator-name = "vdd_center";
 520                                 regulator-min-microvolt = <750000>;
 521                                 regulator-max-microvolt = <1350000>;
 522                                 regulator-always-on;
 523                                 regulator-boot-on;
 524                                 regulator-state-mem {
 525                                         regulator-off-in-suspend;
 526                                 };
 527                         };
 528
 529                         vdd_cpu_l: DCDC_REG2 {
 530                                 regulator-name = "vdd_cpu_l";
 531                                 regulator-min-microvolt = <750000>;
 532                                 regulator-max-microvolt = <1350000>;
 533                                 regulator-always-on;
 534                                 regulator-boot-on;
 535                                 regulator-state-mem {
 536                                         regulator-off-in-suspend;
 537                                 };
 538                         };
 539
 540                         vcc_ddr: DCDC_REG3 {
 541                                 regulator-name = "vcc_ddr";
 542                                 regulator-always-on;
 543                                 regulator-boot-on;
 544                                 regulator-state-mem {
 545                                         regulator-on-in-suspend;
 546                                 };
 547                         };
 548
 549                         vcc_1v8: DCDC_REG4 {
 550                                 regulator-name = "vcc_1v8";
 551                                 regulator-min-microvolt = <1800000>;
 552                                 regulator-max-microvolt = <1800000>;
 553                                 regulator-always-on;
 554                                 regulator-boot-on;
 555                                 regulator-state-mem {
 556                                         regulator-on-in-suspend;
 557                                         regulator-suspend-microvolt = <1800000>;
 558                                 };
 559                         };
 560
 561                         vcc1v8_dvp: LDO_REG1 {
 562                                 regulator-name = "vcc1v8_dvp";
 563                                 regulator-min-microvolt = <1800000>;
 564                                 regulator-max-microvolt = <1800000>;
 565                                 regulator-always-on;
 566                                 regulator-boot-on;
 567                                 regulator-state-mem {
 568                                         regulator-on-in-suspend;
 569                                         regulator-suspend-microvolt = <1800000>;
 570                                 };
 571                         };
 572
 573                         vcca1v8_hdmi: LDO_REG2 {
 574                                 regulator-name = "vcca1v8_hdmi";
 575                                 regulator-min-microvolt = <1800000>;
 576                                 regulator-max-microvolt = <1800000>;
 577                                 regulator-always-on;
 578                                 regulator-boot-on;
 579                                 regulator-state-mem {
 580                                         regulator-on-in-suspend;
 581                                         regulator-suspend-microvolt = <1800000>;
 582                                 };
 583                         };
 584
 585                         vcca_1v8: LDO_REG3 {
 586                                 regulator-name = "vcca_1v8";
 587                                 regulator-min-microvolt = <1800000>;
 588                                 regulator-max-microvolt = <1800000>;
 589                                 regulator-always-on;
 590                                 regulator-boot-on;
 591                                 regulator-state-mem {
 592                                         regulator-on-in-suspend;
 593                                         regulator-suspend-microvolt = <1800000>;
 594                                 };
 595                         };
 596
 597                         vcc_sd: LDO_REG4 {
 598                                 regulator-name = "vcc_sd";
 599                                 regulator-min-microvolt = <1800000>;
 600                                 regulator-max-microvolt = <3300000>;
 601                                 regulator-always-on;
 602                                 regulator-boot-on;
 603                                 regulator-state-mem {
 604                                         regulator-on-in-suspend;
 605                                         regulator-suspend-microvolt = <3300000>;
 606                                 };
 607                         };
 608
 609                         vcc3v0_sd: LDO_REG5 {
 610                                 regulator-name = "vcc3v0_sd";
 611                                 regulator-min-microvolt = <3000000>;
 612                                 regulator-max-microvolt = <3000000>;
 613                                 regulator-always-on;
 614                                 regulator-boot-on;
 615                                 regulator-state-mem {
 616                                         regulator-on-in-suspend;
 617                                         regulator-suspend-microvolt = <3000000>;
 618                                 };
 619                         };
 620
 621                         vcc_1v5: LDO_REG6 {
 622                                 regulator-name = "vcc_1v5";
 623                                 regulator-min-microvolt = <1500000>;
 624                                 regulator-max-microvolt = <1500000>;
 625                                 regulator-always-on;
 626                                 regulator-boot-on;
 627                                 regulator-state-mem {
 628                                         regulator-on-in-suspend;
 629                                         regulator-suspend-microvolt = <1500000>;
 630                                 };
 631                         };
 632
 633                         vcca0v9_hdmi: LDO_REG7 {
 634                                 regulator-name = "vcca0v9_hdmi";
 635                                 regulator-min-microvolt = <900000>;
 636                                 regulator-max-microvolt = <900000>;
 637                                 regulator-always-on;
 638                                 regulator-boot-on;
 639                                 regulator-state-mem {
 640                                         regulator-on-in-suspend;
 641                                         regulator-suspend-microvolt = <900000>;
 642                                 };
 643                         };
 644
 645                         vcc_3v0: LDO_REG8 {
 646                                 regulator-name = "vcc_3v0";
 647                                 regulator-min-microvolt = <3000000>;
 648                                 regulator-max-microvolt = <3000000>;
 649                                 regulator-always-on;
 650                                 regulator-boot-on;
 651                                 regulator-state-mem {
 652                                         regulator-on-in-suspend;
 653                                         regulator-suspend-microvolt = <3000000>;
 654                                 };
 655                         };
 656
 657                         vcc3v3_s3: SWITCH_REG1 {
 658                                 regulator-name = "vcc3v3_s3";
 659                                 regulator-always-on;
 660                                 regulator-boot-on;
 661                                 regulator-state-mem {
 662                                         regulator-on-in-suspend;
 663                                 };
 664                         };
 665
 666                         vcc3v3_s0: SWITCH_REG2 {
 667                                 regulator-name = "vcc3v3_s0";
 668                                 regulator-always-on;
 669                                 regulator-boot-on;
 670                                 regulator-state-mem {
 671                                         regulator-on-in-suspend;
 672                                 };
 673                         };
 674                 };
 675         };
 676 };
 677
 678 &cpu_l0 {
 679         cpu-supply = <&vdd_cpu_l>;
 680 };
 681
 682 &cpu_l1 {
 683         cpu-supply = <&vdd_cpu_l>;
 684 };
 685
 686 &cpu_l2 {
 687         cpu-supply = <&vdd_cpu_l>;
 688 };
 689
 690 &cpu_l3 {
 691         cpu-supply = <&vdd_cpu_l>;
 692 };
 693
 694 &cpu_b0 {
 695         cpu-supply = <&vdd_cpu_b>;
 696 };
 697
 698 &cpu_b1 {
 699         cpu-supply = <&vdd_cpu_b>;
 700 };
 701
 702 &gpu {
 703         status = "okay";
 704         mali-supply = <&vdd_gpu>;
 705 };
 706
 707 &rga {
 708         status = "okay";
 709 };
 710
 711 &tsadc {
 712         /* tshut mode 0:CRU 1:GPIO */
 713         rockchip,hw-tshut-mode = <1>;
 714         /* tshut polarity 0:LOW 1:HIGH */
 715         rockchip,hw-tshut-polarity = <1>;
 716         status = "okay";
 717 };
 718
 719 &u2phy0 {
 720         status = "okay";
 721
 722         u2phy0_host: host-port {
 723                 phy-supply = <&vcc5v0_host>;
 724                 status = "okay";
 725         };
 726 };
 727
 728 &u2phy1 {
 729         status = "okay";
 730
 731         u2phy1_host: host-port {
 732                 phy-supply = <&vcc5v0_host>;
 733                 status = "okay";
 734         };
 735 };
 736
 737 &uart0 {
 738         pinctrl-names = "default";
 739         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 740         status = "okay";
 741 };
 742
 743 &uart2 {
 744         status = "okay";
 745 };
 746
 747 &usb_host0_ehci {
 748         status = "okay";
 749 };
 750
 751 &usb_host0_ohci {
 752         status = "okay";
 753 };
 754
 755 &usb_host1_ehci {
 756         status = "okay";
 757 };
 758
 759 &usb_host1_ohci {
 760         status = "okay";
 761 };
 762
 763 &usbdrd3_0 {
 764         status = "okay";
 765 };
 766
 767 &usbdrd_dwc3_0 {
 768         dr_mode = "peripheral";
 769         status = "okay";
 770 };
 771
 772 &usbdrd3_1 {
 773         status = "okay";
 774 };
 775
 776 &usbdrd_dwc3_1 {
 777         dr_mode = "host";
 778         status = "okay";
 779 };
 780
 781 &pwm2 {
 782         status = "okay";
 783 };
 784
 785 &pwm3 {
 786         status = "okay";
 787
 788         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
 789         compatible = "rockchip,remotectl-pwm";
 790         remote_pwm_id = <3>;
 791         handle_cpu_id = <0>;
 792
 793         ir_key1 {
 794                 rockchip,usercode = <0x4040>;
 795                 rockchip,key_table =
 796                         <0xf2   KEY_REPLY>,
 797                         <0xba   KEY_BACK>,
 798                         <0xf4   KEY_UP>,
 799                         <0xf1   KEY_DOWN>,
 800                         <0xef   KEY_LEFT>,
 801                         <0xee   KEY_RIGHT>,
 802                         <0xbd   KEY_HOME>,
 803                         <0xea   KEY_VOLUMEUP>,
 804                         <0xe3   KEY_VOLUMEDOWN>,
 805                         <0xe2   KEY_SEARCH>,
 806                         <0xb2   KEY_POWER>,
 807                         <0xbc   KEY_MUTE>,
 808                         <0xec   KEY_MENU>,
 809                         <0xbf   0x190>,
 810                         <0xe0   0x191>,
 811                         <0xe1   0x192>,
 812                         <0xe9   183>,
 813                         <0xe6   248>,
 814                         <0xe8   185>,
 815                         <0xe7   186>,
 816                         <0xf0   388>,
 817                         <0xbe   0x175>;
 818         };
 819
 820         ir_key2 {
 821                 rockchip,usercode = <0xff00>;
 822                 rockchip,key_table =
 823                         <0xf9   KEY_HOME>,
 824                         <0xbf   KEY_BACK>,
 825                         <0xfb   KEY_MENU>,
 826                         <0xaa   KEY_REPLY>,
 827                         <0xb9   KEY_UP>,
 828                         <0xe9   KEY_DOWN>,
 829                         <0xb8   KEY_LEFT>,
 830                         <0xea   KEY_RIGHT>,
 831                         <0xeb   KEY_VOLUMEDOWN>,
 832                         <0xef   KEY_VOLUMEUP>,
 833                         <0xf7   KEY_MUTE>,
 834                         <0xe7   KEY_POWER>,
 835                         <0xfc   KEY_POWER>,
 836                         <0xa9   KEY_VOLUMEDOWN>,
 837                         <0xa8   KEY_VOLUMEDOWN>,
 838                         <0xe0   KEY_VOLUMEDOWN>,
 839                         <0xa5   KEY_VOLUMEDOWN>,
 840                         <0xab   183>,
 841                         <0xb7   388>,
 842                         <0xf8   184>,
 843                         <0xaf   185>,
 844                         <0xed   KEY_VOLUMEDOWN>,
 845                         <0xee   186>,
 846                         <0xb3   KEY_VOLUMEDOWN>,
 847                         <0xf1   KEY_VOLUMEDOWN>,
 848                         <0xf2   KEY_VOLUMEDOWN>,
 849                         <0xf3   KEY_SEARCH>,
 850                         <0xb4   KEY_VOLUMEDOWN>,
 851                         <0xbe   KEY_SEARCH>;
 852         };
 853
 854         ir_key3 {
 855                 rockchip,usercode = <0x1dcc>;
 856                 rockchip,key_table =
 857                         <0xee   KEY_REPLY>,
 858                         <0xf0   KEY_BACK>,
 859                         <0xf8   KEY_UP>,
 860                         <0xbb   KEY_DOWN>,
 861                         <0xef   KEY_LEFT>,
 862                         <0xed   KEY_RIGHT>,
 863                         <0xfc   KEY_HOME>,
 864                         <0xf1   KEY_VOLUMEUP>,
 865                         <0xfd   KEY_VOLUMEDOWN>,
 866                         <0xb7   KEY_SEARCH>,
 867                         <0xff   KEY_POWER>,
 868                         <0xf3   KEY_MUTE>,
 869                         <0xbf   KEY_MENU>,
 870                         <0xf9   0x191>,
 871                         <0xf5   0x192>,
 872                         <0xb3   388>,
 873                         <0xbe   KEY_1>,
 874                         <0xba   KEY_2>,
 875                         <0xb2   KEY_3>,
 876                         <0xbd   KEY_4>,
 877                         <0xf9   KEY_5>,
 878                         <0xb1   KEY_6>,
 879                         <0xfc   KEY_7>,
 880                         <0xf8   KEY_8>,
 881                         <0xb0   KEY_9>,
 882                         <0xb6   KEY_0>,
 883                         <0xb5   KEY_BACKSPACE>;
 884         };
 885 };
 886
 887 &gmac {
 888         phy-supply = <&vcc_phy>;
 889         phy-mode = "rgmii";
 890         clock_in_out = "input";
 891         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 892         snps,reset-active-low;
 893         snps,reset-delays-us = <0 10000 50000>;
 894         assigned-clocks = <&cru SCLK_RMII_SRC>;
 895         assigned-clock-parents = <&clkin_gmac>;
 896         pinctrl-names = "default";
 897         pinctrl-0 = <&rgmii_pins>;
 898         tx_delay = <0x28>;
 899         rx_delay = <0x11>;
 900         status = "okay";
 901 };
 902
 903 &saradc {
 904         status = "okay";
 905 };
 906
 907 &rk_screen {
 908         #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
 909 };
 910
 911 &disp_timings {
 912         native-mode = <&timing1>; /* 1080p */
 913 };
 914
 915 &vopb_rk_fb {
 916         status = "okay";
 917 };
 918
 919 &fb {
 920         rockchip,disp-mode = <NO_DUAL>;
 921         rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
 922 };
 923
 924 &hdmi_rk_fb {
 925         status = "okay";
 926         rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
 927 };
 928
 929 &i2s2 {
 930         status = "okay";
 931 };
 932
 933 &pinctrl {
 934         sdio-pwrseq {
 935                 wifi_enable_h: wifi-enable-h {
 936                         rockchip,pins =
 937                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
 938                 };
 939         };
 940
 941         wireless-bluetooth {
 942                 uart0_gpios: uart0-gpios {
 943                         rockchip,pins =
 944                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
 945                 };
 946         };
 947
 948         usb2 {
 949                 host_vbus_drv: host-vbus-drv {
 950                         rockchip,pins =
 951                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 952                 };
 953         };
 954
 955         pmic {
 956                 pmic_int_l: pmic-int-l {
 957                         rockchip,pins =
 958                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 959                 };
 960         };
 961 };