FROMLIST: arm64: dts: rockchip: change all interrupts cells for 4 on rk3399 SoCs

FROMLIST: arm64: dts: rockchip: change all interrupts cells for 4 on rk3399 SoCs

Add the interrupts cells value for 4, and the 4th cell is zero.

Due to the doc[0] said:" the system requires describing PPI affinity,
then the value must be at least 4"
The 4th cell is a phandle to a node describing a set of CPUs this
interrupt is affine to. The interrupt must be a PPI, and the node
pointed must be a subnode of the "ppi-partitions" subnode. For
interrupt types other than PPI or PPIs that are not partitionned,
this cell must be zero. See the "ppi-partitions" node description
below.

[0]:
Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

Change-Id: I80d459b746aea40027a7eacfcc7aa764a57fdc9f
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(am https://patchwork.kernel.org/patch/9215659/)
(Note: fixes some no sync upstream node)