Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt

   1 Rockchip specific extensions to the Synopsys Designware MIPI DSI
   2 ================================
   3
   4 Required properties:
   5 - #address-cells: Should be <1>.
   6 - #size-cells: Should be <0>.
   7 - compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi".
   8   or "rockchip,rk3368-mipi-dsi", "snps,dw-mipi-dsi".
   9   or "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi".
  10 - reg: Represent the physical address range of the controller.
  11 - interrupts: Represent the controller's interrupt to the CPU(s).
  12 - clocks, clock-names: Phandles to the controller's APB clock(pclk) as
  13   described in [1].
  14 - rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
  15 - ports: contain a port node with endpoint definitions as defined in [2].
  16   For vopb,set the reg = <0> and set the reg = <1> for vopl.
  17
  18 Optional properties
  19 - clocks, clock-names: phandle to the mipi dsi phy config clock, name should be
  20   "phy_cfg".phandle to the mipi dsi phy reference clock, name should be 'ref'.
  21 - phys: phandle to third party MIPI PHY node
  22 - phy-names: the string "mipi_dphy" when is found in a node, along with "phys"
  23   attribute, provides phandle to MIPI PHY node
  24 - resets : phandle to the reset of MIPI DSI APB Clock.
  25 - reset-names : should be "apb".
  26
  27 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
  28 [2] Documentation/devicetree/bindings/media/video-interfaces.txt
  29 [3] Documentation/devicetree/bindings/reset/reset.txt
  30
  31 Example:
  32
  33 For Rockchip RK3288:
  34
  35         mipi_dsi: mipi@ff960000 {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38                 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
  39                 reg = <0xff960000 0x4000>;
  40                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
  41                 clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>,
  42                          <&cru SCLK_DPHY_TX0_CFG>;
  43                 clock-names = "ref", "pclk", "phy_cfg";
  44                 rockchip,grf = <&grf>;
  45                 status = "okay";
  46
  47                 ports {
  48                         #address-cells = <1>;
  49                         #size-cells = <0>;
  50                         reg = <1>;
  51
  52                         mipi_in: port {
  53                                 #address-cells = <1>;
  54                                 #size-cells = <0>;
  55                                 mipi_in_vopb: endpoint@0 {
  56                                         reg = <0>;
  57                                         remote-endpoint = <&vopb_out_mipi>;
  58                                 };
  59                                 mipi_in_vopl: endpoint@1 {
  60                                         reg = <1>;
  61                                         remote-endpoint = <&vopl_out_mipi>;
  62                                 };
  63                         };
  64                 };
  65
  66                 panel {
  67                         compatible ="boe,tv080wum-nl0";
  68                         reg = <0>;
  69
  70                         enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
  71                         pinctrl-names = "default";
  72                         pinctrl-0 = <&lcd_en>;
  73                         backlight = <&backlight>;
  74                         status = "okay";
  75                 };
  76         };
  77
  78 For Rockchip RK3368:
  79
  80 mipi_dsi_host: mipi-dsi-host@ff960000 {
  81         compatible = "rockchip,rk3368-mipi-dsi";
  82         phys = <&mipi_dphy>;
  83         phy-names = "mipi_dphy";
  84         resets = <&cru SRST_MIPIDSI0>;
  85         reset-names = "apb";
  86         ...
  87
  88         ports@1 {
  89                 #address-cells = <1>;
  90                 #size-cells = <0>;
  91                 reg = <1>;
  92
  93                 mipi_in: port {
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96
  97                         mipi_in_vop: endpoint@0 {
  98                                 reg = <0>;
  99                                 remote-endpoint = <&vop_out_mipi>;
 100                         };
 101                 };
 102         };
 103
 104         dsi_panel: panel@0 {
 105                 compatible = "simple-panel-dsi";
 106                 reg = <0>;
 107                 dsi,lanes = <4>;
 108                 ...
 109         };
 110 };