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[mips] Added missing dsra -> dsrav and sra -> srav aliases.
2014-05-08 Matt ArsenaultR600: Promote f64 vector load/stores to i64 for consistency
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2014-05-07 Matt ArsenaultFix using wrong result type for setcc.
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2014-05-01 Matt ArsenaultR600/SI: Fix verifier error with pseudo store instructions.
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2014-04-25 Matt ArsenaultR600: Fix function name printing in LowerCall
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2014-04-24 Matt ArsenaultR600/SI: Use address space in allowsUnalignedMemoryAccesses
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2014-04-24 Matt ArsenaultHandle addrspacecast when looking at memcpys from globals
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2014-04-23 Matt ArsenaultUse pointer size function where only a pointer is expected
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2014-04-23 Matt ArsenaultRemove more default address space argument usage.
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2014-04-23 Matt ArsenaultDon't use default address space arguments in GlobalOpt
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2014-04-23 Matt ArsenaultR600: Add a test that used to be broken that I forgot...
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2014-04-23 Matt ArsenaultConvert test to FileCheck
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2014-04-23 Matt ArsenaultRemove dead code in instcombine.
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2014-04-22 Matt ArsenaultR600: Emit error instead of unreachable on function...
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2014-04-22 Matt ArsenaultR600: Change how vector truncating stores are packed.
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2014-04-22 Matt ArsenaultR600: Make sign_extend_inreg legal.
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2014-04-21 Matt ArsenaultFix unnecessary line break
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2014-04-18 Matt ArsenaultFix uint -> size_t conversion warning.
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2014-04-18 Matt ArsenaultR600: Minor cleanups.
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2014-04-18 Matt ArsenaultR600/SI: Try to use scalar BFE.
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2014-04-18 Matt ArsenaultR600/SI: Match sign_extend_inreg to s_sext_i32_i8 and...
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2014-04-17 Matt ArsenaultR600/SI: f64 frint is legal on CI
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2014-04-17 Matt ArsenaultR600/SI: Fix zext from i1 to i64
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2014-04-16 Matt ArsenaultR600: Extend r600 sign_extend_inreg tests for EG
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2014-04-16 Matt ArsenaultR600: Expand sign extension of vectors.
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2014-04-15 Matt ArsenaultR600/SI: Print code size along with used registers
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2014-04-15 Matt ArsenaultR600/SI: Print more immediates in hex format
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2014-04-15 Matt ArsenaultR600/SI: Cleanup parsing of register names.
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2014-04-15 Matt ArsenaultR600/SI: Fix loads of i1
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2014-04-14 Matt ArsenaultRevert "Revert r206045, "Fix shift by constants for...
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2014-04-11 Matt ArsenaultR600: Check if a sextload should be used for parameter...
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2014-04-11 Matt ArsenaultR600/SI: Refactor SOPC classes slightly.
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2014-04-11 Matt ArsenaultFix shift by constants for vector.
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2014-04-11 Matt ArsenaultMove ExtractVectorElements to SelectionDAG.
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2014-04-09 Matt ArsenaultR600/SI: Match not instruction.
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2014-04-08 Matt ArsenaultBug 19348: Check for legal ExtLoad operation before...
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2014-04-07 Matt ArsenaultUse std::swap
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2014-04-07 Matt ArsenaultUse .data() instead of &x[0]
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2014-04-04 Matt ArsenaultAdd DAG parameter to ComputeNumSignBitsForTargetNode
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2014-04-04 Matt ArsenaultFix tabs
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2014-04-01 Matt ArsenaultFix missing RUN line in test
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2014-04-01 Matt ArsenaultMake isSetCCEquivalent respect the TargetBooleanContents
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2014-04-01 Matt ArsenaultAdd helpers for checking if a value is a target boolean...
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2014-03-31 Matt ArsenaultR600/SI: Remove leftover pattern splitting 64-bit ors.
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2014-03-31 Matt ArsenaultChange shouldSplitVectorElementType to better match...
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2014-03-31 Matt ArsenaultR600/SI: Implement shouldConvertConstantLoadToIntImm
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2014-03-31 Matt ArsenaultR600: Compute masked bits for min and max
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2014-03-31 Matt ArsenaultR600: Add BFE, BFI, and BFM intrinsics to help with...
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2014-03-31 Matt ArsenaultR600: Add target nodes for BFM and BFI
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2014-03-27 Matt ArsenaultR600: Implement isZExtFree.
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2014-03-27 Matt ArsenaultR600/SI: Fix unreachable with a sext_in_reg to an illegal...
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2014-03-26 Matt ArsenaultR600: Add a testcase for sext_in_reg I missed.
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2014-03-25 Matt ArsenaultR600: Move computeMaskedBitsForTargetNode out of AMDILISelLo...
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2014-03-25 Matt ArsenaultR600: Add failing testcase for <3 x i32> stores.
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2014-03-25 Matt ArsenaultFix creating illegal setcc cond codes.
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2014-03-24 Matt ArsenaultR600: Don't viewCFG() under DEBUG() except on failure.
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2014-03-24 Matt ArsenaultR600/SI: Fix extra mov from legalizing 64-bit SALU...
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2014-03-24 Matt ArsenaultR600/SI: Sub-optimial fix for 64-bit immediates with...
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2014-03-24 Matt ArsenaultR600/SI: Fix 64-bit bit ops that require the VALU.
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2014-03-24 Matt ArsenaultR600: Implement isNarrowingProfitable.
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2014-03-24 Matt ArsenaultR600/SI: Move splitting 64-bit immediates to separate...
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2014-03-24 Matt ArsenaultR600/SI: Fix 64-bit private loads.
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2014-03-21 Matt ArsenaultR600/SI: Move instruction patterns to scalar versions.
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2014-03-20 Matt ArsenaultR600: Remove unused method declaration.
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2014-03-19 Matt ArsenaultR600/SI: Add unused LDS 2 form instructions.
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2014-03-19 Matt ArsenaultR600/SI: Add support for 64-bit LDS writes
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2014-03-19 Matt ArsenaultR600/SI: Add support for 64-bit LDS loads.
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2014-03-19 Matt ArsenaultR600/SI: Match i16 immediate offset of LDS instructions.
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2014-03-19 Matt ArsenaultR600/SI: Fix test checking wrong instruction operand.
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2014-03-19 Matt ArsenaultR600/SI: Don't display the GDS bit.
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2014-03-19 Matt ArsenaultR600/SI: Merge offset0 and offset1 fields for single...
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2014-03-17 Matt ArsenaultMake methods static
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2014-03-17 Matt ArsenaultR600: Match sign_extend_inreg to BFE instructions
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2014-03-17 Matt ArsenaultMake DAGCombiner work on vector bitshifts with constant...
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2014-03-15 Matt ArsenaultR600: Remove unnecessary attempt to zext a pointer.
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2014-03-15 Matt ArsenaultR600: Code cleanup.
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2014-03-12 Matt ArsenaultR600: Fix trunc store from i64 to i1
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2014-03-11 Matt ArsenaultR600: Calculate store mask instead of using switch.
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2014-03-11 Matt ArsenaultAdd helpers for getting scalar sizes of vector value...
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2014-03-11 Matt ArsenaultFix undefined behavior in vector shift tests.
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2014-03-11 Matt ArsenaultRemove incomplete comment
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2014-03-11 Matt ArsenaultMove trivial getter into header.
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2014-03-11 Matt ArsenaultUse .data() instead of &x[0]
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2014-03-11 Matt ArsenaultFix indentation
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2014-03-11 Matt ArsenaultFix non 2-space indentation.
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2014-03-06 Matt ArsenaultR600: Fix extloads from i8 / i16 to i64.
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2014-03-06 Matt ArsenaultR600/SI: Expand selects on vectors.
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2014-03-06 Matt ArsenaultFix missing C++ mode comment
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2014-03-06 Matt ArsenaultTeach lint about address spaces
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2014-03-05 Matt ArsenaultFix typo
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2014-03-05 Matt ArsenaultAllow constant folding of fma and fmuladd
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2014-03-05 Matt ArsenaultFix duplicate code in ConstantFolding
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2014-03-01 Matt ArsenaultR600: Add failing control flow tests.
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2014-02-26 Matt ArsenaultR600: Remove unnecessary build_vector pattern.
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2014-02-24 Matt ArsenaultFix unused variable
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2014-02-24 Matt ArsenaultR600/SI - Add new CI arithmetic instructions.
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2014-02-24 Matt ArsenaultR600: Make check clearer.
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2014-02-24 Matt ArsenaultFix DOT4 missing from getTargetOpcodeName
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2014-02-24 Matt ArsenaultAdd missing const
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2014-02-24 Matt ArsenaultTrivial code simplification
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2014-02-14 Matt ArsenaultDo more addrspacecast transforms that happen for bitcast.
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C/C++ LLVM-based compilers that forbids OOTA behaviors