| 2010-06-04 |
Evan Cheng | Re-apply 105308 with fix.
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commit | commitdiff | tree |
| 2010-06-02 |
Evan Cheng | Enable machine cse of instructions which define physical...
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commit | commitdiff | tree |
| 2010-05-29 |
Evan Cheng | Remove schedule-livein-copies. It's not being used.
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commit | commitdiff | tree |
| 2010-05-29 |
Evan Cheng | Fix PR7193: if sibling call address can take a register...
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commit | commitdiff | tree |
| 2010-05-29 |
Evan Cheng | Doh. Machine LICM is re-initializing the CSE map over...
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commit | commitdiff | tree |
| 2010-05-28 |
Evan Cheng | Fix some latency computation bugs: if the use is not...
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commit | commitdiff | tree |
| 2010-05-28 |
Evan Cheng | Schedule high latency instructions for latency reduction...
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commit | commitdiff | tree |
| 2010-05-27 |
Evan Cheng | Use report_fatal_error, not llvm_unreachable.
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commit | commitdiff | tree |
| 2010-05-27 |
Evan Cheng | llvm can't correctly support 'H', 'Q' and 'R' modifiers...
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commit | commitdiff | tree |
| 2010-05-24 |
Evan Cheng | Avoid adding duplicate function live-in's.
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commit | commitdiff | tree |
| 2010-05-24 |
Evan Cheng | LR is in GPR, not tGPR even in Thumb1 mode.
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commit | commitdiff | tree |
| 2010-05-22 |
Evan Cheng | Implement @llvm.returnaddress. rdar://8015977.
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commit | commitdiff | tree |
| 2010-05-21 |
Evan Cheng | Allow machine cse to cse instructions which define...
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commit | commitdiff | tree |
| 2010-05-21 |
Evan Cheng | - Change MachineInstr::findRegisterDefOperandIdx so...
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commit | commitdiff | tree |
| 2010-05-21 |
Evan Cheng | Change ARM scheduling default to list-hybrid if the...
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commit | commitdiff | tree |
| 2010-05-21 |
Evan Cheng | Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.
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commit | commitdiff | tree |
| 2010-05-20 |
Evan Cheng | Allow targets more controls on what nodes are scheduled...
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commit | commitdiff | tree |
| 2010-05-20 |
Evan Cheng | Add a hybrid bottom up scheduler that reduce register...
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Code clean up.
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Code refactoring: pull SchedPreference enum from TargetLower...
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | t2LEApcrel and tLEApcrel are re-materializable. This...
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel...
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Mark pattern-less mayLoad / mayStore instructions neverHasSi...
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Target instruction selection should copy memoperands.
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Mark a few more pattern-less instructions with neverHasSideE...
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commit | commitdiff | tree |
| 2010-05-19 |
Evan Cheng | Intrinsics which do a vector compare (results are all...
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commit | commitdiff | tree |
| 2010-05-18 |
Evan Cheng | Sink dag combine's post index load / store code that...
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commit | commitdiff | tree |
| 2010-05-18 |
Evan Cheng | Continuously refine the register class of REG_SEQUENCE...
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commit | commitdiff | tree |
| 2010-05-18 |
Evan Cheng | Fix PR7162: Use source register classes and sub-indices...
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commit | commitdiff | tree |
| 2010-05-18 |
Evan Cheng | FIX PR7158. SimplifyVBinOp was asserting when it fails...
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | Fix PR7175. Insert copies of a REG_SEQUENCE source...
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | Fix PR7156. If the sources of a REG_SEQUENCE are all...
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | vmov of immediates are trivially re-materializable.
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | Careful with reg_sequence coalescing to not to overwrite...
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | Turn on -neon-reg-sequence by default.
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | Yes, if the redef is a copy, update the old val# with...
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commit | commitdiff | tree |
| 2010-05-17 |
Evan Cheng | No reason not to run the NEON domain croassing fix...
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commit | commitdiff | tree |
| 2010-05-16 |
Evan Cheng | Model vst lane instructions with REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-15 |
Evan Cheng | Model 128-bit vld lane with REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-15 |
Evan Cheng | v4i64 and v8i64 are only synthesizable when NEON is...
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commit | commitdiff | tree |
| 2010-05-15 |
Evan Cheng | Allow TargetLowering::getRegClassFor() to be called...
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commit | commitdiff | tree |
| 2010-05-15 |
Evan Cheng | Model 64-bit lane vld with REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-15 |
Evan Cheng | A partial re-def instruction may be a copy.
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commit | commitdiff | tree |
| 2010-05-14 |
Evan Cheng | Teach two-address pass to do some coalescing while...
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commit | commitdiff | tree |
| 2010-05-14 |
Evan Cheng | Model VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-14 |
Evan Cheng | Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-14 |
Evan Cheng | Get rid of the bit twiddling to read / set OpActions...
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commit | commitdiff | tree |
| 2010-05-14 |
Evan Cheng | Added a QQQQ register file to model 4-consecutive Q...
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commit | commitdiff | tree |
| 2010-05-14 |
Evan Cheng | Fix comments.
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Adding a v8i64 512-bit vector type. This will be used...
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Eliminate use of magic numbers to access OpActions...
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Fix up LoadExtActions, TruncStoreActions, and IndexedModeAct...
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | 80 col violation.
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Add comment about the pseudo registers QQ, each of...
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Bring back VLD1q and VST1q and use them for reloading...
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Expand VMOVQQ into a pair of VMOVQ.
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | Mark some pattern-less instructions as neverHasSideEffects.
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commit | commitdiff | tree |
| 2010-05-13 |
Evan Cheng | If REG_SEQUENCE source is livein, copy it first. Also...
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commit | commitdiff | tree |
| 2010-05-12 |
Evan Cheng | Do not attempt copy coalescing if the source and dest...
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commit | commitdiff | tree |
| 2010-05-12 |
Evan Cheng | Fix some potential issues in the pseudo instruction...
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commit | commitdiff | tree |
| 2010-05-12 |
Evan Cheng | Remove a dead fixme.
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commit | commitdiff | tree |
| 2010-05-12 |
Evan Cheng | vst instructions are modeled as this:
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commit | commitdiff | tree |
| 2010-05-12 |
Evan Cheng | Teach local regalloc about virtual registers with sub...
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commit | commitdiff | tree |
| 2010-05-12 |
Evan Cheng | Code clean up.
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commit | commitdiff | tree |
| 2010-05-11 |
Evan Cheng | Avoid breaking vstd when reg_sequence is not used.
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commit | commitdiff | tree |
| 2010-05-11 |
Evan Cheng | Select @llvm.trap to the special B with 1111 condition...
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commit | commitdiff | tree |
| 2010-05-11 |
Evan Cheng | Model some vst3 and vst4 with reg_sequence.
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commit | commitdiff | tree |
| 2010-05-11 |
Evan Cheng | It's not safe eliminate copies where src and dst have...
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commit | commitdiff | tree |
| 2010-05-11 |
Evan Cheng | Ensure REG_SEQUENCE source operands are unique.
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | Indentation.
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | Model some vld3 instructions with REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | It's not safe to propagate implicit_def that defines...
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | Clear RegSequences vector after eliminating REG_SEQUENCE...
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | Be careful with operand promotion. For a binary operation...
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | Model vld2 / vst2 with reg_sequence.
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commit | commitdiff | tree |
| 2010-05-10 |
Evan Cheng | Re-defined valno is always valno even for partial re...
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commit | commitdiff | tree |
| 2010-05-07 |
Evan Cheng | Use VLD2q32 / VST2q32 to reload / spill QQ (pair of...
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commit | commitdiff | tree |
| 2010-05-07 |
Evan Cheng | Use VSTMD / VLDMD for spills and reloads of Q registers...
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commit | commitdiff | tree |
| 2010-05-07 |
Evan Cheng | Remove VLD1q and VST1q for reloading and spilling Q...
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | Add argument TargetRegisterInfo to loadRegFromStackSlot...
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | 80 col violation.
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | Re-apply 103156 and 103157. 103156 didn't break anything...
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | Fixes a coalescer bug that caused llc to crash on 2009...
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | Fix an obvious bug in isMoveInstr. It needs to return...
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent...
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | Cosmetic changes.
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commit | commitdiff | tree |
| 2010-05-06 |
Evan Cheng | storeRegToStackSlot has forgotten about QPR_8 register...
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commit | commitdiff | tree |
| 2010-05-05 |
Evan Cheng | Do not pre-allocate references of D registers pairs...
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commit | commitdiff | tree |
| 2010-05-05 |
Evan Cheng | Move REG_SEQUENCE removal to 2addr pass.
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commit | commitdiff | tree |
| 2010-05-05 |
Evan Cheng | Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-05 |
Evan Cheng | Trim include.
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commit | commitdiff | tree |
| 2010-05-05 |
Evan Cheng | Teach liveintervalanalysis about virtual registers...
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commit | commitdiff | tree |
| 2010-05-04 |
Evan Cheng | With -neon-reg-sequence, models forming a Q register...
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commit | commitdiff | tree |
| 2010-05-04 |
Evan Cheng | Do not pre-allocate for registers which form a REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-04 |
Evan Cheng | Teach PHI elimination to remove REG_SEQUENCE instructions...
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commit | commitdiff | tree |
| 2010-05-04 |
Evan Cheng | Rename variables for consistency.
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commit | commitdiff | tree |
| 2010-05-04 |
Evan Cheng | Instruction selection optimizations may have moved...
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commit | commitdiff | tree |
| 2010-05-04 |
Evan Cheng | Teach scheduler about REG_SEQUENCE.
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commit | commitdiff | tree |
| 2010-05-01 |
Evan Cheng | Add a pseudo instruction REG_SEQUENCE that takes a...
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commit | commitdiff | tree |
| 2010-04-30 |
Evan Cheng | Fix test.
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commit | commitdiff | tree |
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