Programming Languages Research Group: Git

2010-05-22	Evan Cheng	Implement @llvm.returnaddress. rdar://8015977.	commit \| commitdiff \| tree
2010-05-21	Evan Cheng	Allow machine cse to cse instructions which define...	commit \| commitdiff \| tree
2010-05-21	Evan Cheng	- Change MachineInstr::findRegisterDefOperandIdx so...	commit \| commitdiff \| tree
2010-05-21	Evan Cheng	Change ARM scheduling default to list-hybrid if the...	commit \| commitdiff \| tree
2010-05-21	Evan Cheng	Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.	commit \| commitdiff \| tree
2010-05-20	Evan Cheng	Allow targets more controls on what nodes are scheduled...	commit \| commitdiff \| tree
2010-05-20	Evan Cheng	Add a hybrid bottom up scheduler that reduce register...	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Code clean up.	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Code refactoring: pull SchedPreference enum from TargetLower...	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	t2LEApcrel and tLEApcrel are re-materializable. This...	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel...	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Mark pattern-less mayLoad / mayStore instructions neverHasSi...	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Target instruction selection should copy memoperands.	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Mark a few more pattern-less instructions with neverHasSideE...	commit \| commitdiff \| tree
2010-05-19	Evan Cheng	Intrinsics which do a vector compare (results are all...	commit \| commitdiff \| tree
2010-05-18	Evan Cheng	Sink dag combine's post index load / store code that...	commit \| commitdiff \| tree
2010-05-18	Evan Cheng	Continuously refine the register class of REG_SEQUENCE...	commit \| commitdiff \| tree
2010-05-18	Evan Cheng	Fix PR7162: Use source register classes and sub-indices...	commit \| commitdiff \| tree
2010-05-18	Evan Cheng	FIX PR7158. SimplifyVBinOp was asserting when it fails...	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	Fix PR7175. Insert copies of a REG_SEQUENCE source...	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	Fix PR7156. If the sources of a REG_SEQUENCE are all...	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	vmov of immediates are trivially re-materializable.	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	Careful with reg_sequence coalescing to not to overwrite...	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	Turn on -neon-reg-sequence by default.	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	Yes, if the redef is a copy, update the old val# with...	commit \| commitdiff \| tree
2010-05-17	Evan Cheng	No reason not to run the NEON domain croassing fix...	commit \| commitdiff \| tree
2010-05-16	Evan Cheng	Model vst lane instructions with REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-15	Evan Cheng	Model 128-bit vld lane with REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-15	Evan Cheng	v4i64 and v8i64 are only synthesizable when NEON is...	commit \| commitdiff \| tree
2010-05-15	Evan Cheng	Allow TargetLowering::getRegClassFor() to be called...	commit \| commitdiff \| tree
2010-05-15	Evan Cheng	Model 64-bit lane vld with REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-15	Evan Cheng	A partial re-def instruction may be a copy.	commit \| commitdiff \| tree
2010-05-14	Evan Cheng	Teach two-address pass to do some coalescing while...	commit \| commitdiff \| tree
2010-05-14	Evan Cheng	Model VST_UPD and VSToddUPD pair with REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-14	Evan Cheng	Model VLD_UPD and VLDodd_UPD pair with REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-14	Evan Cheng	Get rid of the bit twiddling to read / set OpActions...	commit \| commitdiff \| tree
2010-05-14	Evan Cheng	Added a QQQQ register file to model 4-consecutive Q...	commit \| commitdiff \| tree
2010-05-14	Evan Cheng	Fix comments.	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Adding a v8i64 512-bit vector type. This will be used...	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Eliminate use of magic numbers to access OpActions...	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Fix up LoadExtActions, TruncStoreActions, and IndexedModeAct...	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	80 col violation.	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Add comment about the pseudo registers QQ, each of...	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Bring back VLD1q and VST1q and use them for reloading...	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Expand VMOVQQ into a pair of VMOVQ.	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	Mark some pattern-less instructions as neverHasSideEffects.	commit \| commitdiff \| tree
2010-05-13	Evan Cheng	If REG_SEQUENCE source is livein, copy it first. Also...	commit \| commitdiff \| tree
2010-05-12	Evan Cheng	Do not attempt copy coalescing if the source and dest...	commit \| commitdiff \| tree
2010-05-12	Evan Cheng	Fix some potential issues in the pseudo instruction...	commit \| commitdiff \| tree
2010-05-12	Evan Cheng	Remove a dead fixme.	commit \| commitdiff \| tree
2010-05-12	Evan Cheng	vst instructions are modeled as this:	commit \| commitdiff \| tree
2010-05-12	Evan Cheng	Teach local regalloc about virtual registers with sub...	commit \| commitdiff \| tree
2010-05-12	Evan Cheng	Code clean up.	commit \| commitdiff \| tree
2010-05-11	Evan Cheng	Avoid breaking vstd when reg_sequence is not used.	commit \| commitdiff \| tree
2010-05-11	Evan Cheng	Select @llvm.trap to the special B with 1111 condition...	commit \| commitdiff \| tree
2010-05-11	Evan Cheng	Model some vst3 and vst4 with reg_sequence.	commit \| commitdiff \| tree
2010-05-11	Evan Cheng	It's not safe eliminate copies where src and dst have...	commit \| commitdiff \| tree
2010-05-11	Evan Cheng	Ensure REG_SEQUENCE source operands are unique.	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	Indentation.	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	Model some vld3 instructions with REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	It's not safe to propagate implicit_def that defines...	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	Clear RegSequences vector after eliminating REG_SEQUENCE...	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	Be careful with operand promotion. For a binary operation...	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	Model vld2 / vst2 with reg_sequence.	commit \| commitdiff \| tree
2010-05-10	Evan Cheng	Re-defined valno is always valno even for partial re...	commit \| commitdiff \| tree
2010-05-07	Evan Cheng	Use VLD2q32 / VST2q32 to reload / spill QQ (pair of...	commit \| commitdiff \| tree
2010-05-07	Evan Cheng	Use VSTMD / VLDMD for spills and reloads of Q registers...	commit \| commitdiff \| tree
2010-05-07	Evan Cheng	Remove VLD1q and VST1q for reloading and spilling Q...	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	Add argument TargetRegisterInfo to loadRegFromStackSlot...	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	80 col violation.	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	Re-apply 103156 and 103157. 103156 didn't break anything...	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	Fixes a coalescer bug that caused llc to crash on 2009...	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	Fix an obvious bug in isMoveInstr. It needs to return...	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent...	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	Cosmetic changes.	commit \| commitdiff \| tree
2010-05-06	Evan Cheng	storeRegToStackSlot has forgotten about QPR_8 register...	commit \| commitdiff \| tree
2010-05-05	Evan Cheng	Do not pre-allocate references of D registers pairs...	commit \| commitdiff \| tree
2010-05-05	Evan Cheng	Move REG_SEQUENCE removal to 2addr pass.	commit \| commitdiff \| tree
2010-05-05	Evan Cheng	Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-05	Evan Cheng	Trim include.	commit \| commitdiff \| tree
2010-05-05	Evan Cheng	Teach liveintervalanalysis about virtual registers...	commit \| commitdiff \| tree
2010-05-04	Evan Cheng	With -neon-reg-sequence, models forming a Q register...	commit \| commitdiff \| tree
2010-05-04	Evan Cheng	Do not pre-allocate for registers which form a REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-04	Evan Cheng	Teach PHI elimination to remove REG_SEQUENCE instructions...	commit \| commitdiff \| tree
2010-05-04	Evan Cheng	Rename variables for consistency.	commit \| commitdiff \| tree
2010-05-04	Evan Cheng	Instruction selection optimizations may have moved...	commit \| commitdiff \| tree
2010-05-04	Evan Cheng	Teach scheduler about REG_SEQUENCE.	commit \| commitdiff \| tree
2010-05-01	Evan Cheng	Add a pseudo instruction REG_SEQUENCE that takes a...	commit \| commitdiff \| tree
2010-04-30	Evan Cheng	Fix test.	commit \| commitdiff \| tree
2010-04-30	Evan Cheng	Another sibcall bug. If caller and callee calling convention...	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Remove DBG_VALUE which reference dead stack slots.	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Add DenseMapInfo for int.	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Add comment.	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Re-enable 102565 with fixes.	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Load folding tail call should not use ebp / rbp after...	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Temporarily disable my changes to unbreak the build.	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Do not generate duplicate dbg_value instructions for...	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Avoid emitting a dbg_value machineinstr that's not...	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Frame index can be negative.	commit \| commitdiff \| tree
2010-04-29	Evan Cheng	Check Reg against zero.	commit \| commitdiff \| tree
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C/C++ LLVM-based compilers that forbids OOTA behaviors

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