oota-llvm.git
11 years agoTeach AsmPrinter how to print odd constants.
Quentin Colombet [Fri, 7 Jun 2013 18:36:03 +0000 (18:36 +0000)]
Teach AsmPrinter how to print odd constants.

Fix an assertion when the compiler encounters big constants whose bit width is
not a multiple of 64-bits.
Although clang would never generate something like this, the backend should be
able to handle any legal IR.

<rdar://problem/13363576>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183544 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDIBuilder: No functionality change.
Manman Ren [Fri, 7 Jun 2013 18:35:53 +0000 (18:35 +0000)]
DIBuilder: No functionality change.

Use the correct DIType when creating types in DIBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183543 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoVincent says the element is at most once in the vector, so we don't need a full std...
Benjamin Kramer [Fri, 7 Jun 2013 18:18:12 +0000 (18:18 +0000)]
Vincent says the element is at most once in the vector, so we don't need a full std::remove.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183541 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse isxdigit.
Rafael Espindola [Fri, 7 Jun 2013 18:05:03 +0000 (18:05 +0000)]
Use isxdigit.

Thanks to Benjamin Kramer for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183540 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake operator== non-member for greater symmetry.
Rafael Espindola [Fri, 7 Jun 2013 18:00:04 +0000 (18:00 +0000)]
Make operator== non-member for greater symmetry.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183539 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a typo in asm string of BP* family of instructions. With this fix
Roman Divacky [Fri, 7 Jun 2013 17:46:57 +0000 (17:46 +0000)]
Fix a typo in asm string of BP* family of instructions. With this fix
I am able to compile/assemble/link/run /bin/echo from FreeBSD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183537 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Object/COFF] BaseOfData field should be absent in PE32+.
Rui Ueyama [Fri, 7 Jun 2013 16:58:30 +0000 (16:58 +0000)]
[Object/COFF] BaseOfData field should be absent in PE32+.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183534 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSupport OpenBSD's native frame protection conventions.
Rafael Espindola [Fri, 7 Jun 2013 16:35:57 +0000 (16:35 +0000)]
Support OpenBSD's native frame protection conventions.

OpenBSD's stack smashing protection differs slightly from other
platforms:

  1. The smash handler function is "__stack_smash_handler(const char
     *funcname)" instead of "__stack_chk_fail(void)".

  2. There's a hidden "long __guard_local" object that gets linked
     into each executable and DSO.

Patch by Matthew Dempsky.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183533 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Fix a potential iterator invalidation issue.
Benjamin Kramer [Fri, 7 Jun 2013 16:13:49 +0000 (16:13 +0000)]
R600: Fix a potential iterator invalidation issue.

As a bonus this reduces the loop from O(n^2) to O(n).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183532 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Remove an extra break in R600OptimizeVectorRegisters.cpp
Vincent Lejeune [Fri, 7 Jun 2013 15:44:53 +0000 (15:44 +0000)]
R600: Remove an extra break in R600OptimizeVectorRegisters.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183528 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[llvm-symbolizer] rewrite r183213 in a more clear way
Alexey Samsonov [Fri, 7 Jun 2013 15:25:27 +0000 (15:25 +0000)]
[llvm-symbolizer] rewrite r183213 in a more clear way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183526 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoBitVector: Do the right thing in all() when Size is a multiple of BITWORD_SIZE.
Benjamin Kramer [Fri, 7 Jun 2013 15:14:31 +0000 (15:14 +0000)]
BitVector: Do the right thing in all() when Size is a multiple of BITWORD_SIZE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183525 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoOptimize BitVector::all().
Benjamin Kramer [Fri, 7 Jun 2013 14:14:38 +0000 (14:14 +0000)]
Optimize BitVector::all().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183521 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFold variable that's only used in assert into the assert.
Benjamin Kramer [Fri, 7 Jun 2013 11:23:35 +0000 (11:23 +0000)]
Fold variable that's only used in assert into the assert.

Avoids unused variable warnings in Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183512 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a script to help us create source tar balls for the release.
Bill Wendling [Fri, 7 Jun 2013 11:15:30 +0000 (11:15 +0000)]
Add a script to help us create source tar balls for the release.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183509 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse proper exit code.
Bill Wendling [Fri, 7 Jun 2013 11:14:37 +0000 (11:14 +0000)]
Use proper exit code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183508 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCorrect wrong register in this example, pointed out by Baoshan Pang.
Duncan Sands [Fri, 7 Jun 2013 08:30:55 +0000 (08:30 +0000)]
Correct wrong register in this example, pointed out by Baoshan Pang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183495 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 07:55:53 +0000 (07:55 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183494 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 07:04:14 +0000 (07:04 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 06:30:15 +0000 (06:30 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183492 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 06:26:43 +0000 (06:26 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183491 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 06:19:56 +0000 (06:19 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183490 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[objc-arc] Ensure that the cfg path count does not overflow when we multiply TopDownP...
Michael Gottesman [Fri, 7 Jun 2013 06:16:49 +0000 (06:16 +0000)]
[objc-arc] Ensure that the cfg path count does not overflow when we multiply TopDownPathCount/BottomUpPathCount.

rdar://12480535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183489 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 05:54:19 +0000 (05:54 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183488 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction info and register info objects.
Bill Wendling [Fri, 7 Jun 2013 05:00:11 +0000 (05:00 +0000)]
Don't cache the instruction info and register info objects.

These objects are internal to the TargetMachine object and may change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183485 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDIBuilder: No functionality change.
Manman Ren [Fri, 7 Jun 2013 03:13:46 +0000 (03:13 +0000)]
DIBuilder: No functionality change.

Use the correct DIType when creating vector types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183484 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Use the right resources for DIV
Arnold Schwaighofer [Fri, 7 Jun 2013 01:16:15 +0000 (01:16 +0000)]
ARM sched model: Use the right resources for DIV

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183477 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add VFP div instruction on Swift
Arnold Schwaighofer [Fri, 7 Jun 2013 01:10:36 +0000 (01:10 +0000)]
ARM sched model: Add VFP div instruction on Swift

Reapply 183271.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183472 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCodeGenSchedule: Use resize instead of copying a vector
Arnold Schwaighofer [Fri, 7 Jun 2013 00:04:30 +0000 (00:04 +0000)]
CodeGenSchedule: Use resize instead of copying a vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183465 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add SIMD/VFP load/store instructions on Swift
Arnold Schwaighofer [Fri, 7 Jun 2013 00:04:28 +0000 (00:04 +0000)]
ARM sched model: Add SIMD/VFP load/store instructions on Swift

Reapply 183270 again (because three is a magic number).

This should now no longer seg fault after r183459.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183464 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Sparc]: Use cmp instruction instead of subcc to compare integers.
Venkatraman Govindaraju [Fri, 7 Jun 2013 00:03:36 +0000 (00:03 +0000)]
[Sparc]: Use cmp instruction instead of subcc to compare integers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183463 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSimplify code. No functionality change.
Jakub Staszak [Thu, 6 Jun 2013 23:34:59 +0000 (23:34 +0000)]
Simplify code. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183461 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unneeded #include.
Jakub Staszak [Thu, 6 Jun 2013 23:34:11 +0000 (23:34 +0000)]
Remove unneeded #include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183460 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCodeGenSchedule: smallvector.push_back(smallvector[0]) is dangerous
Arnold Schwaighofer [Thu, 6 Jun 2013 23:23:14 +0000 (23:23 +0000)]
CodeGenSchedule: smallvector.push_back(smallvector[0]) is dangerous

The element passed to push_back is not copied before the vector reallocates.
The client needs to copy the element first before passing it to push_back.

No test case, will be tested by follow-up swift scheduler model change (it
segfaults without this change).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183459 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Rewrite an awkward loop in R600MachineScheduler
Vincent Lejeune [Thu, 6 Jun 2013 23:08:32 +0000 (23:08 +0000)]
R600: Rewrite an awkward loop in R600MachineScheduler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183458 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoJeffrey Yasskin volunteered to benchmark the vectorizer on -O2 or -Os when compiling...
Nadav Rotem [Thu, 6 Jun 2013 22:35:47 +0000 (22:35 +0000)]
Jeffrey Yasskin volunteered to benchmark the vectorizer on -O2 or -Os when compiling chrome. This patch adds a new flag to enable vectorization on all levels and not only on -O3. It should go away once we make a decision.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183456 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix break in r183446 - helps to increment the iterator in a loop
David Blaikie [Thu, 6 Jun 2013 22:28:26 +0000 (22:28 +0000)]
Fix break in r183446 - helps to increment the iterator in a loop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183454 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert "ARM sched model: Add SIMD/VFP load/store instructions on Swift"
Arnold Schwaighofer [Thu, 6 Jun 2013 21:08:18 +0000 (21:08 +0000)]
Revert "ARM sched model: Add SIMD/VFP load/store instructions on Swift"

Breaks linux build bots (I thought the problem was something else).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183447 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebug Info: simplify parameter ordering preservation
David Blaikie [Thu, 6 Jun 2013 21:04:51 +0000 (21:04 +0000)]
Debug Info: simplify parameter ordering preservation

Seems we emit the parameter ordering number (spuriously named 'arg
number') in the debug info, so there's no need to search through the
variable list to figure out the parameter ordering. This implementation
does 'always' do the work, even in non-optimized debug info (the
previous implementation checked the existence of the 'variables' list on
the subprogram which is only present in optimized builds).

No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183446 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add SIMD/VFP load/store instructions on Swift
Arnold Schwaighofer [Thu, 6 Jun 2013 21:02:18 +0000 (21:02 +0000)]
ARM sched model: Add SIMD/VFP load/store instructions on Swift

Reapply 183270.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183445 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove the test for the data in code into the ARM directory as it is an ARM
Kevin Enderby [Thu, 6 Jun 2013 20:28:28 +0000 (20:28 +0000)]
Move the test for the data in code into the ARM directory as it is an ARM
binary that is used for the test.  Caught by Jim Grosbach!

rdar://11791371

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183442 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add integer VFP/SIMD instructions on Swift
Arnold Schwaighofer [Thu, 6 Jun 2013 20:26:18 +0000 (20:26 +0000)]
ARM sched model: Add integer VFP/SIMD instructions on Swift

Reapply 183269.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183441 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRe-apply "Use IRBuilder instead of ConstantInt methods." with the fixed issues.
Jakub Staszak [Thu, 6 Jun 2013 20:18:46 +0000 (20:18 +0000)]
Re-apply "Use IRBuilder instead of ConstantInt methods." with the fixed issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183439 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add integer load/store instructions on Swift
Arnold Schwaighofer [Thu, 6 Jun 2013 20:11:56 +0000 (20:11 +0000)]
ARM sched model: Add integer load/store instructions on Swift

Reapply 183268.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183438 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add integer arithmetic instructions on Swift
Arnold Schwaighofer [Thu, 6 Jun 2013 19:49:46 +0000 (19:49 +0000)]
ARM sched model: Add integer arithmetic instructions on Swift

Reapply 183267.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183436 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Cortex A9 - More InstRW sched resources
Arnold Schwaighofer [Thu, 6 Jun 2013 19:30:21 +0000 (19:30 +0000)]
ARM sched model: Cortex A9 - More InstRW sched resources

Add more InstRW mappings.

Reapply 183266.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183435 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a testcase from pr16244.
Rafael Espindola [Thu, 6 Jun 2013 19:15:23 +0000 (19:15 +0000)]
Add a testcase from pr16244.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183433 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add branch thumb instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 18:51:01 +0000 (18:51 +0000)]
ARM sched model: Add branch thumb instructions

Reapply 183265.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183432 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add branch thumb2 instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 18:42:09 +0000 (18:42 +0000)]
ARM sched model: Add branch thumb2 instructions

Reapply 183264.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183430 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add branch instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 18:21:13 +0000 (18:21 +0000)]
ARM sched model: Add branch instructions

Reapply 183263.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183428 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add preload thumb2 instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 18:06:30 +0000 (18:06 +0000)]
ARM sched model: Add preload thumb2 instructions

Reapply 183262.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183427 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unimplemented definition. Found using [-Wunused-member-function].
Jakub Staszak [Thu, 6 Jun 2013 17:52:45 +0000 (17:52 +0000)]
Remove unimplemented definition. Found using [-Wunused-member-function].

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183426 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add preload instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 17:26:12 +0000 (17:26 +0000)]
ARM sched model: Add preload instructions

Reapply 183261.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183425 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach llvm-objdump with the -macho parser how to use the data in code table
Kevin Enderby [Thu, 6 Jun 2013 17:20:50 +0000 (17:20 +0000)]
Teach llvm-objdump with the -macho parser how to use the data in code table
from the LC_DATA_IN_CODE load command.  And when disassembling print
the data in code formatted for the kind of data it and not disassemble those
bytes.

I added the format specific functionality to the derived class MachOObjectFile
since these tables only appears in Mach-O object files. This is my first
attempt to modify the libObject stuff so if folks have better suggestions
how to fit this in or suggestions on the implementation please let me know.

rdar://11791371

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183424 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add more ALU and CMP thumb instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 17:03:13 +0000 (17:03 +0000)]
ARM sched model: Add more ALU and CMP thumb instructions

Reapply of 183260.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183423 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert "Use IRBuilder instead of ConstantInt methods. It simplifies code a little...
Rafael Espindola [Thu, 6 Jun 2013 17:03:05 +0000 (17:03 +0000)]
Revert "Use IRBuilder instead of ConstantInt methods. It simplifies code a little bit."

This reverts commit 183328. It caused pr16244 and broke the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183422 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add more ALU and CMP thumb2 instructions
Arnold Schwaighofer [Thu, 6 Jun 2013 16:35:25 +0000 (16:35 +0000)]
ARM sched model: Add more ALU and CMP thumb2 instructions

Reapply of 183259.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183421 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Remove leftover code in R600MachineScheduler.cpp
Vincent Lejeune [Thu, 6 Jun 2013 14:18:29 +0000 (14:18 +0000)]
R600: Remove leftover code in R600MachineScheduler.cpp

Spotted by Benjamin Kramer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183413 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPrint symbol names in relocations when dumping COFF as YAML.
Rafael Espindola [Thu, 6 Jun 2013 13:06:17 +0000 (13:06 +0000)]
Print symbol names in relocations when dumping COFF as YAML.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183403 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCast to the correct type. Pointer, not reference.
Bill Wendling [Thu, 6 Jun 2013 05:39:29 +0000 (05:39 +0000)]
Cast to the correct type. Pointer, not reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183385 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized]
NAKAMURA Takumi [Thu, 6 Jun 2013 02:15:12 +0000 (02:15 +0000)]
R600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized]

FIXME: Is it false alarm?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183371 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600OptimizeVectorRegisters.cpp: Suppress a warning. [-Wunused-variable]
NAKAMURA Takumi [Thu, 6 Jun 2013 02:15:06 +0000 (02:15 +0000)]
R600OptimizeVectorRegisters.cpp: Suppress a warning. [-Wunused-variable]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183370 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTrailing linefeed.
NAKAMURA Takumi [Thu, 6 Jun 2013 02:15:00 +0000 (02:15 +0000)]
Trailing linefeed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183369 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCast to the proper type.
Bill Wendling [Thu, 6 Jun 2013 01:04:21 +0000 (01:04 +0000)]
Cast to the proper type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183365 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unneeded cast<>.
Jakub Staszak [Thu, 6 Jun 2013 00:49:57 +0000 (00:49 +0000)]
Remove unneeded cast<>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183363 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd some class documentation to BinaryRef.
Sean Silva [Thu, 6 Jun 2013 00:47:12 +0000 (00:47 +0000)]
Add some class documentation to BinaryRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183362 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCache the TargetLowering info object as a pointer.
Bill Wendling [Thu, 6 Jun 2013 00:43:09 +0000 (00:43 +0000)]
Cache the TargetLowering info object as a pointer.

Caching it as a pointer allows us to reset it if the TargetMachine object
changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183361 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse IRBuilder instead of ConstantInt methods.
Jakub Staszak [Thu, 6 Jun 2013 00:37:23 +0000 (00:37 +0000)]
Use IRBuilder instead of ConstantInt methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183360 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the TargetLoweringInfo object inside of the FunctionLowering object.
Bill Wendling [Thu, 6 Jun 2013 00:11:39 +0000 (00:11 +0000)]
Don't cache the TargetLoweringInfo object inside of the FunctionLowering object.

The TargetLoweringInfo object is owned by the TargetMachine. In the future, the
TargetMachine object may change, which may also change the TargetLoweringInfo
object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183356 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRename operator== parameter to `RHS`.
Sean Silva [Wed, 5 Jun 2013 23:58:14 +0000 (23:58 +0000)]
Rename operator== parameter to `RHS`.

The previous name `Ref` is overly generic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183354 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove error-prone methods of BinaryRef.
Sean Silva [Wed, 5 Jun 2013 23:55:26 +0000 (23:55 +0000)]
Remove error-prone methods of BinaryRef.

A user shouldn't care about the internal state, and these methods by
their very nature require asserting a predicate on the internal state.
As such, they cannot be used safely without introducing hidden
long-distance dependencies on the manner of construction of the
BinaryRef.

Use writeAsBinary(raw_ostream &) and writeAsHex(raw_ostream &) if you
need to access the data in a binary or hex format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183353 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd writeAsHex(raw_ostream &) method to BinaryRef.
Sean Silva [Wed, 5 Jun 2013 23:47:23 +0000 (23:47 +0000)]
Add writeAsHex(raw_ostream &) method to BinaryRef.

This hides the implementation. A future commit will remove the
error-prone getHex() and getBinary() methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183352 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Replace predicate loop with predicate function
Tom Stellard [Wed, 5 Jun 2013 23:39:50 +0000 (23:39 +0000)]
R600: Replace predicate loop with predicate function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183351 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRename BinaryRef::isBinary to more descriptive DataIsHexString.
Sean Silva [Wed, 5 Jun 2013 23:32:31 +0000 (23:32 +0000)]
Rename BinaryRef::isBinary to more descriptive DataIsHexString.

And add a doxygen comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183350 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd BinaryRef binary_size() method.
Sean Silva [Wed, 5 Jun 2013 23:32:27 +0000 (23:32 +0000)]
Add BinaryRef binary_size() method.

This avoids making assumptions about the data representation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183349 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoComment BinaryRef::Data.
Sean Silva [Wed, 5 Jun 2013 23:32:23 +0000 (23:32 +0000)]
Comment BinaryRef::Data.

Also, state an invariant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183348 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd space to assert message.
Bill Wendling [Wed, 5 Jun 2013 23:13:26 +0000 (23:13 +0000)]
Add space to assert message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183346 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd writeAsBinary(raw_ostream &) method to BinaryRef.
Sean Silva [Wed, 5 Jun 2013 22:59:00 +0000 (22:59 +0000)]
Add writeAsBinary(raw_ostream &) method to BinaryRef.

Previously, yaml2coff.cpp had a writeHexData static helper function to
do this, but it is generally useful functionality.

Also, validate hex strings up-front to avoid running having to handle
errors "deep inside" the yaml2obj code (it also gives better diagnostics
than it used to).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183345 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add a pass that merge Vector Register
Vincent Lejeune [Wed, 5 Jun 2013 21:38:04 +0000 (21:38 +0000)]
R600: Add a pass that merge Vector Register

Previously commited @183279 but tests were failing, reverted @183286
It was broken because @183336 was missing, now it's there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183343 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[docs] Add link to C++ ABI document.
Sean Silva [Wed, 5 Jun 2013 21:11:16 +0000 (21:11 +0000)]
[docs] Add link to C++ ABI document.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183342 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[docs] Add link to SysV ABI document.
Sean Silva [Wed, 5 Jun 2013 21:11:11 +0000 (21:11 +0000)]
[docs] Add link to SysV ABI document.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183341 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[ELF] Add ELFOSABI_GNU.
Sean Silva [Wed, 5 Jun 2013 20:55:58 +0000 (20:55 +0000)]
[ELF] Add ELFOSABI_GNU.

ELFOSABI_LINUX is a historical alias for ELFOSABI_GNU according to
<http://www.sco.com/developers/gabi/latest/ch4.eheader.html>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183339 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't hide the first ELF symbol.
Rafael Espindola [Wed, 5 Jun 2013 20:33:54 +0000 (20:33 +0000)]
Don't hide the first ELF symbol.

The first symbol on ELF is dummy, but it has a defined content and readelf
normally displays it. With this change llvm-readobj also displays it and we
can check that llvm-mc output is correct according to the standard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183337 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Schedule copy from phys register at beginning of block
Vincent Lejeune [Wed, 5 Jun 2013 20:27:35 +0000 (20:27 +0000)]
R600: Schedule copy from phys register at beginning of block

It allows regalloc pass to remove them by trivially assigning associated reg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoyaml2obj: split out COFF logic into separate file
Sean Silva [Wed, 5 Jun 2013 19:56:47 +0000 (19:56 +0000)]
yaml2obj: split out COFF logic into separate file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183335 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] brcond + setgt/setugt instruction selection patterns.
Akira Hatanaka [Wed, 5 Jun 2013 19:49:55 +0000 (19:49 +0000)]
[mips] brcond + setgt/setugt instruction selection patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183334 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoyaml2obj: add -format=<fmt> to choose input YAML interpretation
Sean Silva [Wed, 5 Jun 2013 18:51:34 +0000 (18:51 +0000)]
yaml2obj: add -format=<fmt> to choose input YAML interpretation

See the comment in yaml2obj.cpp for why this is currently needed.
Eventually we can get rid of this, but for now it is needed in order to
make forward progress with adding ELF support, and should be
straightforward to remove later.

Also, preserve the default of COFF, to avoid breaking existing tests.
This policy can easily be changed later though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183332 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse IRBuilder instead of ConstantInt methods. It simplifies code a little bit.
Jakub Staszak [Wed, 5 Jun 2013 18:27:02 +0000 (18:27 +0000)]
Use IRBuilder instead of ConstantInt methods. It simplifies code a little bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183328 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PATCH] Fix VGATHER* operand constraints
Michael Liao [Wed, 5 Jun 2013 18:12:26 +0000 (18:12 +0000)]
[PATCH] Fix VGATHER* operand constraints

Add earlyclobber constaints to prevent input register being allocated as
the output register because, according to Intel spec [1], "If any pair
of the index, mask, or destination registers are the same, this
instruction results a UD fault."

---
[1] http://software.intel.com/sites/default/files/319433-014.pdf

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183327 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRepresent symbols with a SymbolIndex,SectionIndex pair.
Rafael Espindola [Wed, 5 Jun 2013 17:54:19 +0000 (17:54 +0000)]
Represent symbols with a SymbolIndex,SectionIndex pair.

With this patch we use the SectionIndex directly, instead of counting the
number of symbol tables. This saves a DenseMap lookup every time we want to
find which symbol a relocation refers to.

Also simplify based on the fact that there is at most one SHT_SYMTAB and one
SHT_DYNSYM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183326 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add more ALU and CMP instructions
Arnold Schwaighofer [Wed, 5 Jun 2013 16:36:51 +0000 (16:36 +0000)]
ARM sched model: Add more ALU and CMP instructions

Reapply of 183258.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183321 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM sched model: Add divsion, loads, branches, vfp cvt
Arnold Schwaighofer [Wed, 5 Jun 2013 16:06:11 +0000 (16:06 +0000)]
ARM sched model: Add divsion, loads, branches, vfp cvt

Add some generic SchedWrites and assign resources for Swift and Cortex A9.

Reapply of r183257. (Removed empty InstRW for division on swift)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183319 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARMInstrInfo: Improve isSwiftFastImmShift
Arnold Schwaighofer [Wed, 5 Jun 2013 14:59:36 +0000 (14:59 +0000)]
ARMInstrInfo: Improve isSwiftFastImmShift

An instruction with less than 3 inputs is trivially a fast immediate shift.

Reapply of 183256, should not have caused the tablegen segfault on linux either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183314 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSubtargetEmitter fix
Arnold Schwaighofer [Wed, 5 Jun 2013 14:06:50 +0000 (14:06 +0000)]
SubtargetEmitter fix

Don't output data if we are supposed to ignore the record.

Reapply of 183255, I don't think this was causing the tablegen segfault on linux
testers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183311 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThis is a simple patch that changes RRX and RRXS to accept all registers as operands.
Mihai Popa [Wed, 5 Jun 2013 13:23:51 +0000 (13:23 +0000)]
This is a simple patch that changes RRX and RRXS to accept all registers as operands.
According to the ARM reference manual, RRX(S) have defined encodings for lr, pc and sp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183307 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThe GNU/HURD is also using the libc. Therefor, endian.h should be included, not machi...
Sylvestre Ledru [Wed, 5 Jun 2013 09:17:26 +0000 (09:17 +0000)]
The GNU/HURD is also using the libc. Therefor, endian.h should be included, not machine/endian.h. See full build log https://buildd.debian.org/status/fetch.php?pkg=llvm-toolchain-3.3&arch=hurd-i386&ver=1%3A3.3~%2Brc3-1~exp1&stamp=1370358869

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183303 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a tblgen subtargetemitter bug, for future Swift support.
Andrew Trick [Wed, 5 Jun 2013 06:55:20 +0000 (06:55 +0000)]
Fix a tblgen subtargetemitter bug, for future Swift support.

This fixes some of the ridiculously complex code for optimizing the
machine model tables that are shared among all processors of a given
target. A9 and Swift both use the "special" feature that maps old
itinerary classes to new machine model defs. They map different
overlapping subsets of instructions, which wasn't handled correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183302 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPR15662: Optimized debug info produces out of order function parameters
David Blaikie [Wed, 5 Jun 2013 05:39:59 +0000 (05:39 +0000)]
PR15662: Optimized debug info produces out of order function parameters

When a function is inlined we lazily construct the variables
representing the function's parameters. After that, we add any remaining
unused parameters.

If the function doesn't use all the parameters, or uses them out of
order, then the DWARF would produce them in that order, producing a
parameter order that doesn't match the source.

This fix causes us to always keep the arg variables at the start of the
variable list & in the original order from the source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183297 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Make sure to schedule AR register uses and defs in the same clause
Tom Stellard [Wed, 5 Jun 2013 03:43:06 +0000 (03:43 +0000)]
R600: Make sure to schedule AR register uses and defs in the same clause

Reviewed-by: vljn at ovi.com
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183294 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't print default values for NumberOfAuxSymbols and AuxiliaryData.
Rafael Espindola [Wed, 5 Jun 2013 03:20:13 +0000 (03:20 +0000)]
Don't print default values for NumberOfAuxSymbols and AuxiliaryData.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183293 91177308-0d34-0410-b5e6-96231b3b80d8