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(parent: 41e632d) | patch
Don't cache the instruction and register info from the TargetMachine, because
authorBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 07:55:53 +0000 (07:55 +0000)
committerBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 07:55:53 +0000 (07:55 +0000)
commit80ada583f3b40ffb201e54cd57c42f9518039c9e
treee91e441adb3d4d43d5420db82c6a0dc01ca28448tree | snapshot
parent41e632d9e1a55d36cb08b0551ad82a13d9137a5ecommit | diff
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183494 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCHazardRecognizers.cpp diff | blob | history
lib/Target/PowerPC/PPCHazardRecognizers.h diff | blob | history
lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCISelLowering.h diff | blob | history
lib/Target/PowerPC/PPCInstrInfo.cpp diff | blob | history
lib/Target/PowerPC/PPCRegisterInfo.cpp diff | blob | history
lib/Target/PowerPC/PPCRegisterInfo.h diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors