Don't cache the instruction and register info from the TargetMachine, because
authorBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 06:30:15 +0000 (06:30 +0000)
committerBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 06:30:15 +0000 (06:30 +0000)
commited8b5b55a4416286758c5567c2602d2c7d0be585
tree5a184371bddfdf5194d79910e7bb3a2c69c3f548
parent637eab6a3be3a15fbf2057328ec4773d77467a76
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183492 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/MSP430/MSP430InstrInfo.cpp
lib/Target/MSP430/MSP430RegisterInfo.cpp
lib/Target/MSP430/MSP430RegisterInfo.h