oota-llvm.git
11 years agoARM: Clean up fast-isel machine verifier errors.
Jim Grosbach [Fri, 16 Aug 2013 23:37:23 +0000 (23:37 +0000)]
ARM: Clean up fast-isel machine verifier errors.

Lots of machine verifier errors result from using a plain GPR regclass
for incoming argument copies. A more restrictive rGPR class is more
appropriate since it more accurately represents what's happening, plus
it lines up better with isel later on so the verifier is happier.
Reduces the number of ARM fast-isel tests not running with the verifier
enabled by over half.

rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188592 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[lit] Rewrite TODO list, and elaborate on some things.
Daniel Dunbar [Fri, 16 Aug 2013 23:30:23 +0000 (23:30 +0000)]
[lit] Rewrite TODO list, and elaborate on some things.

 - If anyone is interested in lit's feature set, I'd appreciate any comments on
   the elaborated items.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188590 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[typo] An LLVM.
Daniel Dunbar [Fri, 16 Aug 2013 23:30:19 +0000 (23:30 +0000)]
[typo] An LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188589 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a subtle difference between running clang vs llc for mips16.
Reed Kotler [Fri, 16 Aug 2013 23:05:18 +0000 (23:05 +0000)]
Fix a subtle difference between running clang vs llc for mips16.
This regards how mips16 is viewed. It's not really a target type but
there has always been a target for it in the td files. It's more properly
-mcpu=mips32 -mattr=+mips16 . This is how clang treats it but we have
always had the -mcpu=mips16 which I probably should delete now but it will
require updating all the .ll test cases for mips16. In this case it changed
how we decide if we have a count bits instruction and whether instruction
lowering should then expand ctlz. Now that we have dual mode compilation,
-mattr=+mips16 really just indicates the inital processor mode that
we are compiling for. (It is also possible to have -mcpu=64 -mattr=+mips16
but as far as I know, nobody has even built such a processor, though there
is an architecture manual for this).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188586 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoActually, use GNU inline asm for cpuid with clang
Reid Kleckner [Fri, 16 Aug 2013 22:42:42 +0000 (22:42 +0000)]
Actually, use GNU inline asm for cpuid with clang

Clang doesn't support the MSVC __cpuid intrinsic yet, and fixing that is
blocked on some fairly complicated issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188584 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoI'm told that != is not ==
Chris Lattner [Fri, 16 Aug 2013 22:29:44 +0000 (22:29 +0000)]
I'm told that != is not ==

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188583 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoallow != to compare PointerUnion, we already support ==.
Chris Lattner [Fri, 16 Aug 2013 22:09:02 +0000 (22:09 +0000)]
allow != to compare PointerUnion, we already support ==.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188582 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd difference_type to ImmutableMap/Set iterators so they have a complete set of...
Benjamin Kramer [Fri, 16 Aug 2013 21:55:56 +0000 (21:55 +0000)]
Add difference_type to ImmutableMap/Set iterators so they have a complete set of typedefs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188579 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebugInfo: Allow the addition of other (such as static data) members to a record...
David Blaikie [Fri, 16 Aug 2013 20:42:14 +0000 (20:42 +0000)]
DebugInfo: Allow the addition of other (such as static data) members to a record type after construction

Plus a type cleanup & minor fix to enumerate members of declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188577 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Preparatory refactoring for making prologue and epilogue
Bill Schmidt [Fri, 16 Aug 2013 20:05:04 +0000 (20:05 +0000)]
[PowerPC] Preparatory refactoring for making prologue and epilogue
safe on PPC32 SVR4 ABI

[Patch and following text by Mark Minich; committing on his behalf.]

There are FIXME's in PowerPC/PPCFrameLowering.cpp, method
PPCFrameLowering::emitPrologue() related to "negative offsets of R1"
on PPC32 SVR4. They're true, but the real issue is that on PPC32 SVR4
(and any ABI without a Red Zone), no spills may be made until after
the stackframe is claimed, which also includes the LR spill which is
at a positive offset. The same problem exists in emitEpilogue(),
though there's no FIXME for it. I intend to fix this issue, making
LLVM-compiled code finally safe for use on SVR4/EABI/e500 32-bit
platforms (including in particular, OS-free embedded systems & kernel
code, where interrupts may share the same stack as user code).

In preparation for making these changes, to make the diffs for the
functional changes less cluttered, I am providing the non-functional
refactorings in two stages:

Stage 1 does some minor fluffy refactorings to pull multiple method
calls up into a single bool, creating named bools for repeated uses of
obscure logic, moving some code up earlier because either stage 2 or
my final version will require it earlier, and rewording/adding some
comments. My stage 1 changes can be characterized as primarily fluffy
cleanup, the purpose of which may be unclear until the stage 2 or
final changes are made.

My stage 2 refactorings combine the separate PPC32 & PPC64 logic,
which is currently performed by largely duplicate code, into a single
flow, with the differences handled by a group of constants initialized
early in the methods.

This submission is for my stage 1 changes. There should be no
functional changes whatsoever; this is a pure refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188573 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixed RuntimeDyldELF absolute relocations.
Richard Mitton [Fri, 16 Aug 2013 18:54:26 +0000 (18:54 +0000)]
Fixed RuntimeDyldELF absolute relocations.

If an ELF relocation is pointed at an absolute address, it will have a symbol ID of zero.
RuntimeDyldELF::processRelocationRef was not previously handling this case, and was instead trying to handle it as a section-relative fixup.

I think this is the right fix here, but my elf-fu is poor on some of the more exotic platforms, so I'd appreciate it if anyone with greater knowledge could verify this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188572 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTest commit.
Richard Mitton [Fri, 16 Aug 2013 18:09:06 +0000 (18:09 +0000)]
Test commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188568 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[tests] Another attempt to workaround broken misched-copy.s test on some buildbots.
Daniel Dunbar [Fri, 16 Aug 2013 18:01:18 +0000 (18:01 +0000)]
[tests] Another attempt to workaround broken misched-copy.s test on some buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188567 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSwitching to using a helper function instead of manually converting the string to...
Aaron Ballman [Fri, 16 Aug 2013 17:53:28 +0000 (17:53 +0000)]
Switching to using a helper function instead of manually converting the string to UTF-8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188566 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemoving unused functionality.
Aaron Ballman [Fri, 16 Aug 2013 17:33:57 +0000 (17:33 +0000)]
Removing unused functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188565 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFileCheck: Fix stray quote in CHECK-LABEL error message.
Stephen Lin [Fri, 16 Aug 2013 17:29:01 +0000 (17:29 +0000)]
FileCheck: Fix stray quote in CHECK-LABEL error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188564 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoInstCombine: Use isAllOnesValue() instead of explicit -1.
Jim Grosbach [Fri, 16 Aug 2013 17:03:36 +0000 (17:03 +0000)]
InstCombine: Use isAllOnesValue() instead of explicit -1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188563 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Add pattern for xor of i1
Michel Danzer [Fri, 16 Aug 2013 16:19:31 +0000 (16:19 +0000)]
R600/SI: Add pattern for xor of i1

Fixes two recent piglit regressions with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188559 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Fix broken encoding of DS_WRITE_B32
Michel Danzer [Fri, 16 Aug 2013 16:19:24 +0000 (16:19 +0000)]
R600/SI: Fix broken encoding of DS_WRITE_B32

The logic in SIInsertWaits::getHwCounts() only really made sense for SMRD
instructions, and trying to shoehorn it into handling DS_WRITE_B32 caused
it to corrupt the encoding of that by clobbering the first operand with
the second one.

Undo that damage and only apply the SMRD logic to that.

Fixes some derivates related piglit regressions with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188558 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReverted test commit (r188556)
Daniel Sanders [Fri, 16 Aug 2013 15:27:12 +0000 (15:27 +0000)]
Reverted test commit (r188556)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188557 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTest commit. Just a blank line
Daniel Sanders [Fri, 16 Aug 2013 15:26:36 +0000 (15:26 +0000)]
Test commit. Just a blank line

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188556 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Allocate memoperand in the MachienFunction so it doesn't leak.
Benjamin Kramer [Fri, 16 Aug 2013 14:48:09 +0000 (14:48 +0000)]
R600: Allocate memoperand in the MachienFunction so it doesn't leak.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188555 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUpdating function comments; no functional changes intended.
Aaron Ballman [Fri, 16 Aug 2013 14:33:07 +0000 (14:33 +0000)]
Updating function comments; no functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188554 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoWhen initializing the PIC global base register on ARM/ELF add pc to fix the address.
Benjamin Kramer [Fri, 16 Aug 2013 12:52:08 +0000 (12:52 +0000)]
When initializing the PIC global base register on ARM/ELF add pc to fix the address.

This unbreaks PIC with fast isel on ELF targets (PR16717). The output matches
what GCC and SDag do for PIC but may not cover all of the many flavors of PIC
that exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188551 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd support for Thumb2 literal loads with negative zero offset
Mihai Popa [Fri, 16 Aug 2013 12:03:00 +0000 (12:03 +0000)]
Add support for Thumb2 literal loads with negative zero offset

Thumb2 literal loads use an offset encoding which allows for
negative zero. This fixes parsing and encoding so that #-0
is correctly processed. The parser represents #-0 as INT32_MIN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188549 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix Thumb2 aliasing complementary instructions taking modified immediates
Mihai Popa [Fri, 16 Aug 2013 11:55:44 +0000 (11:55 +0000)]
Fix Thumb2 aliasing complementary instructions taking modified immediates

There are many Thumb instructions which take 12-bit immediates encoded in a special
8-byte value + 4-byte rotator form. Not all numbers are represented, and it's legal
to transform an assembly instruction to be able to encode the immediate.

For example: AND and BIC are complementary instructions; one can switch the AND
to a BIC as long as the immediate is complemented.

The intent is to switch one instruction into its complementary one when the immediate
cannot be encoded in the form requested in the original assembly and when the
complementary immediate is encodable.

The patch addresses two issues:
1. definition of t2SOImmNot immediate - it has to check that the orignal value is
not encoded naturally
2. t2AND and t2BIC instruction aliases which should use the Thumb2 SOImm operand
rather than the ARM one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188548 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Use SRST to implement strlen and strnlen
Richard Sandiford [Fri, 16 Aug 2013 11:41:43 +0000 (11:41 +0000)]
[SystemZ] Use SRST to implement strlen and strnlen

It would also make sense to use it for memchr; I'm working on that now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188547 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Use MVST to implement strcpy and stpcpy
Richard Sandiford [Fri, 16 Aug 2013 11:29:37 +0000 (11:29 +0000)]
[SystemZ] Use MVST to implement strcpy and stpcpy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188546 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Use CLST to implement strcmp
Richard Sandiford [Fri, 16 Aug 2013 11:21:54 +0000 (11:21 +0000)]
[SystemZ] Use CLST to implement strcmp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188544 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Fix handling of 64-bit memcmp results
Richard Sandiford [Fri, 16 Aug 2013 10:55:47 +0000 (10:55 +0000)]
[SystemZ] Fix handling of 64-bit memcmp results

Generalize r188163 to cope with return types other than MVT::i32, just
as the existing visitMemCmpCall code did.  I've split this out into a
subroutine so that it can be used for other upcoming patches.

I also noticed that I'd used the wrong API to record the out chain.
It's a load that uses DAG.getRoot() rather than getRoot(), so the out
chain should go on PendingLoads.  I don't have a testcase for that because
we don't do any interesting scheduling on z yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188540 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Fix sign of integer memcmp result
Richard Sandiford [Fri, 16 Aug 2013 10:22:54 +0000 (10:22 +0000)]
[SystemZ] Fix sign of integer memcmp result

r188163 used CLC to implement memcmp.  Code that compares the result
directly against zero can test the CC value produced by CLC, but code
that needs an integer result must use IPM.  The sequence I'd used was:

   ipm <reg>
   sll <reg>, 2
   sra <reg>, 30

but I'd forgotten that this inverts the order, so that CC==1 ("less")
becomes an integer greater than zero, and CC==2 ("greater") becomes
an integer less than zero.  This sequence should only be used if the
CLC arguments are reversed to compensate.  The problem then is that
the branch condition must also be reversed when testing the CLC
result directly.

Rather than do that, I went for a different sequence that works with
the natural CLC order:

   ipm <reg>
   srl <reg>, 28
   rll <reg>, <reg>, 31

One advantage of this is that it doesn't clobber CC.  A disadvantage
is that any sign extension to 64 bits must be done separately,
rather than being folded into the shifts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188538 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThis patch implements wait instruction for mips. Examples are added in test files.
Vladimir Medic [Fri, 16 Aug 2013 10:17:03 +0000 (10:17 +0000)]
This patch implements wait instruction for mips. Examples are added in test files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188537 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't use v16i32 for load pattern matching. All 512-bit loads are cated to v8i64.
Craig Topper [Fri, 16 Aug 2013 06:07:34 +0000 (06:07 +0000)]
Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8i64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188534 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRe-disabling C4291 warnings for MSVC because AttributeList.h requires it. This was...
Aaron Ballman [Fri, 16 Aug 2013 03:06:38 +0000 (03:06 +0000)]
Re-disabling C4291 warnings for MSVC because AttributeList.h requires it.  This was accidentally removed in r187279.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188530 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd missing test for GEP + bitcast transformation
Matt Arsenault [Fri, 16 Aug 2013 02:59:17 +0000 (02:59 +0000)]
Add missing test for GEP + bitcast transformation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188529 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCalling the base class constructor from the derived class' initializer list. This...
Aaron Ballman [Fri, 16 Aug 2013 02:56:43 +0000 (02:56 +0000)]
Calling the base class constructor from the derived class' initializer list.  This matches DenseMap's behavior, and silences some warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188528 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[tests] Add a hack to eliminate some dangling .s files on buildbots.
Daniel Dunbar [Fri, 16 Aug 2013 02:54:00 +0000 (02:54 +0000)]
[tests] Add a hack to eliminate some dangling .s files on buildbots.

 - Benjamin fixed the emission of this file in r179937, but it still lives on a
   few buildbots. We should probably clean up the build dirs once in a while,
   eh?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188527 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[tests] Remove an out-dated failing test.
Daniel Dunbar [Fri, 16 Aug 2013 02:53:29 +0000 (02:53 +0000)]
[tests] Remove an out-dated failing test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188526 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemoving a spurious semi-colon; this macro expands into a namespace.
Aaron Ballman [Fri, 16 Aug 2013 01:53:58 +0000 (01:53 +0000)]
Removing a spurious semi-colon; this macro expands into a namespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188525 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixing a warning about control reaching the end of a non-void function.
Aaron Ballman [Fri, 16 Aug 2013 01:43:31 +0000 (01:43 +0000)]
Fixing a warning about control reaching the end of a non-void function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188524 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"
Tom Stellard [Fri, 16 Aug 2013 01:18:43 +0000 (01:18 +0000)]
Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"

This reverts commit a6a39ced095c2f453624ce62c4aead25db41a18f.
This is the wrong version of this fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188523 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions
Tom Stellard [Fri, 16 Aug 2013 01:12:20 +0000 (01:12 +0000)]
R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions

The SIInsertWaits pass was overwriting the first operand (gds bit) of
DS_WRITE_B32 with the second operand (value to write).  This meant that
any time the value to write was stored in an odd number VGPR, the gds
bit would be set causing the instruction to write to GDS instead of LDS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188522 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add support for global vector loads with element types less than 32-bits
Tom Stellard [Fri, 16 Aug 2013 01:12:16 +0000 (01:12 +0000)]
R600: Add support for global vector loads with element types less than 32-bits

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188521 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add support for global vector stores with elements less than 32-bits
Tom Stellard [Fri, 16 Aug 2013 01:12:11 +0000 (01:12 +0000)]
R600: Add support for global vector stores with elements less than 32-bits

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188520 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add support for i16 and i8 global stores
Tom Stellard [Fri, 16 Aug 2013 01:12:06 +0000 (01:12 +0000)]
R600: Add support for i16 and i8 global stores

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188519 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add support for v4i32 stores on Cayman
Tom Stellard [Fri, 16 Aug 2013 01:12:00 +0000 (01:12 +0000)]
R600: Add support for v4i32 stores on Cayman

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188518 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Enable folding of inline literals into REQ_SEQUENCE instructions
Tom Stellard [Fri, 16 Aug 2013 01:11:55 +0000 (01:11 +0000)]
R600: Enable folding of inline literals into REQ_SEQUENCE instructions

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188517 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add IsExport bit to TableGen instruction definitions
Tom Stellard [Fri, 16 Aug 2013 01:11:51 +0000 (01:11 +0000)]
R600: Add IsExport bit to TableGen instruction definitions

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188516 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Change the RAT instruction assembly names so they match the docs
Tom Stellard [Fri, 16 Aug 2013 01:11:46 +0000 (01:11 +0000)]
R600: Change the RAT instruction assembly names so they match the docs

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188515 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[tests] Cleanup initialization of test suffixes.
Daniel Dunbar [Fri, 16 Aug 2013 00:37:11 +0000 (00:37 +0000)]
[tests] Cleanup initialization of test suffixes.

 - Instead of setting the suffixes in a bunch of places, just set one master
   list in the top-level config. We now only modify the suffix list in a few
   suites that have one particular unique suffix (.ml, .mc, .yaml, .td, .py).

 - Aside from removing the need for a bunch of lit.local.cfg files, this enables
   4 tests that were inadvertently being skipped (one in
   Transforms/BranchFolding, a .s file each in DebugInfo/AArch64 and
   CodeGen/PowerPC, and one in CodeGen/SI which is now failing and has been
   XFAILED).

 - This commit also fixes a bunch of config files to use config.root instead of
   older copy-pasted code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188513 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoInstCombine: Simplify if(x!=0 && x!=-1).
Jim Grosbach [Fri, 16 Aug 2013 00:15:20 +0000 (00:15 +0000)]
InstCombine: Simplify if(x!=0 && x!=-1).

When both constants are positive or both constants are negative,
InstCombine already simplifies comparisons like this, but when
it's exactly zero and -1, the operand sorting ends up reversed
and the pattern fails to match. Handle that special case.

Follow up for rdar://14689217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188512 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCMake: polish the Windows packaging rules
Hans Wennborg [Thu, 15 Aug 2013 23:44:31 +0000 (23:44 +0000)]
CMake: polish the Windows packaging rules

This tweaks the CMake rules for building an installation package on Windows:
 - Sets license file (otherwise nsis shows an ugly default)
 - Adds LLVM logo
 - Shows "do you want to add this to the system path" dialog.

Differential Revision: http://llvm-reviews.chandlerc.com/D1414

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188509 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTighten up the yamilizer so it stops eliding empty sequences if the embedded empty...
Aaron Ballman [Thu, 15 Aug 2013 23:17:53 +0000 (23:17 +0000)]
Tighten up the yamilizer so it stops eliding empty sequences if the embedded empty sequence is the first key/value in a map which is itself in a sequence.

Patch with help from Nick Kledzik.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188508 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't do FoldCmpLoadFromIndexedGlobal for non inbounds GEPs
Matt Arsenault [Thu, 15 Aug 2013 23:11:07 +0000 (23:11 +0000)]
Don't do FoldCmpLoadFromIndexedGlobal for non inbounds GEPs

This path wasn't tested before without a datalayout,
so add some more tests and re-run with and without one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188507 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix spelling
Matt Arsenault [Thu, 15 Aug 2013 23:11:03 +0000 (23:11 +0000)]
Fix spelling

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188506 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove empty directory.
Daniel Dunbar [Thu, 15 Aug 2013 22:53:10 +0000 (22:53 +0000)]
Remove empty directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188504 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[tests] Fix refacto in r187764 that effectively disabled SimplifyCFG tests. :(
Daniel Dunbar [Thu, 15 Aug 2013 22:52:27 +0000 (22:52 +0000)]
[tests] Fix refacto in r187764 that effectively disabled SimplifyCFG tests. :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188503 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[lit] Remove some done TODOs.
Daniel Dunbar [Thu, 15 Aug 2013 22:52:20 +0000 (22:52 +0000)]
[lit] Remove some done TODOs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188502 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSupport X86_64_GOTLoad relocations in RuntimeDyldMachO by treating them the
Lang Hames [Thu, 15 Aug 2013 22:31:40 +0000 (22:31 +0000)]
Support X86_64_GOTLoad relocations in RuntimeDyldMachO by treating them the
same way as X86_64_GOT relocations. The 'Load' part of GOTLoad is just an
optimization hint for the linker anyway, and can be safely ignored.

This patch also fixes some minor issues with the relocations introduced while
processing an X86_64_GOT[Load]: the addend for the GOT entry should always be
zero, and the addend for the replacement relocation at the original offset
should be the same as the addend of the relocation being replaced.

I haven't come up with a good way of testing this yet, but I'm working on it.

This fixes <rdar://problem/14651564>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188499 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixing a corner-case bug in strchr and strrchr lib call optimizations where
Yunzhong Gao [Thu, 15 Aug 2013 20:58:59 +0000 (20:58 +0000)]
Fixing a corner-case bug in strchr and strrchr lib call optimizations where
the input character is not converted to char before comparing with zero.

The patch was discussed in this thread:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130812/184069.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188489 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agomake arm-use-movt available for all ARM
Renato Golin [Thu, 15 Aug 2013 20:54:38 +0000 (20:54 +0000)]
make arm-use-movt available for all ARM

Before this patch this flag is IOS specific, but is also
useful for bare project like bootloaders / kernels etc,
since movw / movt prevents simple relocation. Therefore
make this flag more commonly available.

note: this patch depends on a similiar rename in clang

Patch by Jeroen Hofstee.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188487 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agomake arm-reserve-r9 available for all ARM
Renato Golin [Thu, 15 Aug 2013 20:45:13 +0000 (20:45 +0000)]
make arm-reserve-r9 available for all ARM

r9 is defined as a platform-specific register in the ARM EABI.
It can be reserved for a special purpose or be used as a general
purpose register. Add support for reserving r9 for all ARM, while
leaving the IOS usage unchanged.

Patch by Jeroen Hofstee.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188485 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake a few more things const.
Bill Wendling [Thu, 15 Aug 2013 20:25:44 +0000 (20:25 +0000)]
Make a few more things const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188484 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse a reference instead of making an unnecessary copy. Also use 'const'.
Bill Wendling [Thu, 15 Aug 2013 20:21:49 +0000 (20:21 +0000)]
Use a reference instead of making an unnecessary copy. Also use 'const'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188483 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDataFlowSanitizer: Add a debugging feature to help us track nonzero labels.
Peter Collingbourne [Thu, 15 Aug 2013 18:51:12 +0000 (18:51 +0000)]
DataFlowSanitizer: Add a debugging feature to help us track nonzero labels.

Summary:
When the -dfsan-debug-nonzero-labels parameter is supplied, the code
is instrumented such that when a call parameter, return value or load
produces a nonzero label, the function __dfsan_nonzero_label is called.
The idea is that a debugger breakpoint can be set on this function
in a nominally label-free program to help identify any bugs in the
instrumentation pass causing labels to be introduced.

Reviewers: eugenis

CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1405

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188472 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConstify the function parameters.
Bill Wendling [Thu, 15 Aug 2013 18:46:14 +0000 (18:46 +0000)]
Constify the function parameters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188469 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDrive-by fix for a doxygen comment in MachineInstr.h.
Joey Gouly [Thu, 15 Aug 2013 16:02:44 +0000 (16:02 +0000)]
Drive-by fix for a doxygen comment in MachineInstr.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188467 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThis fixes three issues related to Thumb literal loads:
Mihai Popa [Thu, 15 Aug 2013 15:43:06 +0000 (15:43 +0000)]
This fixes three issues related to Thumb literal loads:

1. The offset range for Thumb1 PC relative loads is [0..1020] and not [-1024..1020]
2. Thumb2 PC relative loads may define the PC, so the restriction placed on target register is removed
3. Removes unneeded alias between "ldr.n" and t1LDRpci. ".n" is actually stripped by both tablegen
and the ASM parser, so this alias rule really does nothing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188466 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Mips][msa] Added the simple builtins (madd_q to xori)
Jack Carter [Thu, 15 Aug 2013 14:22:07 +0000 (14:22 +0000)]
[Mips][msa] Added the simple builtins (madd_q to xori)

Includes:
madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su],
msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev,
pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al],
sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori

Patch by Daniel Sanders

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188460 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Mips][msa] Added the simple builtins (fadd to ftq)
Jack Carter [Thu, 15 Aug 2013 13:45:36 +0000 (13:45 +0000)]
[Mips][msa] Added the simple builtins (fadd to ftq)

Includes:
fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2,
fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin,
fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt,
fsne, fsqr, fsub, ftint_s, ftq

Patch by Daniel Sanders

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188458 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)
Jack Carter [Thu, 15 Aug 2013 12:24:57 +0000 (12:24 +0000)]
[Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)

Includes:
add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd],
bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti,
c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su],
dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve,
ldi

Patch by Daniel Sanders

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188457 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r188449 as it turns out we're just missing the instructions that need the...
Craig Topper [Thu, 15 Aug 2013 08:38:25 +0000 (08:38 +0000)]
Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188454 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoClang and AArch64 backend patches to support shll/shl and vmovl instructions and...
Hao Liu [Thu, 15 Aug 2013 08:26:11 +0000 (08:26 +0000)]
Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188451 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type. Remove...
Craig Topper [Thu, 15 Aug 2013 07:30:51 +0000 (07:30 +0000)]
Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type. Remove 128-bit vector handling from isPermImmMask too, it's covered by isPSHUFDMask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188449 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTentative fix for global-buffer-overflow caused by r188426. Found by AddressSanitizer
Alexey Samsonov [Thu, 15 Aug 2013 07:11:34 +0000 (07:11 +0000)]
Tentative fix for global-buffer-overflow caused by r188426. Found by AddressSanitizer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188448 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse MVT instead of EVT in X86ISelDAGToDAG since all the types should be legal.
Craig Topper [Thu, 15 Aug 2013 05:57:07 +0000 (05:57 +0000)]
Use MVT instead of EVT in X86ISelDAGToDAG since all the types should be legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188446 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse MVT in place of EVT in more X86 operation lowering functions.
Craig Topper [Thu, 15 Aug 2013 05:33:45 +0000 (05:33 +0000)]
Use MVT in place of EVT in more X86 operation lowering functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188445 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixed typo in CMakeLists.txt.
Michael Gottesman [Thu, 15 Aug 2013 04:16:12 +0000 (04:16 +0000)]
Fixed typo in CMakeLists.txt.

We were marking both LLVMBUILDOUTPUT and LLVMBUILDERRORS as
ERROR_VARIABLES when clearly LLVMBUILDOUTPUT should be marked as
OUTPUT_VARIABLE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188444 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReplace getValueType().getSimpleVT() with getSimpleValueType().
Craig Topper [Thu, 15 Aug 2013 02:44:19 +0000 (02:44 +0000)]
Replace getValueType().getSimpleVT() with getSimpleValueType().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188442 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReplace getValueType().getSimpleVT() with getSimpleValueType(). Also remove one weird...
Craig Topper [Thu, 15 Aug 2013 02:33:50 +0000 (02:33 +0000)]
Replace getValueType().getSimpleVT() with getSimpleValueType(). Also remove one weird cast from MVT->EVT just to call getSimpleVT().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188441 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAuto-compute live intervals on demand.
Mark Lacey [Wed, 14 Aug 2013 23:50:16 +0000 (23:50 +0000)]
Auto-compute live intervals on demand.

When new virtual registers are created during splitting/spilling, defer
creation of the live interval until we need to use the live interval.

Along with the recent commits to notify LiveRangeEdit when new virtual
registers are created, this makes it possible for functions like
TargetInstrInfo::loadRegFromStackSlot() and
TargetInstrInfo::storeRegToStackSlot() to create multiple virtual
registers as part of the process of generating loads/stores for
different register classes, and then have the live intervals for those
new registers computed when they are needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188437 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd the MachineInstrSpan class.
Mark Lacey [Wed, 14 Aug 2013 23:50:11 +0000 (23:50 +0000)]
Add the MachineInstrSpan class.

MachineInstrSpan is initialized with a MachineBasicBlock::iterator,
and is intended to track which instructions are inserted before/after
that instruction from the time the MachineInstrSpan is created.

It provides a begin()/end() interface to walk the range of
instructions inserted around the initial instruction (including that
initial instruction).

It also provides a getInitial() interface to return the initial
iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188436 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoNotify LiveRangeEdit of new virtual registers.
Mark Lacey [Wed, 14 Aug 2013 23:50:09 +0000 (23:50 +0000)]
Notify LiveRangeEdit of new virtual registers.

Add a delegate class to MachineRegisterInfo with a single virtual
function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit
from this delegate class and override the definition of the callback
with an implementation that tracks the newly created virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188435 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTrack new virtual registers by register number.
Mark Lacey [Wed, 14 Aug 2013 23:50:04 +0000 (23:50 +0000)]
Track new virtual registers by register number.

Track new virtual registers by register number, rather than by the live
interval created for them. This is the first step in separating the
creation of new virtual registers and new live intervals.  Eventually
live intervals will be created and populated on demand after the virtual
registers have been created and used in instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188434 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Improve legalization of vector operations
Tom Stellard [Wed, 14 Aug 2013 23:25:00 +0000 (23:25 +0000)]
R600/SI: Improve legalization of vector operations

This should fix hangs in the OpenCL piglit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188431 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
Tom Stellard [Wed, 14 Aug 2013 23:24:53 +0000 (23:24 +0000)]
R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188430 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Convert v16i8 resource descriptors to i128
Tom Stellard [Wed, 14 Aug 2013 23:24:45 +0000 (23:24 +0000)]
R600/SI: Convert v16i8 resource descriptors to i128

Now that compute support is better on SI, we can't continue using v16i8
for descriptors since this is also a legal type in OpenCL.

This patch fixes numerous hangs with the piglit OpenCL test and since
we now use a target specific DAG node for LOAD_CONSTANT with the
correct MemOperandFlags, this should also fix:

https://bugs.freedesktop.org/show_bug.cgi?id=66805

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188429 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Use i8 types for resource descriptors in tests
Tom Stellard [Wed, 14 Aug 2013 23:24:37 +0000 (23:24 +0000)]
R600/SI: Use i8 types for resource descriptors in tests

We switched from i32 to i8 types a while ago and the tests were never
updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188428 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
Tom Stellard [Wed, 14 Aug 2013 23:24:32 +0000 (23:24 +0000)]
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2

Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG
instructions should make it easier for the register allocator to coalasce
unnecessary copies.

v2:
  - Use an SGPR register class if all the operands of BUILD_VECTOR are
    SGPRs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188427 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Choose the correct MOV instruction for copying immediates
Tom Stellard [Wed, 14 Aug 2013 23:24:24 +0000 (23:24 +0000)]
R600/SI: Choose the correct MOV instruction for copying immediates

The instruction selector will now try to infer the destination register
so it can decided whether to use V_MOV_B32 or S_MOV_B32 when copying
immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188426 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Assign a register class to the $vaddr operand for MIMG instructions
Tom Stellard [Wed, 14 Aug 2013 23:24:17 +0000 (23:24 +0000)]
R600/SI: Assign a register class to the $vaddr operand for MIMG instructions

The previous code declared the operand as unknown:$vaddr, which made
it possible for scalar registers to be used instead of vector registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188425 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[llvm-build] Make Py3 compatible.
Daniel Dunbar [Wed, 14 Aug 2013 23:15:39 +0000 (23:15 +0000)]
[llvm-build] Make Py3 compatible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188424 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDataFlowSanitizer: move abilist input file to Inputs.
Peter Collingbourne [Wed, 14 Aug 2013 22:28:36 +0000 (22:28 +0000)]
DataFlowSanitizer: move abilist input file to Inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188423 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebugInfo: Prefer references over pointers, pass by const reference for a type that...
David Blaikie [Wed, 14 Aug 2013 22:23:05 +0000 (22:23 +0000)]
DebugInfo: Prefer references over pointers, pass by const reference for a type that will grow in the future

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188422 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Handle MSAA texture targets
Tom Stellard [Wed, 14 Aug 2013 22:22:14 +0000 (22:22 +0000)]
R600/SI: Handle MSAA texture targets

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188421 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Allow conversion between v32i8 and v8i32
Tom Stellard [Wed, 14 Aug 2013 22:22:09 +0000 (22:22 +0000)]
R600/SI: Allow conversion between v32i8 and v8i32

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188420 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Fix an obvious typo
Tom Stellard [Wed, 14 Aug 2013 22:22:03 +0000 (22:22 +0000)]
R600/SI: Fix an obvious typo

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188419 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Add pattern for fp_to_uint
Tom Stellard [Wed, 14 Aug 2013 22:21:57 +0000 (22:21 +0000)]
R600/SI: Add pattern for fp_to_uint

This fixes the F2U opcode for the Mesa driver.

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188418 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[lit] Add test coverage of gtest format.
Daniel Dunbar [Wed, 14 Aug 2013 22:21:11 +0000 (22:21 +0000)]
[lit] Add test coverage of gtest format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188417 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[lit] Ensure test output is converted to strings where possible.
Daniel Dunbar [Wed, 14 Aug 2013 22:21:01 +0000 (22:21 +0000)]
[lit] Ensure test output is converted to strings where possible.

 - This cleans up the text output of failing tests when run under PY3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188416 91177308-0d34-0410-b5e6-96231b3b80d8