Add support for Thumb2 literal loads with negative zero offset
authorMihai Popa <mihail.popa@gmail.com>
Fri, 16 Aug 2013 12:03:00 +0000 (12:03 +0000)
committerMihai Popa <mihail.popa@gmail.com>
Fri, 16 Aug 2013 12:03:00 +0000 (12:03 +0000)
Thumb2 literal loads use an offset encoding which allows for
negative zero. This fixes parsing and encoding so that #-0
is correctly processed. The parser represents #-0 as INT32_MIN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188549 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/AsmParser/ARMAsmParser.cpp
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
test/MC/ARM/basic-thumb2-instructions.s

index d48ece1adbee96b2a8e5f5c1af12e02249fa2336..df9306a9b9988cbcb4c36f41661cd542e8dabc2e 100644 (file)
@@ -1793,8 +1793,6 @@ public:
   void addMemPCRelImm12Operands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
     int32_t Imm = Memory.OffsetImm->getValue();
-    // FIXME: Handle #-0
-    if (Imm == INT32_MIN) Imm = 0;
     Inst.addOperand(MCOperand::CreateImm(Imm));
   }
 
index c0c21d3c8572fda4bdafa3c72c33cccf8a6533c3..a247b0216b43984de2c51fe15e8319c63185a123 100644 (file)
@@ -778,8 +778,10 @@ getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
     } else {
       Reg = ARM::PC;
       int32_t Offset = MO.getImm();
-      // FIXME: Handle #-0.
-      if (Offset < 0) {
+      if (Offset == INT32_MIN) {
+        Offset = 0;
+        isAdd = false;
+      } else if (Offset < 0) {
         Offset *= -1;
         isAdd = false;
       }
index 86f37b8348690ecfef6babd984401436b678b444..a7f9ac68b773049ebe4266021f2898fa40f5a80e 100644 (file)
@@ -830,6 +830,18 @@ _func:
 @ CHECK: ldr.w pc, [pc, #256]          @ encoding: [0xdf,0xf8,0x00,0xf1]
 @ CHECK: ldr.w pc, [pc, #-400]         @ encoding: [0x5f,0xf8,0x90,0xf1]
 
+        ldrb  r9, [pc, #-0]
+        ldrsb r11, [pc, #-0]
+        ldrh  r10, [pc, #-0]
+        ldrsh r1, [pc, #-0]
+        ldr   r5, [pc, #-0]
+
+@ CHECK: ldrb.w        r9, [pc, #-0]           @ encoding: [0x1f,0xf8,0x00,0x90]
+@ CHECK: ldrsb.w       r11, [pc, #-0]        @ encoding: [0x1f,0xf9,0x00,0xb0]
+@ CHECK: ldrh.w        r10, [pc, #-0]          @ encoding: [0x3f,0xf8,0x00,0xa0]
+@ CHECK: ldrsh.w       r1, [pc, #-0]         @ encoding: [0x3f,0xf9,0x00,0x10]
+@ CHECK: ldr.w r5, [pc, #-0]           @ encoding: [0x5f,0xf8,0x00,0x50]
+
 @------------------------------------------------------------------------------
 @ LDR(register)
 @------------------------------------------------------------------------------