oota-llvm.git
14 years agoSwitch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums
Jakob Stoklund Olesen [Mon, 24 May 2010 16:54:32 +0000 (16:54 +0000)]
Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums
from ARMRegisterInfo.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104508 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRename X86 subregister indices to something shorter.
Jakob Stoklund Olesen [Mon, 24 May 2010 14:48:17 +0000 (14:48 +0000)]
Rename X86 subregister indices to something shorter.
Use the tablegen-produced enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104493 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd the SubRegIndex TableGen class.
Jakob Stoklund Olesen [Mon, 24 May 2010 14:48:12 +0000 (14:48 +0000)]
Add the SubRegIndex TableGen class.

This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104492 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoEncode the Caml frametable by following what the comment says: the number of descriptors
Nicolas Geoffray [Mon, 24 May 2010 12:24:11 +0000 (12:24 +0000)]
Encode the Caml frametable by following what the comment says: the number of descriptors
is first emitted, and StackOffsets are emitted in 16 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104488 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoApply timeouts and memory limits in more places. In particular, when
Duncan Sands [Mon, 24 May 2010 07:49:55 +0000 (07:49 +0000)]
Apply timeouts and memory limits in more places.  In particular, when
bugpoint does "Running the code generator to test for a crash" this
gets you a crash if llc goes into an infinite loop or uses up vast
amounts of memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104485 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agollvm-mc: Use EmitIntValue where possible, which makes the API calls from the AsmParse...
Daniel Dunbar [Sun, 23 May 2010 18:36:38 +0000 (18:36 +0000)]
llvm-mc: Use EmitIntValue where possible, which makes the API calls from the AsmParser and CodeGen line up better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104467 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agollvm-mc: Use AddBlankLine in asm parser. This makes transliteration match the input...
Daniel Dunbar [Sun, 23 May 2010 18:36:34 +0000 (18:36 +0000)]
llvm-mc: Use AddBlankLine in asm parser. This makes transliteration match the input much more closely, and also makes the API calls from the AsmParser and CodeGen line up better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104466 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.
Daniel Dunbar [Sun, 23 May 2010 17:44:06 +0000 (17:44 +0000)]
MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104463 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoVDUP doesn't support vectors with 64-bit elements.
Bob Wilson [Sun, 23 May 2010 05:42:31 +0000 (05:42 +0000)]
VDUP doesn't support vectors with 64-bit elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104455 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Subdivide immediates a bit more, so that we properly recognize immediates...
Daniel Dunbar [Sat, 22 May 2010 21:02:33 +0000 (21:02 +0000)]
MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
  addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agotblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead...
Daniel Dunbar [Sat, 22 May 2010 21:02:29 +0000 (21:02 +0000)]
tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Add alias for setz, setnz, jz, jnz.
Daniel Dunbar [Sat, 22 May 2010 06:37:33 +0000 (06:37 +0000)]
MC/X86: Add alias for setz, setnz, jz, jnz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTrivial change to dump() function for SparseBitVector
John Mosby [Sat, 22 May 2010 05:13:17 +0000 (05:13 +0000)]
Trivial change to dump() function for SparseBitVector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104433 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoImplement @llvm.returnaddress. rdar://8015977.
Evan Cheng [Sat, 22 May 2010 01:47:14 +0000 (01:47 +0000)]
Implement @llvm.returnaddress. rdar://8015977.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoImplement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
Jim Grosbach [Sat, 22 May 2010 01:06:18 +0000 (01:06 +0000)]
Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoThis test is darwin only. Make it so(tm).
Eric Christopher [Sat, 22 May 2010 00:55:55 +0000 (00:55 +0000)]
This test is darwin only.  Make it so(tm).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104418 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRecognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by
Bob Wilson [Sat, 22 May 2010 00:23:12 +0000 (00:23 +0000)]
Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by
copying VFP subregs.  This exposed a bunch of dead code in the *spill-q.ll
tests, so I tweaked those tests to keep that code from being optimized away.
Radar 7872877.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104415 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd full bss data support for darwin tls variables.
Eric Christopher [Sat, 22 May 2010 00:10:22 +0000 (00:10 +0000)]
Add full bss data support for darwin tls variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104414 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoCollect variable information during endFunction() instead of beginFunction().
Devang Patel [Sat, 22 May 2010 00:04:14 +0000 (00:04 +0000)]
Collect variable information during endFunction() instead of beginFunction().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104412 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd a new section and accessor for TLS data.
Eric Christopher [Sat, 22 May 2010 00:00:58 +0000 (00:00 +0000)]
Add a new section and accessor for TLS data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104411 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoClean up extra whitespace.
Bob Wilson [Fri, 21 May 2010 23:53:55 +0000 (23:53 +0000)]
Clean up extra whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMake this LookAheadLimit, not the uninitialized LookAheadLeft.
Eric Christopher [Fri, 21 May 2010 23:40:03 +0000 (23:40 +0000)]
Make this LookAheadLimit, not the uninitialized LookAheadLeft.

Evan please verify!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104408 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoadd a note
Chris Lattner [Fri, 21 May 2010 23:16:21 +0000 (23:16 +0000)]
add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104404 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoExpand on comment.
Eric Christopher [Fri, 21 May 2010 23:03:53 +0000 (23:03 +0000)]
Expand on comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104396 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdded retl for 32-bit x86 and added retq for 64-bit x86.
Kevin Enderby [Fri, 21 May 2010 23:01:38 +0000 (23:01 +0000)]
Added retl for 32-bit x86 and added retq for 64-bit x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix comment and whitespace.
Eric Christopher [Fri, 21 May 2010 22:39:11 +0000 (22:39 +0000)]
Fix comment and whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104392 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoexpand on the llvm ir bitcode dox. Patch by Peter Housel!
Chris Lattner [Fri, 21 May 2010 22:20:54 +0000 (22:20 +0000)]
expand on the llvm ir bitcode dox.  Patch by Peter Housel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104391 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAllow machine cse to cse instructions which define physical registers. Controlled...
Evan Cheng [Fri, 21 May 2010 21:22:19 +0000 (21:22 +0000)]
Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104385 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix section attribute name.
Eric Christopher [Fri, 21 May 2010 21:08:52 +0000 (21:08 +0000)]
Fix section attribute name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104381 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoChange CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
Bob Wilson [Fri, 21 May 2010 21:05:32 +0000 (21:05 +0000)]
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8

14 years ago- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
Evan Cheng [Fri, 21 May 2010 20:53:24 +0000 (20:53 +0000)]
- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd MachineInstr::readsWritesVirtualRegister() to determine if an instruction
Jakob Stoklund Olesen [Fri, 21 May 2010 20:02:01 +0000 (20:02 +0000)]
Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction
reads or writes a register.

This takes partial redefines and undef uses into account.

Don't actually use it yet. That caused miscompiles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSimplify
Devang Patel [Fri, 21 May 2010 18:49:09 +0000 (18:49 +0000)]
Simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104338 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoPrevious commit message should refer to 104308.
Dale Johannesen [Fri, 21 May 2010 18:44:47 +0000 (18:44 +0000)]
Previous commit message should refer to 104308.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104337 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix two bugs in 104348:
Dale Johannesen [Fri, 21 May 2010 18:40:15 +0000 (18:40 +0000)]
Fix two bugs in 104348:
Case where MMX is disabled wasn't handled right.
MMX->MMX bitconverts are Legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104336 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoadded an assertion to MCObjectWriter::WriteBytes to catch misuse of the ZeroFillSize...
Nathan Jeffords [Fri, 21 May 2010 18:23:56 +0000 (18:23 +0000)]
added an assertion to MCObjectWriter::WriteBytes to catch misuse of the ZeroFillSize parameter

If the size of the string is greater than the zero fill size, the function will attempt to write a very large string of zeros to the object file (~4GB on 32 bit platforms). This assertion will catch the scenario and crash the program before the write occurs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104334 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agonow that fp reg kill insertion stuff happens as a separate
Chris Lattner [Fri, 21 May 2010 18:17:54 +0000 (18:17 +0000)]
now that fp reg kill insertion stuff happens as a separate
pass after isel instead of being interlaced with it, we can
trust that all the code for a function has been isel'd before
it is run.

The practical impact of this is that we can scan for machine
instr phis instead of doing a fuzzy match on the LLVM BB for
phi nodes.  Doing the fuzzy match required knowing when isel
would produce an fp reg stack phi which was gross.  It was
also wrong in cases where select got lowered to a branch
tree because cmovs aren't available (PR6828).

Just do the scan on machine phis which is simpler, faster
and more correct.  This fixes PR6828.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104333 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoUse less evil form of switch stmt.
Chris Lattner [Fri, 21 May 2010 18:02:42 +0000 (18:02 +0000)]
Use less evil form of switch stmt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104331 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agouse continue to reduce nesting.
Chris Lattner [Fri, 21 May 2010 18:01:24 +0000 (18:01 +0000)]
use continue to reduce nesting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104330 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agopull a nested loop of this pass out to its own function,
Chris Lattner [Fri, 21 May 2010 17:57:03 +0000 (17:57 +0000)]
pull a nested loop of this pass out to its own function,
eliminating the gymnastics around the ContainsFPCode var.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104328 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agomodernize this pass a bit, fit in 80 columns.
Chris Lattner [Fri, 21 May 2010 17:49:07 +0000 (17:49 +0000)]
modernize this pass a bit, fit in 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104326 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoconstify accessor.
Chris Lattner [Fri, 21 May 2010 17:47:50 +0000 (17:47 +0000)]
constify accessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRevert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is...
Jakob Stoklund Olesen [Fri, 21 May 2010 17:36:32 +0000 (17:36 +0000)]
Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read."

This reverts r104322. I think it was causing miscompilations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoUse MachineInstr::readsWritesVirtualRegister to determine if a register is read.
Jakob Stoklund Olesen [Fri, 21 May 2010 16:42:30 +0000 (16:42 +0000)]
Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.
This correctly handles partial redefines and undef uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTeach VirtRegRewriter to handle spilling in instructions that have multiple
Jakob Stoklund Olesen [Fri, 21 May 2010 16:36:13 +0000 (16:36 +0000)]
Teach VirtRegRewriter to handle spilling in instructions that have multiple
definitions of the virtual register.

This happens when spilling the registers produced by REG_SEQUENCE:

%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0

The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104321 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoIf the first definition of a virtual register is a partial redef, add an
Jakob Stoklund Olesen [Fri, 21 May 2010 16:32:16 +0000 (16:32 +0000)]
If the first definition of a virtual register is a partial redef, add an
<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104320 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoCurrently, createMachOStreamer() is invoked directly in llvm-mc which
Matt Fleming [Fri, 21 May 2010 12:54:43 +0000 (12:54 +0000)]
Currently, createMachOStreamer() is invoked directly in llvm-mc which
isn't ideal if we want to be able to use another object file format.

Add a createObjectStreamer() factory method so that the correct object
file streamer can be instantiated for a given target triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104318 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSplit out the x86_32 an x86_64 ELF backends as they handle ELF
Matt Fleming [Fri, 21 May 2010 11:39:07 +0000 (11:39 +0000)]
Split out the x86_32 an x86_64 ELF backends as they handle ELF
differently. This will make adding ELF support easier in the long run.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104317 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd support for parsing the ELF .type assembler directive.
Matt Fleming [Fri, 21 May 2010 11:36:59 +0000 (11:36 +0000)]
Add support for parsing the ELF .type assembler directive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104316 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRemoved scaleNumbering method declaration from LiveInterval (not defined, not used).
Lang Hames [Fri, 21 May 2010 03:04:04 +0000 (03:04 +0000)]
Removed scaleNumbering method declaration from LiveInterval (not defined, not used).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104311 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix i64->f64 conversion, x86-64, -no-sse. A bit
Dale Johannesen [Fri, 21 May 2010 00:52:33 +0000 (00:52 +0000)]
Fix i64->f64 conversion, x86-64, -no-sse.  A bit
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104308 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoChange ARM scheduling default to list-hybrid if the target supports floating point...
Evan Cheng [Fri, 21 May 2010 00:43:17 +0000 (00:43 +0000)]
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104307 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.
Evan Cheng [Fri, 21 May 2010 00:42:32 +0000 (00:42 +0000)]
Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104306 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRemove dead option.
Daniel Dunbar [Fri, 21 May 2010 00:27:55 +0000 (00:27 +0000)]
Remove dead option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104303 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSimplify.
Devang Patel [Fri, 21 May 2010 00:10:20 +0000 (00:10 +0000)]
Simplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104302 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix __crashreport_info__ declaration.
Daniel Dunbar [Thu, 20 May 2010 23:50:19 +0000 (23:50 +0000)]
Fix __crashreport_info__ declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104300 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAllow targets more controls on what nodes are scheduled by reg pressure, what for...
Evan Cheng [Thu, 20 May 2010 23:26:43 +0000 (23:26 +0000)]
Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoDominatorTree.getNode can return null for unreachable blocks.
Dan Gohman [Thu, 20 May 2010 22:46:54 +0000 (22:46 +0000)]
DominatorTree.getNode can return null for unreachable blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104290 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMinor code cleanups.
Dan Gohman [Thu, 20 May 2010 22:25:20 +0000 (22:25 +0000)]
Minor code cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104287 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoPrint a space after the colon.
Mikhail Glushenkov [Thu, 20 May 2010 21:11:37 +0000 (21:11 +0000)]
Print a space after the colon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104279 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMake Solve check its own post-condition, to reduce clutter in the
Dan Gohman [Thu, 20 May 2010 20:59:23 +0000 (20:59 +0000)]
Make Solve check its own post-condition, to reduce clutter in the
top-level LSRInstance logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104278 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd comments.
Dan Gohman [Thu, 20 May 2010 20:52:00 +0000 (20:52 +0000)]
Add comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104276 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.
Daniel Dunbar [Thu, 20 May 2010 20:36:29 +0000 (20:36 +0000)]
MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104275 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRename variable. add comment.
Devang Patel [Thu, 20 May 2010 20:35:24 +0000 (20:35 +0000)]
Rename variable. add comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104274 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMore code cleanups. Use iterators instead of indices when indices
Dan Gohman [Thu, 20 May 2010 20:33:18 +0000 (20:33 +0000)]
More code cleanups. Use iterators instead of indices when indices
aren't needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104273 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoX86: Model i64i32imm properly, as a subclass of all immediates.
Daniel Dunbar [Thu, 20 May 2010 20:20:39 +0000 (20:20 +0000)]
X86: Model i64i32imm properly, as a subclass of all immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104272 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoX86: Fix immediate type of FOO64i32 operations.
Daniel Dunbar [Thu, 20 May 2010 20:20:35 +0000 (20:20 +0000)]
X86: Fix immediate type of FOO64i32 operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104271 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agotblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
Daniel Dunbar [Thu, 20 May 2010 20:20:32 +0000 (20:20 +0000)]
tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix OptimizeShadowIV to set Changed. Change OptimizeLoopTermCond to set
Dan Gohman [Thu, 20 May 2010 20:05:31 +0000 (20:05 +0000)]
Fix OptimizeShadowIV to set Changed. Change OptimizeLoopTermCond to set
Changed directly instead of using a return value.

Rename FilterOutUndesirableDedicatedRegisters's Changed variable to
distinguish it from LSRInstance's Changed member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104269 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd some comments.
Dan Gohman [Thu, 20 May 2010 20:00:41 +0000 (20:00 +0000)]
Add some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104268 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSimplify this code. Don't do a DomTreeNode lookup for each visited block.
Dan Gohman [Thu, 20 May 2010 20:00:25 +0000 (20:00 +0000)]
Simplify this code. Don't do a DomTreeNode lookup for each visited block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104267 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRefactor.
Devang Patel [Thu, 20 May 2010 19:57:06 +0000 (19:57 +0000)]
Refactor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104265 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoGrammar fix. This is a test commit.
Matt Fleming [Thu, 20 May 2010 19:45:09 +0000 (19:45 +0000)]
Grammar fix. This is a test commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104264 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMinor code cleanups.
Dan Gohman [Thu, 20 May 2010 19:44:23 +0000 (19:44 +0000)]
Minor code cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104263 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoWhen canonicalizing icmp operand order to put the loop invariant
Dan Gohman [Thu, 20 May 2010 19:26:52 +0000 (19:26 +0000)]
When canonicalizing icmp operand order to put the loop invariant
operand on the left, the interesting operand is on the right. This
fixes a bug where LSR was failing to recognize ICmpZero uses,
which led it to be unable to reverse the induction variable in the
attached testcase.

Delete test/CodeGen/X86/stack-color-with-reg-2.ll, because its test
is extremely fragile and hard to meaningfully update.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104262 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agollvmc: Make segfault detection work on Win32.
Mikhail Glushenkov [Thu, 20 May 2010 19:23:47 +0000 (19:23 +0000)]
llvmc: Make segfault detection work on Win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104261 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSet Changed to true when canonicalizing ICmp operand order; even though
Dan Gohman [Thu, 20 May 2010 19:16:03 +0000 (19:16 +0000)]
Set Changed to true when canonicalizing ICmp operand order; even though
it isn't a very interesting change, it's a change nonetheless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104260 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoHandle Neon v2f64 and v2i64 vector shuffles as register copies.
Bob Wilson [Thu, 20 May 2010 18:39:53 +0000 (18:39 +0000)]
Handle Neon v2f64 and v2i64 vector shuffles as register copies.
This fixes the remaining issue with pr7167.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104257 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRemove dbg_value workaround and associated command line option
Jim Grosbach [Thu, 20 May 2010 18:34:01 +0000 (18:34 +0000)]
Remove dbg_value workaround and associated command line option

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104254 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoDelete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr, but it didn't
Dan Gohman [Thu, 20 May 2010 18:05:01 +0000 (18:05 +0000)]
Delete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr, but it didn't
have a pattern and it had an invalid encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104244 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoThe PPC MFCR instruction implicitly uses all 8 of the CR
Dale Johannesen [Thu, 20 May 2010 17:48:26 +0000 (17:48 +0000)]
The PPC MFCR instruction implicitly uses all 8 of the CR
registers.  Currently it is not so marked, which leads to
VCMPEQ instructions that feed into it getting deleted.
If it is so marked, local RA complains about this sequence:
 vreg = MCRF  CR0
 MFCR  <kill of whatever preg got assigned to vreg>
All current uses of this instruction are only interested in
one of the 8 CR registers, so redefine MFCR to be a normal
unary instruction with a CR input (which is emitted only as
a comment).  That avoids all problems.  7739628.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104238 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoStrip llvm.dbg.lv also.
Devang Patel [Thu, 20 May 2010 16:49:22 +0000 (16:49 +0000)]
Strip llvm.dbg.lv also.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104236 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRename a variable to avoid shadowing.
Dan Gohman [Thu, 20 May 2010 16:41:11 +0000 (16:41 +0000)]
Rename a variable to avoid shadowing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104234 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSplit DbgVariable. Eventually, variable info will be communicated through frame index...
Devang Patel [Thu, 20 May 2010 16:36:41 +0000 (16:36 +0000)]
Split DbgVariable. Eventually, variable info will be communicated through frame index, or DBG_VALUE instruction, or collection of DBG_VALUE instructions. Plus each DbgVariable may not need a label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104233 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMinor code simplification.
Dan Gohman [Thu, 20 May 2010 16:23:28 +0000 (16:23 +0000)]
Minor code simplification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104232 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix assembly parsing and encoding of the pushf and popf family of
Dan Gohman [Thu, 20 May 2010 16:16:00 +0000 (16:16 +0000)]
Fix assembly parsing and encoding of the pushf and popf family of
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSet neverHasSideEffects on 64-bit pushf and popf, for consistency with
Dan Gohman [Thu, 20 May 2010 15:42:55 +0000 (15:42 +0000)]
Set neverHasSideEffects on 64-bit pushf and popf, for consistency with
16-bit and 32-bit pushf and popf.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104228 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMove the code for deleting BaseRegs and LSRUses into helper functions,
Dan Gohman [Thu, 20 May 2010 15:17:54 +0000 (15:17 +0000)]
Move the code for deleting BaseRegs and LSRUses into helper functions,
and fix a bug that valgrind noticed where the code would std::swap an
element with itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104225 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoReduce string trashing.
Benjamin Kramer [Thu, 20 May 2010 14:14:22 +0000 (14:14 +0000)]
Reduce string trashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104223 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd a hybrid bottom up scheduler that reduce register usage while avoiding
Evan Cheng [Thu, 20 May 2010 06:13:19 +0000 (06:13 +0000)]
Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix typo in comment.
Nick Lewycky [Thu, 20 May 2010 03:30:09 +0000 (03:30 +0000)]
Fix typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104209 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoDefine the x86 pause instruction.
Dan Gohman [Thu, 20 May 2010 01:35:50 +0000 (01:35 +0000)]
Define the x86 pause instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104204 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix the sfence instruction to use MRM_F8 instead of MRM7r, since it
Dan Gohman [Thu, 20 May 2010 01:23:41 +0000 (01:23 +0000)]
Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104203 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix build by actually declaring the variable.
Eric Christopher [Thu, 20 May 2010 00:59:30 +0000 (00:59 +0000)]
Fix build by actually declaring the variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104201 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoPartial code for emitting thread local bss data.
Eric Christopher [Thu, 20 May 2010 00:49:07 +0000 (00:49 +0000)]
Partial code for emitting thread local bss data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104197 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMatch "4" or "8" depending upon if it's 32- or 64-bit.
Bill Wendling [Thu, 20 May 2010 00:27:10 +0000 (00:27 +0000)]
Match "4" or "8" depending upon if it's 32- or 64-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104196 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoOnce more, with feeling.
Eric Christopher [Thu, 20 May 2010 00:07:13 +0000 (00:07 +0000)]
Once more, with feeling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104190 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agolit: Add another place to look for bash.
Daniel Dunbar [Wed, 19 May 2010 23:56:09 +0000 (23:56 +0000)]
lit: Add another place to look for bash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104189 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTeach LSR how to cope better with unrolled loops on targets where
Dan Gohman [Wed, 19 May 2010 23:43:12 +0000 (23:43 +0000)]
Teach LSR how to cope better with unrolled loops on targets where
the addressing modes don't make this trivially easy. This allows
it to avoid falling into the less precise heuristics in more
cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104186 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoOptimize away insertelement of an undef value. This shows up in
Bob Wilson [Wed, 19 May 2010 23:42:58 +0000 (23:42 +0000)]
Optimize away insertelement of an undef value.  This shows up in
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up.  Radar 7998853.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8