[x86] Add the dispatch skeleton to the new vector shuffle lowering for
[oota-llvm.git] / test / CodeGen / X86 / sse2-blend.ll
2014-01-20 Andrea Di Biagio[X86] Teach how to combine a vselect into a movss/movsd
2013-12-27 Andrea Di BiagioTeach DAGCombiner how to fold a SIGN_EXTEND_INREG of...
2013-08-23 Rafael EspindolaReplace more uses of sse41 with sse4.1.
2013-02-21 Benjamin KramerDAGCombiner: Make the post-legalize vector op optimizat...
2012-12-08 Craig TopperTeach DAG combine to handle vector logical operations...
2012-11-27 Craig TopperRevert accidental commit.
2012-11-27 Craig TopperMake PrintReg constructor explicit to prevent weird...
2012-01-03 Nadav RotemRevert 147426 because it caused pr11696.
2012-01-02 Nadav RotemOptimize the sequence blend(sign_extend(x)) to blend...
2011-11-07 Jakob Stoklund OlesenKill and collapse outstanding DomainValues.
2011-11-07 Jakob Stoklund OlesenExpand V_SET0 to xorps by default.
2011-10-19 Nadav RotemImprove code generation for vselect on SSE2:
2011-10-10 Nadav RotemFix 10892 - When lowering SIGN_EXTEND_INREG do not...
2011-09-13 Nadav Rotemupdate checked pattern
2011-09-13 Nadav RotemAdd vselect target support for targets that do not...