CodeGen: extend f16 conversions to permit types > float.
[oota-llvm.git] / test / CodeGen / R600 / trunc.ll
2014-04-15 Matt ArsenaultR600/SI: Print more immediates in hex format
2014-04-03 Tom StellardR600/SI: Lower 64-bit immediates using REG_SEQUENCE
2014-03-27 Matt ArsenaultR600: Implement isZExtFree.
2014-03-24 Matt ArsenaultR600: Implement isNarrowingProfitable.
2014-01-28 Michel DanzerR600/SI: Add pattern for truncating i32 to i1
2013-11-13 Tom StellardR600/SI: Prefer SALU instructions for bit shift operations
2013-11-12 Matt ArsenaultR600/SI: Change formatting of printed registers.
2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments
2013-10-10 Matt ArsenaultR600: Fix trunc i64 to i32 on SI
2013-10-10 Tom StellardR600/SI: Use -verify-machineinstrs for most tests
2013-09-05 Matt ArsenaultR600: Fix i64 to i32 trunc on SI