ARM pop of a single register encodes as post-indexed LDR.
[oota-llvm.git] / test / CodeGen / ARM / vrev.ll
2011-05-18 Tanya LattnerHandle perfect shuffle case that generates a vrev for...
2011-05-18 Tanya LattnerIn r131488 I misunderstood how VREV works. It splits...
2011-05-17 Tanya Lattnervrev is incorrectly defined in the perfect shuffle...
2010-10-27 Bob WilsonSelectionDAG shuffle nodes do not allow operands with...
2010-08-17 Bob WilsonAllow more cases of undef shuffle indices and add tests...
2010-06-17 Rafael EspindolaRemove arm_apcscc from the test files. It is the defaul...
2009-09-09 Dan GohmanEliminate more uses of llvm-as and llvm-dis.
2009-07-26 Bob WilsonAdd support for ARM Neon VREV instructions.