CPS3p: Let's reject impossible imod values by returning false from the DisassembleMis...
[oota-llvm.git] / lib / Target /
2011-03-24 Johnny ChenCPS3p: Let's reject impossible imod values by returning...
2011-03-24 Johnny ChenLoad/Store Multiple:
2011-03-24 Johnny ChenSTRT and STRBT was incorrectly tagged as IndexModeNone...
2011-03-24 Johnny ChenThe r128103 fix to cope with the removal of addressing...
2011-03-23 Devang PatelEnable GlobalMerge on darwin.
2011-03-23 Andrew TrickRevert r128175.
2011-03-23 Evan ChengCmp peephole optimization isn't always safe for signed...
2011-03-23 Andrew TrickReapply Eli's r127852 now that the pre-RA scheduler...
2011-03-23 Owen AndersonThe high bit of a Thumb2 ADR's offset is stored in...
2011-03-23 Justin HolewinskiPTX: Improve support for 64-bit addressing
2011-03-22 Johnny ChenFor ARM Disassembler, start a newline to dump the opcod...
2011-03-22 Johnny ChenLDRT and LDRBT was incorrectly tagged as IndexModeNone...
2011-03-22 Eli FriedmanA bit more analysis of a memset-related README entry.
2011-03-22 Johnny ChenA8.6.399 VSTM:
2011-03-22 Eric ChristopherMigrate the fix in r128041 to ARM's fastisel support...
2011-03-22 Bruno Cardoso LopesChange MRC and MRC2 instructions to model the output...
2011-03-22 Che-Liang Chiouptx: add analyze/insert/remove branch
2011-03-22 Matt Beaumont-GayAvoid -Wunused-variable in -asserts builds
2011-03-22 Dan GohmanFix fast-isel address mode folding to avoid folding...
2011-03-21 Bill WendlingWe need to pass the TargetMachine object to the InstPri...
2011-03-21 Eli FriedmanThis README entry was fixed recently.
2011-03-21 Evan ChengRe-apply r127953 with fixes: eliminate empty return...
2011-03-19 Daniel DunbarRevert r127953, "SimplifyCFG has stopped duplicating...
2011-03-19 Evan ChengSimplifyCFG has stopped duplicating returns into predec...
2011-03-19 Nadav RotemAdd support for legalizing UINT_TO_FP of vectors on...
2011-03-19 Johnny ChenFixed an assert by the ARM disassembler for LDRD_PRE...
2011-03-18 Owen AndersonAdd support to the ARM asm parser for the register...
2011-03-18 Evan ChengMatch a few more obvious patterns to revsh. rdar:/...
2011-03-18 Eli FriedmanRevert r127852; it's apparently causing an ICE on mingw.
2011-03-18 Owen AndersonClean whitespace.
2011-03-18 Owen AndersonReduce code duplication.
2011-03-18 Justin HolewinskiPTX: Fix various codegen issues
2011-03-18 Owen AndersonThumb2 PC-relative loads require a fixup rather than...
2011-03-18 Joerg SonnenbergerSupport explicit argument forms for the X86 string...
2011-03-18 Che-Liang Chiouptx: fix parameter order that is reversed
2011-03-18 Che-Liang Chiouptx: add unconditional and conditional branch
2011-03-18 Eli FriedmanAdd a target-specific branchless method for double...
2011-03-18 Johnny ChenThe disassembler for Thumb was wrongly adding 4 to...
2011-03-17 Owen AndersonThere are two pseudos in this case that are Thumb mode...
2011-03-17 Johnny ChenIt used to be that t_addrmode_s4 was used for both:
2011-03-17 Richard OsborneAdd XCore intrinsic for setpsc.
2011-03-17 Cameron ZwarichMove more logic into getTypeForExtArgOrReturn.
2011-03-17 Cameron ZwarichRename getTypeForExtendedInteger() to getTypeForExtArgO...
2011-03-17 Nick LewyckyAdd "swi" which is an obsolete mnemonic for "svc".
2011-03-17 Eli FriedmanA couple new README entries.
2011-03-16 Cameron ZwarichThe x86-64 ABI says that a bool is only guaranteed...
2011-03-16 Richard OsborneAdd XCore intrinsics for setclk, setrdy.
2011-03-16 Richard OsborneAdd checkevent intrinsic to check if any resources...
2011-03-15 Johnny ChenThere were two issues fixed:
2011-03-15 Bill WendlingThe VTBL (and VTBX) instructions are rather permissive...
2011-03-15 Bill WendlingSome minor cleanups based on feedback.
2011-03-15 Evan ChengDo not form thumb2 ldrd / strd if the offset is by...
2011-03-15 Richard OsborneDon't indent cases in a switch, no functionality change.
2011-03-15 Richard OsborneOn the XCore the scavenging slot should be closest...
2011-03-15 Richard OsborneAdd XCore intrinsics for getps, setps, setsr and clrsr.
2011-03-15 Justin HolewinskiPTX: Set PTX 2.0 as the minimum supported version
2011-03-15 Duncan SandsAvoid a compiler warning about reg possibly being used...
2011-03-15 Sean CallananEnabled disassembler support for AVX instructions
2011-03-15 Sean CallananX86 table-generator and disassembler support for the AVX
2011-03-15 Johnny ChenFixed an ARM disassembler bug where it does not handle...
2011-03-15 Jim GrosbachClean up ARM tail calls a bit. They're pseudo-instructi...
2011-03-14 Bill WendlingGenerate a VTBL instruction instead of a series of...
2011-03-14 Jim GrosbachRemove some dead patterns.
2011-03-14 Evan ChengIndentation.
2011-03-14 Justin HolewinskiPTX: Emit global arrays with proper sizes
2011-03-14 Justin HolewinskiPTX: Add support for sqrt/sin/cos intrinsics
2011-03-14 Che-Liang Chiouptx: add set.p instruction and related changes to predi...
2011-03-13 Che-Liang Chiouptx: add basic support of predicate execution
2011-03-12 Eric ChristopherSometimes isPredicable lies to us and tells us we don...
2011-03-12 Jim GrosbachAdd FIXME.
2011-03-12 Jim GrosbachPseudo-ize the ARM Darwin *r9 call instruction definiti...
2011-03-11 Jim GrosbachAdd a FIXME.
2011-03-11 Jim GrosbachPseudo-ize the ARM 'B' instruction.
2011-03-11 Jim GrosbachRemove dead code. These ARM instruction definitions...
2011-03-11 Jim GrosbachPseudo-ize VMOVDcc and VMOVScc.
2011-03-11 Jim Grosbach80 columns
2011-03-11 Jim GrosbachProperly pseudo-ize the ARM LDMIA_RET instruction....
2011-03-11 Jim GrosbachARM VDUPfd and VDUPfq can just be patterns. The instruc...
2011-03-11 Jim GrosbachARM VDUPLNfq and VDUPLNfd definitions can just be Pat...
2011-03-11 Jim GrosbachARM VREV64df and VREV64qf can just be patterns. The...
2011-03-11 Jim GrosbachThis FIXME has been fixed.
2011-03-11 Jim GrosbachProperly pseudo-ize ARM MVNCCi.
2011-03-11 Jim GrosbachFix MOVCCi32imm to be have ARM-mode Requires and a...
2011-03-11 Chris Lattnersilence a conditional assignment -Wuninitialized warning.
2011-03-11 Jim GrosbachProperly pseudo-ize ARM MOVCCi and MOVCCi16.
2011-03-11 Eric ChristopherChange the x86 32-bit scheduler to register pressure...
2011-03-10 Jim GrosbachProperly pseudo-ize MOVCCr and MOVCCs.
2011-03-10 Jim GrosbachDMB can just be a pat referencing MCR.
2011-03-10 Jim GrosbachReorganize a bit. No functional change, just moving...
2011-03-10 Jim GrosbachPseudo-instructions are codegenonly by definition.
2011-03-10 Justin HolewinskiPTX: Add preliminary support for floating-point divide...
2011-03-10 Che-Liang Chiouptx: add the rest of special registers of ISA version 2.0
2011-03-10 Stuart HastingsRevert 127359; it broke lencod.
2011-03-10 Evan ChengRe-commit 127368 and 127371. They are exonerated.
2011-03-09 Evan ChengRevert 127368 and 127371 for now.
2011-03-09 Evan ChengChange the definition of TargetRegisterInfo::getCrossCo...
2011-03-09 Benjamin KramerFix a pasto that broke all x86_64-elf targets.
2011-03-09 Stuart HastingsX86 byval copies no longer always_inline. <rdar:/...
2011-03-09 Johnny ChenLLVM combines the offset mode of A8.6.199 A1 & A2 into...
2011-03-09 Bruno Cardoso LopesImprove varags handling, with testcases. Patch by Sasa...
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