quick fix: remove GlobalVariable::GlobalVariable mistakenly commited at r144933....
[oota-llvm.git] / lib / Target /
2011-11-17 Chad RosierAdd TODO comment.
2011-11-17 Craig TopperFix SSE/AVX integer comparison patterns to understand...
2011-11-17 Chad RosierDead code.
2011-11-17 Craig TopperRemove seemingly unnecessary duplicate VROUND definitions.
2011-11-17 Eli FriedmanAdd support for custom names for library functions...
2011-11-17 Chad RosierDon't unconditionally set the kill flag.
2011-11-17 Eli FriedmanTurn on vzeroupper insertion on call boundaries for...
2011-11-16 Jim GrosbachGeneralize the fixup info for ARM mode.
2011-11-16 Akira HatanakaLower 64-bit constant pool node.
2011-11-16 Akira HatanakaLower 64-bit block address.
2011-11-16 Jim GrosbachFix encoding of NOP used for padding in ARM mode .align.
2011-11-16 Akira HatanakaAdd patterns for 64-bit tglobaladdr, tblockaddress...
2011-11-16 Akira Hatanaka64-bit jump register instruction.
2011-11-16 Evan ChengAnother missing X86ISD::MOVLPD pattern. rdar://10450317
2011-11-16 Jim GrosbachARM assembly parsing for shifted register operands...
2011-11-16 Jim GrosbachClean up debug printing of ARM shifted operands.
2011-11-16 Jim GrosbachARM assmebly two operand forms for LSR, ASR, LSL, ROR...
2011-11-16 Jim GrosbachARM assembly parsing for RRX mnemonic.
2011-11-16 Pete CooperAdded missing comment about new custom lowering of...
2011-11-16 Chad RosierCheck to make sure we can select the instruction before...
2011-11-16 Jim GrosbachARM mode aliases for bitwise instructions w/ register...
2011-11-16 Bob WilsonFix tablegen warning: hasSideEffects is inferred for...
2011-11-16 NAKAMURA Takumilib/Target/ARM/CMakeLists.txt: Disable optimization...
2011-11-16 Evan ChengSink codegen optimization level into MCCodeGenInfo...
2011-11-16 Craig TopperFix the execution domain on a bunch of SSE/AVX instruct...
2011-11-16 Bob WilsonFix ARM SjLj-EH dispatch setup code. <rdar://problem...
2011-11-16 Craig TopperRemove code to enable execution dependency fix pass...
2011-11-16 Chad RosierAdd FIXME comment.
2011-11-15 Jakob Stoklund OlesenEnable -widen-vmovs by default.
2011-11-15 Jim GrosbachARM assembly parsing for register range syntax for...
2011-11-15 Jim GrosbachARM assembly parsing for data type suffices on NEON...
2011-11-15 Nadav RotemAVX: Add support for vbroadcast from BUILD_VECTOR and...
2011-11-15 Jim GrosbachARM assembly parsing two operand forms for shift instru...
2011-11-15 Jim GrosbachARM VFP assembly parsing for VADD and VSUB two-operand...
2011-11-15 Jim GrosbachARM accept an immediate offset in memory operands w...
2011-11-15 Pete CooperAdded custom lowering for load->dec->store sequence...
2011-11-15 Jim GrosbachARM enclosing curly braces optional on one-register...
2011-11-15 Jim GrosbachARM size suffix on VFP single-precision 'vmov' is optional.
2011-11-15 Jim GrosbachFix typo.
2011-11-15 Jim GrosbachARM alternate size suffices for VTRN instructions.
2011-11-15 Owen AndersonFix a misplaced paren bug.
2011-11-15 Jim GrosbachARM assembly parsing for optional datatype suffix on...
2011-11-15 Jim GrosbachARM assembly parsing for two-operand form of 'mul'...
2011-11-15 Jim GrosbachARM assembly parsing for two-operand form of 'mul'...
2011-11-15 Jim GrosbachThumb2 two-operand 'mul' instruction wide encoding...
2011-11-15 Owen AndersonFix an ambiguous decoding where we failed to properly...
2011-11-15 Jim GrosbachThumb2 assembly parsing for mul.w in IT block fix.
2011-11-15 Akira HatanakaFix functions in MipsFrameLowering.cpp and MipsRegister...
2011-11-15 Akira HatanakaSet nomacro before emitting the sequence of instruction...
2011-11-15 Akira HatanakaSimplify function PassByValArg64.
2011-11-15 Akira HatanakaDelete files.
2011-11-15 Akira HatanakaRemove MipsMCSymbolRefExpr.
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for register-write...
2011-11-15 Jay FoadFix typo in comment.
2011-11-15 Jay FoadMake use of MachinePointerInfo::getFixedStack. This...
2011-11-15 Jay FoadRemove some unnecessary includes of PseudoSourceValue.h.
2011-11-15 Craig TopperFix PR11370 for real. Prevents converting 256-bit FP...
2011-11-15 Craig TopperProperly qualify AVX2 specific parts of execution depen...
2011-11-15 Evan ChengAdd vmov.f32 to materialize f32 immediate splats which...
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for fixed-writebac...
2011-11-15 Jakob Stoklund OlesenBreak false dependencies before partial register updates.
2011-11-14 Jim GrosbachARM parsing datatype suffix variants for non-writeback...
2011-11-14 Jim GrosbachARM parsing datatype suffix variants for non-writeback...
2011-11-14 Jim GrosbachAdd explanatory comment.
2011-11-14 Jim GrosbachSplit out the plain '.{8|16|32|64}' suffix handling.
2011-11-14 Jim GrosbachARM parsing optional datatype suffix for VAND/VEOR...
2011-11-14 Chad RosierSupporting inline memmove isn't going to be worthwhile...
2011-11-14 Jim GrosbachARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 Chad RosierAdd support for inlining small memcpys.
2011-11-14 Chad RosierFix a performance regression from r144565. Positive...
2011-11-14 Jim GrosbachARM assembly parsing type suffix options for VLDR/VSTR.
2011-11-14 Evan ChengAdd a missing pattern for X86ISD::MOVLPD. rdar://10436044
2011-11-14 Chad RosierAdd support for Thumb load/stores with negative offsets.
2011-11-14 Benjamin KramerUnbreak Release builds.
2011-11-14 Pete CooperChanged SSE4/AVX <2 x i64> extract and insert ops to...
2011-11-14 Akira Hatanaka32-to-64-bit extended load.
2011-11-14 Akira HatanakaAnalyzeCallOperands function for N32/64.
2011-11-14 Akira HatanakaModify LowerFormalArguments to correctly handle vaarg...
2011-11-14 Justin HolewinskiPTX: Let LLVM use loads/stores for all mem* intrinsics...
2011-11-14 Akira HatanakaRemove variable that keeps the size of area used to...
2011-11-14 Jim GrosbachTidy up. 80 column.
2011-11-14 Craig TopperAdd AVX2 version of instructions to load folding tables...
2011-11-14 Craig TopperAdd neverHasSideEffects, mayLoad, and mayStore to many...
2011-11-14 Chad RosierAdd support for ARM halfword load/stores and signed...
2011-11-13 Craig TopperAdd BLSI, BLSMSK, and BLSR to getTargetNodeName.
2011-11-13 Chad RosierThe order in which the predicate is added differs betwe...
2011-11-13 Chad RosierTemporarily disable SelectIntrinsicCall when in ARM...
2011-11-13 Chad RosierFix comments.
2011-11-13 Chad RosierAdd support for emitting both signed- and zero-extend...
2011-11-12 Craig TopperAdd more AVX2 shift lowering support. Move AVX2 variabl...
2011-11-12 Akira HatanakaFix typo.
2011-11-12 Akira HatanakaImplement Mips64's handling of byval arguments in Lower...
2011-11-12 Akira HatanakaImplement Mips64's handling of byval arguments in Lower...
2011-11-12 Akira Hatanaka64-bit arbitrary immediate pattern.
2011-11-12 Akira HatanakaFunction for handling byval arguments.
2011-11-12 Daniel Dunbarbuild: Attempt to rectify inconsistencies between CMake...
2011-11-12 Jim GrosbachARM refactor simple immediate asm operand render methods.
2011-11-12 Jim GrosbachRe-apply 144430, this time with the associated isel...
2011-11-11 Jim GrosbachOops. Missed the isel half of this. revert while I...
2011-11-11 Jim GrosbachARM assembly parsing for VST1 two-register encoding.
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