Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.
[oota-llvm.git] / lib / Target / R600 / AMDGPURegisterInfo.h
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-08-14 Tom StellardR600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-02-06 Tom StellardR600: Support for indirect addressing v4
2013-01-31 NAKAMURA TakumiUpdate AMDGPURegisterInfo::eliminateFrameIndex() corres...
2012-12-11 Tom StellardAdd R600 backend