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- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMScheduleA8.td
2010-10-06
Evan Cheng
- Add TargetInstrInfo::getOperandLatency() to compute...
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2010-10-01
Evan Cheng
Fix scheduling infor for vmovn and vshrn which I broke...
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2010-10-01
Evan Cheng
Add operand cycles for vldr / vstr.
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2010-10-01
Evan Cheng
NEON scheduling info fix. vmov reg, reg are single...
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2010-09-30
Evan Cheng
ARM instruction itinerary fixes:
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2010-09-29
Evan Cheng
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC...
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2010-09-29
Evan Cheng
Separate itinerary classes for mvn from mov; for tst...
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2010-09-29
Evan Cheng
Assign bitwise binary instructions different itinerary...
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2010-09-28
Evan Cheng
Add support to model pipeline bypass / forwarding.
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2010-09-25
Evan Cheng
Remove a unused instruction itinerary class.
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2010-09-25
Evan Cheng
Fix zero and sign extension instructions scheduling...
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2010-09-24
Evan Cheng
More pseudo instruction scheduling itinerary fixes.
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2010-09-24
Evan Cheng
Fix scheduling itinerary for pseudo mov immediate instr...
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2010-09-08
Evan Cheng
Fix LDM_RET schedule itinery.
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2010-06-28
Jim Grosbach
minor housekeeping cleanup: 80-column, trailing whitesp...
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2010-04-18
Anton Korobeynikov
Make processor FUs unique for given itinerary. This...
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2010-04-07
Anton Korobeynikov
Split A8/A9 itins - they already were too big.
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