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For each instruction itinerary class, specify the number of micro-ops each
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMSchedule.td
2010-09-09
Evan Cheng
For each instruction itinerary class, specify the numbe...
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2010-09-08
Evan Cheng
Fix LDM_RET schedule itinery.
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2010-04-18
Anton Korobeynikov
Make processor FUs unique for given itinerary. This...
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2010-04-07
Anton Korobeynikov
Split A8/A9 itins - they already were too big.
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2010-04-07
Anton Korobeynikov
Fix itins for VABA
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2010-04-07
Anton Korobeynikov
VHADD differs from VHSUB at least on A9 - the former...
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2010-04-07
Anton Korobeynikov
Define new itin classes for ARM <-> VFP reg moves to...
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2010-04-07
Anton Korobeynikov
Add new itin classes for FP16 <-> FP32 conversions...
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2010-04-07
Anton Korobeynikov
Make use of new reserved/required scheduling stuff...
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2009-09-25
David Goodwin
Finish scheduling itineraries for NEON.
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2009-09-24
David Goodwin
Make the end-of-itinerary mark explicit. Some cleanup.
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2009-09-23
David Goodwin
Checkpoint NEON scheduling itineraries.
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2009-09-21
David Goodwin
Add Cortex-A8 VFP model.
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2009-08-19
David Goodwin
Update Cortex-A8 instruction itineraries for integer...
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2009-08-15
Evan Cheng
Turn on if-conversion for thumb2.
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2009-08-13
David Goodwin
Finalize itineraries for cortex-a8 integer multiply
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2009-08-11
David Goodwin
Allow a zero cycle stage to reserve/require a FU withou...
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2009-08-10
David Goodwin
Checkpoint scheduling itinerary changes.
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2009-07-21
Evan Cheng
Add fake v7 itineraries for now.
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2009-06-19
Evan Cheng
Latency information for ARM v6. It's rough and not...
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