RRX reads CPSR.
[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.td
2009-09-01 David GoodwinRRX reads CPSR.
2009-08-28 Evan ChengPrint a nl before pic labels so they start at a new...
2009-08-27 Misha BrukmanSTRD and LDRD require ARMv5TE, not just ARMv5T.
2009-08-21 Bob WilsonRename ARM "lane_cst" operands to "nohash_imm" since...
2009-08-19 David GoodwinUpdate Cortex-A8 instruction itineraries for integer...
2009-08-13 Jim GrosbachAdd missing defs of R2 and D1.
2009-08-13 David GoodwinFinalize itineraries for cortex-a8 integer multiply
2009-08-13 Jim GrosbachRemove unnecessary newline
2009-08-13 Jim GrosbachCorrect comment wording
2009-08-12 David GoodwinEnhance the InstrStage object to enable the specificati...
2009-08-12 Jim Grosbachregister naming cleanup (s/ip/r12/)
2009-08-11 Owen AndersonSplit EVT into MVT and EVT, the former representing...
2009-08-11 Jim GrosbachSjLj based exception handling unwinding support. This...
2009-08-10 Owen AndersonRename MVT to EVT, in preparation for splitting SimpleV...
2009-08-08 Anton KorobeynikovUse subclassing to print lane-like immediates (w/o...
2009-08-08 Anton KorobeynikovUse VLDM / VSTM to spill/reload 128-bit Neon registers
2009-08-06 David GoodwinAdd parameter to pattern classes to enable an itinerary...
2009-08-04 David GoodwinInitial support for single-precision FP using NEON...
2009-07-29 Evan ChengMake sure Thumb2 uses the right call instructions.
2009-07-29 Evan Cheng- Fix an obvious copy and paste error.
2009-07-29 Evan ChengOptimize Thumb2 jumptable to use tbb / tbh when all...
2009-07-28 Evan ChengIn thumb2 mode, add pc is unpredictable. Use add +...
2009-07-25 Evan ChengChange Thumb2 jumptable codegen to one that uses two...
2009-07-22 Evan ChengUse getTargetConstant instead of getConstant since...
2009-07-22 Evan ChengDon't forget D16 - D31 are clobbered by calls and sjlj eh.
2009-07-14 Evan Cheng1. In Thumb mode, select tBx instead of ARM variants.
2009-07-14 David GoodwinFix detection of valid BFC immediates.
2009-07-11 Evan ChengMajor changes to Thumb (not Thumb2). Many 16-bit instru...
2009-07-09 Evan ChengLDM_RET should be marked mayLoad.
2009-07-08 Evan ChengChange how so_imm and t2_so_imm are handled. At instruc...
2009-07-07 Evan ChengAlso statically set bit 25 for BR_JT instructions.
2009-07-07 Evan ChengStatically encode bit 25 to indicate immediate form...
2009-07-07 Evan ChengAdd BX and BXr9 encodings. Patch by Sean Callanan.
2009-07-06 Evan ChengAdd bfc to armv6t2.
2009-07-06 Evan ChengAdded ARM::mls for armv6t2.
2009-07-02 Evan ChengChange the meaning of predicate hasThumb2 to mean thumb...
2009-07-02 Evan Cheng80 col violation.
2009-07-01 Bob WilsonAdd a new addressing mode for NEON load/store instructions.
2009-06-29 David GoodwinRename ARMcmpNZ to ARMcmpZ and use it to represent...
2009-06-29 Evan ChengImplement Thumb2 ldr.
2009-06-26 Evan ChengSimplify predicate CarryDefIsUsed.
2009-06-26 Evan ChengMark a bunch of instructions commutable.
2009-06-25 Evan ChengSelect ADC, SBC, and RSC instead of the ADCS, SBCS...
2009-06-25 Evan ChengISD::ADDE / ISD::SUBE updates the carry bit so they...
2009-06-24 Evan Cheng80 col violation.
2009-06-23 Evan ChengInitial Thumb2 support. Majority of the work is done...
2009-06-23 Evan ChengMinor reorg.
2009-06-22 Bob WilsonAdd support for ARM's Advanced SIMD (NEON) instruction...
2009-06-22 Bob WilsonAdd explicit types for shift count constants. This...
2009-06-22 Bob WilsonFor Darwin on ARMv6 and newer, make register r9 availab...
2009-06-19 Evan ChengLatency information for ARM v6. It's rough and not...
2009-06-17 Anton KorobeynikovInitial support for some Thumb2 instructions.
2009-06-15 Anton KorobeynikovRename methods for the sake of consistency.
2009-06-15 Evan ChengPart 1.
2009-06-12 Evan ChengMark some pattern-less instructions as neverHasSideEffects.
2009-05-29 Anton KorobeynikovAdd placeholder for thumb2 stuff
2009-05-14 Jim GrosbachUpdate the names of the exception handling sjlj instrin...
2009-05-12 Jim GrosbachAdd support for GCC compatible builtin setjmp and longj...
2009-02-05 Evan ChengA few more isAsCheapAsAMove.
2008-12-03 Dan GohmanRename isSimpleLoad to canFoldAsLoad, to better reflect...
2008-11-14 Evan ChengFix MOVrx, MOVsrl_flag, and MOVsra_flag encodings.
2008-11-13 Evan ChengFix pre- and post-indexed load / store encoding bugs.
2008-11-12 Evan ChengConsolidate formats; fix FCMPED etc. encodings.
2008-11-07 Evan ChengJump table JIT support. Work in progress.
2008-11-07 Evan ChengEncode misc arithmetic instructions.
2008-11-06 Evan ChengEncode extend instructions; more clean up.
2008-11-06 Evan Cheng- Improve naming consistency: Branch -> BrFrm, BranchMi...
2008-11-06 Evan ChengRemove opcode from instruction TS flags; add MOVCC...
2008-11-06 Evan ChengHandle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
2008-11-06 Evan ChengFix so_imm encoding bug; add support for MOVi2pieces.
2008-11-06 Evan ChengFix encoding of multiple instructions with 3 src operan...
2008-11-05 Evan ChengEncode pic load / store instructions; fix some encoding...
2008-11-05 Evan ChengRestructure ARM code emitter to use instruction formats...
2008-11-03 Jim GrosbachAdd binary encoding support for multiply instructions...
2008-10-31 Evan ChengForgot this in last commit.
2008-10-14 Jim GrosbachUpdate ARM Insn encoding to get endian-ness to match...
2008-10-11 Chris LattnerChange CALLSEQ_BEGIN and CALLSEQ_END to take TargetCons...
2008-10-07 Jim GrosbachUnconditional branch instruction encoding fix. Needs...
2008-10-07 Jim GrosbachFix Opcode values of CMP and CMN
2008-09-17 Evan ChengFix addrmode1 instruction encodings; fix bx_ret encoding.
2008-09-13 Evan ChengRevert 56176. All those instruction formats are still...
2008-09-12 Evan ChengEliminate unnecessary instruction formats.
2008-09-12 Dan GohmanRename ConstantSDNode::getValue to getZExtValue, for...
2008-09-01 Evan ChengControl flow instruction encodings.
2008-09-01 Evan Chengldm / stm instruction encodings.
2008-09-01 Evan ChengAXI2 and AXI3 instruction encodings.
2008-09-01 Evan Chengaddrmode3 instruction encodings.
2008-09-01 Evan ChengRest of addrmode2 instruction encodings.
2008-08-31 Evan ChengAddr2 word / byte load encodings.
2008-08-29 Evan ChengMVN is addrmode1.
2008-08-28 Evan ChengRefactor ARM instruction format definitions into a...
2008-07-27 Dan GohmanRename SDOperand to SDValue.
2008-03-15 Evan ChengReplace all target specific implicit def instructions...
2008-02-27 Bill WendlingFinal de-tabification.
2008-01-17 Chris LattnerThis commit changes:
2008-01-15 Chris Lattnerrename SDTRet -> SDTNone.
2008-01-10 Chris Lattnerget def use info more correct.
2008-01-07 Evan ChengOnly mark instructions that load a single value without...
2008-01-06 Chris Lattnerrename isLoad -> isSimpleLoad due to evan's desire...
2008-01-06 Chris Lattnerrename isStore -> mayStore to more accurately reflect...
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