TableGen/ARM64: print aliases even if they have syntax variants.
authorTim Northover <tnorthover@apple.com>
Thu, 15 May 2014 11:16:32 +0000 (11:16 +0000)
committerTim Northover <tnorthover@apple.com>
Thu, 15 May 2014 11:16:32 +0000 (11:16 +0000)
commitf61a467a5904a380ec9af743f2739ef68955ffb2
treeaa53fbe2c208260745e009b496bf294f0c683643
parentd74434656619d19e3e5c3dec79c6ccdaef567bec
TableGen/ARM64: print aliases even if they have syntax variants.

To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867 91177308-0d34-0410-b5e6-96231b3b80d8
19 files changed:
lib/Target/AArch64/AArch64InstrNEON.td
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM64/ARM64InstrInfo.td
lib/Target/X86/X86InstrInfo.td
lib/Target/X86/X86InstrSSE.td
test/CodeGen/AArch64/func-calls.ll
test/CodeGen/AArch64/neon-copyPhysReg-tuple.ll
test/CodeGen/AArch64/neon-perm.ll
test/CodeGen/ARM64/aarch64-neon-copyPhysReg-tuple.ll
test/CodeGen/ARM64/copy-tuple.ll
test/CodeGen/ARM64/fp128.ll
test/MC/AArch64/neon-mov.s
test/MC/ARM64/advsimd.s
test/MC/Disassembler/AArch64/neon-instructions.txt
test/MC/Disassembler/ARM64/advsimd.txt
utils/TableGen/AsmMatcherEmitter.cpp
utils/TableGen/AsmWriterEmitter.cpp
utils/TableGen/CodeGenInstruction.cpp
utils/TableGen/CodeGenInstruction.h