isRegSequence = R->getValueAsBit("isRegSequence");
isExtractSubreg = R->getValueAsBit("isExtractSubreg");
isInsertSubreg = R->getValueAsBit("isInsertSubreg");
+ hasTwoExplicitDefs = R->getValueAsBit("hasTwoExplicitDefs");
bool Unset;
mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset);