AVX-512: Gather and Scatter patterns
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 25 Feb 2015 09:46:31 +0000 (09:46 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 25 Feb 2015 09:46:31 +0000 (09:46 +0000)
commit4105fd49d4643f06d746cfd3154b1c0bb8672483
treea2e51cbe94250dda875fe3b3dd411022a95f365c
parentfba7e30f0f850877977dd7f91b88b836fa533469
AVX-512: Gather and Scatter patterns
Gather and scatter instructions additionally write to one of the source operands - mask register.
In this case Gather has 2 destination values - the loaded value and the mask.
Till now we did not support code gen pattern for gather - the instruction was generated from
intrinsic only and machine node was hardcoded.
When we introduce the masked_gather node, we need to select instruction automatically,
in the standard way.
I added a flag "hasTwoExplicitDefs" that allows to handle 2 destination operands.

(Some code in the X86InstrFragmentsSIMD.td is commented out, just to split one big
patch in many small patches)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230471 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/ISDOpcodes.h
include/llvm/Target/Target.td
include/llvm/Target/TargetSelectionDAG.td
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrFragmentsSIMD.td
lib/Target/X86/X86InstrInfo.td
utils/TableGen/CodeGenDAGPatterns.cpp
utils/TableGen/CodeGenInstruction.cpp
utils/TableGen/CodeGenInstruction.h