[MBP] Fix a really horrible bug in MachineBlockPlacement, but behind

[oota-llvm.git] / test / CodeGen / X86 / vec_extract-mmx.ll

diff --git a/test/CodeGen/X86/vec_extract-mmx.ll b/test/CodeGen/X86/vec_extract-mmx.ll
index c7780b023765065b475d509817d4af3ddc28310d..780066d2da1565f5b8a055eb2499cdcbdcaf2bb6 100644 (file)
--- a/test/CodeGen/X86/vec_extract-mmx.ll
+++ b/test/CodeGen/X86/vec_extract-mmx.ll
@@ -1,13 +1,14 @@
-; RUN: llc < %s -mtriple=x86_64-darwin -x86-experimental-vector-widening-legalization -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
 
 define i32 @test0(<1 x i64>* %v4) {
 ; CHECK-LABEL: test0:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    pshufw $238, (%rdi), %mm0
+; CHECK:       # BB#0:{{.*}} %entry
+; CHECK:    pshufw $238, (%[[REG:[a-z]+]]), %mm0
 ; CHECK-NEXT:    movd %mm0, %eax
 ; CHECK-NEXT:    addl $32, %eax
 ; CHECK-NEXT:    retq
-  %v5 = load <1 x i64>* %v4, align 8
+entry:
+  %v5 = load <1 x i64>, <1 x i64>* %v4, align 8
   %v12 = bitcast <1 x i64> %v5 to <4 x i16>
   %v13 = bitcast <4 x i16> %v12 to x86_mmx
   %v14 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %v13, i8 -18)
@@ -22,14 +23,14 @@ define i32 @test0(<1 x i64>* %v4) {
 
 define i32 @test1(i32* nocapture readonly %ptr) {
 ; CHECK-LABEL: test1:
-; CHECK:       ## BB#0: ## %entry
-; CHECK-NEXT:    movd (%rdi), %mm0
+; CHECK:       # BB#0:{{.*}} %entry
+; CHECK:    movd (%[[REG]]), %mm0
 ; CHECK-NEXT:    pshufw $232, %mm0, %mm0
 ; CHECK-NEXT:    movd %mm0, %eax
 ; CHECK-NEXT:    emms
 ; CHECK-NEXT:    retq
 entry:
-  %0 = load i32* %ptr, align 4
+  %0 = load i32, i32* %ptr, align 4
   %1 = insertelement <2 x i32> undef, i32 %0, i32 0
   %2 = insertelement <2 x i32> %1, i32 0, i32 1
   %3 = bitcast <2 x i32> %2 to x86_mmx
@@ -48,15 +49,14 @@ entry:
 
 define i32 @test2(i32* nocapture readonly %ptr) {
 ; CHECK-LABEL: test2:
-; CHECK:       ## BB#0: ## %entry
-; CHECK-NEXT:    movq (%rdi), %mm0
-; CHECK-NEXT:    pshufw $232, %mm0, %mm0
+; CHECK:       # BB#0:{{.*}} %entry
+; CHECK:    pshufw $232, (%[[REG]]), %mm0
 ; CHECK-NEXT:    movd %mm0, %eax
 ; CHECK-NEXT:    emms
 ; CHECK-NEXT:    retq
 entry:
   %0 = bitcast i32* %ptr to x86_mmx*
-  %1 = load x86_mmx* %0, align 8
+  %1 = load x86_mmx, x86_mmx* %0, align 8
   %2 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %1, i8 -24)
   %3 = bitcast x86_mmx %2 to <4 x i16>
   %4 = bitcast <4 x i16> %3 to <1 x i64>