ret <2 x i64> %ret
}
+; Test v4f32 insertion into 0.
+define <4 x float> @f5(float %val) {
+; CHECK-LABEL: f5:
+; CHECK-DAG: vuplhf [[REG:%v[0-9]+]], %v0
+; CHECK-DAG: vgbm [[ZERO:%v[0-9]+]], 0
+; CHECK: vmrhg %v24, [[ZERO]], [[REG]]
+; CHECK: br %r14
+ %ret = insertelement <4 x float> zeroinitializer, float %val, i32 3
+ ret <4 x float> %ret
+}
+
; Test v2f64 insertion into 0.
define <2 x double> @f6(double %val) {
; CHECK-LABEL: f6:
%ret = insertelement <2 x double> zeroinitializer, double %val, i32 1
ret <2 x double> %ret
}
+