AMDGPU: Fix assert when legalizing atomic operands
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 5 Nov 2015 02:46:56 +0000 (02:46 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 5 Nov 2015 02:46:56 +0000 (02:46 +0000)
commit76b6b15dcdfdcdeb4d6716a45e5badc99f8a5dfa
tree66c4da8b7f13134759ab15d36e97b821dca1453a
parent1c18f49544ccddbba94216dc39070197dadeb043
AMDGPU: Fix assert when legalizing atomic operands

The operand layout is slightly different for the atomic
opcodes from the usual MUBUF loads and stores.

This should only fix it on SI/CI. VI is still broken
because it still emits the addr64 replacement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252140 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstrInfo.h
lib/Target/AMDGPU/SIInstrInfo.td
test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll [new file with mode: 0644]